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author | Tom Rini <trini@konsulko.com> | 2016-06-04 12:49:08 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-06-04 12:49:08 (GMT) |
commit | c41c649c2fdec7bf6ef84173597cc3feabdb7828 (patch) | |
tree | a6b7e3d25eb9d62e5b9989040aa39ddd1c00a83a /drivers | |
parent | f15715afea3e7b576fad1f6877a073b65576a335 (diff) | |
parent | ff78aa2ba19cda755b01818fb3caf2aca9236865 (diff) | |
download | u-boot-fsl-qoriq-c41c649c2fdec7bf6ef84173597cc3feabdb7828.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 13 | ||||
-rw-r--r-- | drivers/ddr/fsl/fsl_ddr_gen4.c | 42 | ||||
-rw-r--r-- | drivers/ddr/fsl/options.c | 3 | ||||
-rw-r--r-- | drivers/mmc/fsl_esdhc.c | 9 | ||||
-rw-r--r-- | drivers/mtd/spi/sf_params.c | 1 | ||||
-rw-r--r-- | drivers/mtd/spi/spi_flash.c | 5 | ||||
-rw-r--r-- | drivers/pci/pcie_layerscape.c | 9 |
7 files changed, 49 insertions, 33 deletions
diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index 9073917..1d5cec6 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -709,7 +709,7 @@ static void set_timing_cfg_2(const unsigned int ctrl_num, | ((add_lat_mclk & 0xf) << 28) | ((cpo & 0x1f) << 23) | ((wr_lat & 0xf) << 19) - | ((wr_lat & 0x10) << 14) + | ((wr_lat & 0x10) << 18) | ((rd_to_pre & RD_TO_PRE_MASK) << RD_TO_PRE_SHIFT) | ((wr_data_delay & WR_DATA_DELAY_MASK) << WR_DATA_DELAY_SHIFT) | ((cke_pls & 0x7) << 6) @@ -1835,10 +1835,17 @@ static void set_ddr_sdram_clk_cntl(fsl_ddr_cfg_regs_t *ddr, /* Per FSL Application Note: AN2805 */ ss_en = 1; #endif - clk_adjust = popts->clk_adjust; + if (fsl_ddr_get_version(0) >= 0x40701) { + /* clk_adjust in 5-bits on T-series and LS-series */ + clk_adjust = (popts->clk_adjust & 0x1F) << 22; + } else { + /* clk_adjust in 4-bits on earlier MPC85xx and P-series */ + clk_adjust = (popts->clk_adjust & 0xF) << 23; + } + ddr->ddr_sdram_clk_cntl = (0 | ((ss_en & 0x1) << 31) - | ((clk_adjust & 0xF) << 23) + | clk_adjust ); debug("FSLDDR: clk_cntl = 0x%08x\n", ddr->ddr_sdram_clk_cntl); } diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c index 5039f5d..d37e247 100644 --- a/drivers/ddr/fsl/fsl_ddr_gen4.c +++ b/drivers/ddr/fsl/fsl_ddr_gen4.c @@ -206,12 +206,14 @@ void fsl_ddr_set_memctl_regs(const fsl_ddr_cfg_regs_t *regs, #ifdef CONFIG_SYS_FSL_ERRATUM_A009803 /* part 1 of 2 */ - if (regs->ddr_sdram_cfg & SDRAM_CFG_RD_EN) { /* for RDIMM */ - ddr_out32(&ddr->ddr_sdram_rcw_2, - regs->ddr_sdram_rcw_2 & ~0x0f000000); + if (regs->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) { + if (regs->ddr_sdram_cfg & SDRAM_CFG_RD_EN) { /* for RDIMM */ + ddr_out32(&ddr->ddr_sdram_rcw_2, + regs->ddr_sdram_rcw_2 & ~0x0f000000); + } + ddr_out32(&ddr->err_disable, regs->err_disable | + DDR_ERR_DISABLE_APED); } - - ddr_out32(&ddr->err_disable, regs->err_disable | DDR_ERR_DISABLE_APED); #else ddr_out32(&ddr->err_disable, regs->err_disable); #endif @@ -395,22 +397,24 @@ step2: #endif /* CONFIG_SYS_FSL_ERRATUM_A008511 */ #ifdef CONFIG_SYS_FSL_ERRATUM_A009803 - /* if it's RDIMM */ - if (regs->ddr_sdram_cfg & SDRAM_CFG_RD_EN) { - for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { - if (!(regs->cs[i].config & SDRAM_CS_CONFIG_EN)) - continue; - set_wait_for_bits_clear(&ddr->sdram_md_cntl, - MD_CNTL_MD_EN | - MD_CNTL_CS_SEL(i) | - 0x070000ed, - MD_CNTL_MD_EN); - udelay(1); + if (regs->ddr_sdram_cfg_2 & SDRAM_CFG2_AP_EN) { + /* if it's RDIMM */ + if (regs->ddr_sdram_cfg & SDRAM_CFG_RD_EN) { + for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { + if (!(regs->cs[i].config & SDRAM_CS_CONFIG_EN)) + continue; + set_wait_for_bits_clear(&ddr->sdram_md_cntl, + MD_CNTL_MD_EN | + MD_CNTL_CS_SEL(i) | + 0x070000ed, + MD_CNTL_MD_EN); + udelay(1); + } } - } - ddr_out32(&ddr->err_disable, - regs->err_disable & ~DDR_ERR_DISABLE_APED); + ddr_out32(&ddr->err_disable, + regs->err_disable & ~DDR_ERR_DISABLE_APED); + } #endif } #endif diff --git a/drivers/ddr/fsl/options.c b/drivers/ddr/fsl/options.c index d0075ff..793d12a 100644 --- a/drivers/ddr/fsl/options.c +++ b/drivers/ddr/fsl/options.c @@ -886,7 +886,8 @@ unsigned int populate_memctl_options(const common_timing_params_t *common_dimm, } else popts->ecc_mode = 1; #endif - popts->ecc_init_using_memctl = 1; /* 0 = use DMA, 1 = use memctl */ + /* 1 = use memory controler to init data */ + popts->ecc_init_using_memctl = popts->ecc_mode ? 1 : 0; /* * Choose DQS config diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c index 3acf9e8..57ad975 100644 --- a/drivers/mmc/fsl_esdhc.c +++ b/drivers/mmc/fsl_esdhc.c @@ -308,14 +308,10 @@ static int esdhc_setup_data(struct mmc *mmc, struct mmc_data *data) static void check_and_invalidate_dcache_range (struct mmc_cmd *cmd, struct mmc_data *data) { -#ifdef CONFIG_FSL_LAYERSCAPE unsigned start = 0; -#else - unsigned start = (unsigned)data->dest ; -#endif + unsigned end = 0; unsigned size = roundup(ARCH_DMA_MINALIGN, data->blocks*data->blocksize); - unsigned end = start+size ; #ifdef CONFIG_FSL_LAYERSCAPE dma_addr_t addr; @@ -324,7 +320,10 @@ static void check_and_invalidate_dcache_range printf("Error found for upper 32 bits\n"); else start = lower_32_bits(addr); +#else + start = (unsigned)data->dest; #endif + end = start + size; invalidate_dcache_range(start, end); } diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index 4f37e33..c577d9e 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -67,6 +67,7 @@ const struct spi_flash_params spi_flash_params_table[] = { {"S25FL128S_64K", 0x012018, 0x4d01, 64 * 1024, 256, RD_FULL, WR_QPP}, {"S25FL256S_256K", 0x010219, 0x4d00, 256 * 1024, 128, RD_FULL, WR_QPP}, {"S25FL256S_64K", 0x010219, 0x4d01, 64 * 1024, 512, RD_FULL, WR_QPP}, + {"S25FS512S", 0x010220, 0x4D00, 128 * 1024, 512, RD_FULL, WR_QPP}, {"S25FL512S_256K", 0x010220, 0x4d00, 256 * 1024, 256, RD_FULL, WR_QPP}, {"S25FL512S_64K", 0x010220, 0x4d01, 64 * 1024, 1024, RD_FULL, WR_QPP}, {"S25FL512S_512K", 0x010220, 0x4f00, 256 * 1024, 256, RD_FULL, WR_QPP}, diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index fa0e799..64d4e0f 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -1072,7 +1072,8 @@ int spi_flash_scan(struct spi_flash *flash) * sector that is not overlaid by the parameter sectors. * The uniform sector erase command has no effect on parameter sectors. */ - if (jedec == 0x0219 && (ext_jedec & 0xff00) == 0x4d00) { + if ((jedec == 0x0219 || (jedec == 0x0220)) && + (ext_jedec & 0xff00) == 0x4d00) { int ret; u8 id[6]; @@ -1146,7 +1147,7 @@ int spi_flash_scan(struct spi_flash *flash) * have 256b pages. */ if (ext_jedec == 0x4d00) { - if ((jedec == 0x0215) || (jedec == 0x216)) + if ((jedec == 0x0215) || (jedec == 0x216) || (jedec == 0x220)) flash->page_size = 256; else flash->page_size = 512; diff --git a/drivers/pci/pcie_layerscape.c b/drivers/pci/pcie_layerscape.c index 0ba960e..2e6b986 100644 --- a/drivers/pci/pcie_layerscape.c +++ b/drivers/pci/pcie_layerscape.c @@ -569,7 +569,7 @@ static void fdt_fixup_pcie(void *blob) unsigned char header_type; int index; u32 streamid; - pci_dev_t dev; + pci_dev_t dev, bdf; int bus; unsigned short id; struct pci_controller *hose; @@ -611,12 +611,15 @@ static void fdt_fixup_pcie(void *blob) continue; } + /* the DT fixup must be relative to the hose first_busno */ + bdf = dev - PCI_BDF(hose->first_busno, 0, 0); + /* map PCI b.d.f to streamID in LUT */ - ls_pcie_lut_set_mapping(pcie, index, dev >> 8, + ls_pcie_lut_set_mapping(pcie, index, bdf >> 8, streamid); /* update msi-map in device tree */ - fdt_pcie_set_msi_map_entry(blob, pcie, dev >> 8, + fdt_pcie_set_msi_map_entry(blob, pcie, bdf >> 8, streamid); } } |