summaryrefslogtreecommitdiff
path: root/include/asm-arm/arch-at91/gpio.h
diff options
context:
space:
mode:
authorJens Scharsig <js_at_ng@scharsoft.de>2010-02-03 21:46:16 (GMT)
committerTom Rix <Tom.Rix@windriver.com>2010-02-12 18:31:54 (GMT)
commitea8fbba73184a40437bdeccd888cf448d5f1105e (patch)
treedc0c802fc211dde3a13eed77576e9b72617f4e27 /include/asm-arm/arch-at91/gpio.h
parent5d8e359c38d3ab80015e47d0cab792efe75cacf9 (diff)
downloadu-boot-fsl-qoriq-ea8fbba73184a40437bdeccd888cf448d5f1105e.tar.xz
add a new AT91 GPIO driver
* add a real AT91 GPIO driver instead of header inline code * resolve the mixing of port and pins * change board config files to use new driver * add macros to gpio to realize backward compatibility Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
Diffstat (limited to 'include/asm-arm/arch-at91/gpio.h')
-rw-r--r--include/asm-arm/arch-at91/gpio.h168
1 files changed, 18 insertions, 150 deletions
diff --git a/include/asm-arm/arch-at91/gpio.h b/include/asm-arm/arch-at91/gpio.h
index bc53171..716f81f 100644
--- a/include/asm-arm/arch-at91/gpio.h
+++ b/include/asm-arm/arch-at91/gpio.h
@@ -216,155 +216,23 @@ static inline unsigned pin_to_mask(unsigned pin)
return 1 << (pin % 32);
}
-/*
- * mux the pin to the "GPIO" peripheral role.
- */
-static inline int at91_set_GPIO_periph(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_PER);
- return 0;
-}
-
-/*
- * mux the pin to the "A" internal peripheral role.
- */
-static inline int at91_set_A_periph(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_ASR);
- __raw_writel(mask, pio + PIO_PDR);
- return 0;
-}
-
-/*
- * mux the pin to the "B" internal peripheral role.
- */
-static inline int at91_set_B_periph(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_BSR);
- __raw_writel(mask, pio + PIO_PDR);
- return 0;
-}
-
-/*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
- * configure it for an input.
- */
-static inline int at91_set_gpio_input(unsigned pin, int use_pullup)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + (use_pullup ? PIO_PUER : PIO_PUDR));
- __raw_writel(mask, pio + PIO_ODR);
- __raw_writel(mask, pio + PIO_PER);
- return 0;
-}
-
-/*
- * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
- * and configure it for an output.
- */
-static inline int at91_set_gpio_output(unsigned pin, int value)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + PIO_IDR);
- __raw_writel(mask, pio + PIO_PUDR);
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- __raw_writel(mask, pio + PIO_OER);
- __raw_writel(mask, pio + PIO_PER);
- return 0;
-}
-
-/*
- * enable/disable the glitch filter; mostly used with IRQ handling.
- */
-static inline int at91_set_deglitch(unsigned pin, int is_on)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + (is_on ? PIO_IFER : PIO_IFDR));
- return 0;
-}
-
-/*
- * enable/disable the multi-driver; This is only valid for output and
- * allows the output pin to run as an open collector output.
- */
-static inline int at91_set_multi_drive(unsigned pin, int is_on)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + (is_on ? PIO_MDER : PIO_MDDR));
- return 0;
-}
-
-static inline int gpio_direction_input(unsigned pin)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- if (!(__raw_readl(pio + PIO_PSR) & mask))
- return -EINVAL;
- __raw_writel(mask, pio + PIO_ODR);
- return 0;
-}
-
-static inline int gpio_direction_output(unsigned pin, int value)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- if (!(__raw_readl(pio + PIO_PSR) & mask))
- return -EINVAL;
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- __raw_writel(mask, pio + PIO_OER);
- return 0;
-}
-
-/*
- * assuming the pin is muxed as a gpio output, set its value.
- */
-static inline int at91_set_gpio_value(unsigned pin, int value)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
-
- __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
- return 0;
-}
-
-/*
- * read the pin's value (works even if it's not muxed as a gpio).
- */
-static inline int at91_get_gpio_value(unsigned pin)
-{
- void *pio = pin_to_controller(pin);
- unsigned mask = pin_to_mask(pin);
- u32 pdsr;
-
- pdsr = __raw_readl(pio + PIO_PDSR);
- return (pdsr & mask) != 0;
-}
-
+/* The following macros are need for backward compatibility */
+#define at91_set_GPIO_periph(x, y) \
+ at91_set_gpio_periph((x - PIN_BASE) / 32,(x % 32), y)
+#define at91_set_A_periph(x, y) \
+ at91_set_a_periph((x - PIN_BASE) / 32,(x % 32), y)
+#define at91_set_B_periph(x, y) \
+ at91_set_b_periph((x - PIN_BASE) / 32,(x % 32), y)
+#define at91_set_gpio_output(x, y) \
+ at91_set_pio_output((x - PIN_BASE) / 32,(x % 32), y)
+#define at91_set_gpio_input(x, y) \
+ at91_set_pio_input((x - PIN_BASE) / 32,(x % 32), y)
+#define at91_set_gpio_value(x, y) \
+ at91_set_pio_value((x - PIN_BASE) / 32,(x % 32), y)
+#define at91_get_gpio_value(x) \
+ at91_get_pio_value((x - PIN_BASE) / 32,(x % 32))
+#else
+#define at91_set_gpio_value(x, y) at91_set_pio_value(x, y)
+#define at91_get_gpio_value(x) at91_get_pio_value(x)
#endif
#endif