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| author | Becky Bruce <becky.bruce@freescale.com> | 2008-05-09 00:02:12 (GMT) |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-06-03 15:48:41 (GMT) |
| commit | 31d826722434931e1152a09d140187dcf72f8aac (patch) | |
| tree | 374f0cae200f233bb5e68efb784991f4d232ab70 /include/configs/MPC8315ERDB.h | |
| parent | 912810eeca90eedd1503f5e883f3a8da39d7ff89 (diff) | |
| download | u-boot-fsl-qoriq-31d826722434931e1152a09d140187dcf72f8aac.tar.xz | |
PPC: Create and use CONFIG_HIGH_BATS
Change all code that conditionally operates on high bat
registers (that is, BATs 4-7) to look at CONFIG_HIGH_BATS
instead of the myriad ways this is done now. Define the option
for every config for which high bats are supported (and
enabled by early boot, on parts where they're not always
enabled)
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Diffstat (limited to 'include/configs/MPC8315ERDB.h')
| -rw-r--r-- | include/configs/MPC8315ERDB.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/configs/MPC8315ERDB.h b/include/configs/MPC8315ERDB.h index e0a887c..7a5d0aa 100644 --- a/include/configs/MPC8315ERDB.h +++ b/include/configs/MPC8315ERDB.h @@ -453,6 +453,7 @@ /* * MMU Setup */ +#define CONFIG_HIGH_BATS 1 /* High BATs supported */ /* DDR: cache cacheable */ #define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE) |