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authorNishanth Menon <nm@ti.com>2016-11-23 07:55:26 (GMT)
committerTom Rini <trini@konsulko.com>2016-12-04 18:54:50 (GMT)
commit4596cf98cde13d09310eb0cb2a4c1e11c9f2279a (patch)
tree882a3d4a5ef53302e031fc980f8bd21d132aac86 /include/mpc8xx.h
parent4d74804818210cd4140fbd1de542b35581ac6418 (diff)
downloadu-boot-fsl-qoriq-4596cf98cde13d09310eb0cb2a4c1e11c9f2279a.tar.xz
board: ti: dra72: Introduce optimization for rgmii timing for rev C
Rev C version of EVM does require IODelay to be configured for RGMII pins in MANUAL_1 configuration. Update the same based on PG2.0 initial simulation values. Data based on PCT_DRA72x_SR2.0_SR1.0_v1.3.0.7 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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