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author | Wolfgang Denk <wd@denx.de> | 2009-08-25 10:22:38 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2009-08-25 10:22:38 (GMT) |
commit | 30fc5cd3116cb112d0aab7e6d7c8eef1b67ed075 (patch) | |
tree | d10ca5583775be5685803136752a9e73b11c414d /include/s3c24x0.h | |
parent | a794f59a75bf9fd4a44f1ad2349cae903c42b89c (diff) | |
download | u-boot-fsl-qoriq-30fc5cd3116cb112d0aab7e6d7c8eef1b67ed075.tar.xz |
include/s3c24x0.h: fix S3C24X0_SPI_CHANNEL declaration
The SPI controller on the S3C24X0 has 8 bit registers, not 32 bit.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include/s3c24x0.h')
-rw-r--r-- | include/s3c24x0.h | 22 |
1 files changed, 14 insertions, 8 deletions
diff --git a/include/s3c24x0.h b/include/s3c24x0.h index 71f35a5..4fa8000 100644 --- a/include/s3c24x0.h +++ b/include/s3c24x0.h @@ -550,14 +550,20 @@ typedef struct { /* SPI (see manual chapter 22) */ typedef struct { - S3C24X0_REG32 SPCON; - S3C24X0_REG32 SPSTA; - S3C24X0_REG32 SPPIN; - S3C24X0_REG32 SPPRE; - S3C24X0_REG32 SPTDAT; - S3C24X0_REG32 SPRDAT; - S3C24X0_REG32 res[2]; -} __attribute__((__packed__)) S3C24X0_SPI_CHANNEL; + S3C24X0_REG8 SPCON; + S3C24X0_REG8 res1[3]; + S3C24X0_REG8 SPSTA; + S3C24X0_REG8 res2[3]; + S3C24X0_REG8 SPPIN; + S3C24X0_REG8 res3[3]; + S3C24X0_REG8 SPPRE; + S3C24X0_REG8 res4[3]; + S3C24X0_REG8 SPTDAT; + S3C24X0_REG8 res5[3]; + S3C24X0_REG8 SPRDAT; + S3C24X0_REG8 res6[3]; + S3C24X0_REG8 res7[16]; +} /*__attribute__((__packed__))*/ S3C24X0_SPI_CHANNEL; typedef struct { S3C24X0_SPI_CHANNEL ch[S3C24X0_SPI_CHANNELS]; |