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author | Wolfgang Denk <wd@denx.de> | 2010-02-03 19:03:46 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2010-02-03 19:03:46 (GMT) |
commit | 0ae016f1ff6b06e94db52373efd08d106bfcecdf (patch) | |
tree | b0ad230adfa839a5829fb7e4083c8706e594b2f6 /include | |
parent | d0750bc9e5932baf4c90eda2456106f21a26bdc1 (diff) | |
parent | a6e42ed097220a82870a32f4e60ac8863a8b05ab (diff) | |
download | u-boot-fsl-qoriq-0ae016f1ff6b06e94db52373efd08d106bfcecdf.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-video
Diffstat (limited to 'include')
-rw-r--r-- | include/amba_clcd.h | 77 | ||||
-rw-r--r-- | include/nomadik.h | 1 |
2 files changed, 78 insertions, 0 deletions
diff --git a/include/amba_clcd.h b/include/amba_clcd.h new file mode 100644 index 0000000..db80517 --- /dev/null +++ b/include/amba_clcd.h @@ -0,0 +1,77 @@ +/* + * Register definitions for the AMBA CLCD logic cell. + * + * derived from David A Rusling, although rearranged as a C structure + * linux/include/asm-arm/hardware/amba_clcd.h -- Integrator LCD panel. + * + * Copyright (C) 2001 ARM Limited + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file COPYING in the main directory of this archive + * for more details. + */ + +/* + * CLCD Controller Internal Register addresses + */ +struct clcd_registers { + u32 tim0; /* 0x00 */ + u32 tim1; + u32 tim2; + u32 tim3; + u32 ubas; /* 0x10 */ + u32 lbas; +#if !defined(CONFIG_ARCH_VERSATILE) && !defined(CONFIG_ARCH_REALVIEW) + u32 ienb; + u32 cntl; +#else /* Someone rearranged these two registers on the Versatile */ + u32 cntl; + u32 ienb; +#endif + u32 stat; /* 0x20 */ + u32 intr; + u32 ucur; + u32 lcur; + u32 unused[0x74]; /* 0x030..0x1ff */ + u32 palette[0x80]; /* 0x200..0x3ff */ +}; + +/* Bit definition for TIM2 */ +#define TIM2_CLKSEL (1 << 5) +#define TIM2_IVS (1 << 11) +#define TIM2_IHS (1 << 12) +#define TIM2_IPC (1 << 13) +#define TIM2_IOE (1 << 14) +#define TIM2_BCD (1 << 26) + +/* Bit definitions for control register */ +#define CNTL_LCDEN (1 << 0) +#define CNTL_LCDBPP1 (0 << 1) +#define CNTL_LCDBPP2 (1 << 1) +#define CNTL_LCDBPP4 (2 << 1) +#define CNTL_LCDBPP8 (3 << 1) +#define CNTL_LCDBPP16 (4 << 1) +#define CNTL_LCDBPP16_565 (6 << 1) +#define CNTL_LCDBPP24 (5 << 1) +#define CNTL_LCDBW (1 << 4) +#define CNTL_LCDTFT (1 << 5) +#define CNTL_LCDMONO8 (1 << 6) +#define CNTL_LCDDUAL (1 << 7) +#define CNTL_BGR (1 << 8) +#define CNTL_BEBO (1 << 9) +#define CNTL_BEPO (1 << 10) +#define CNTL_LCDPWR (1 << 11) +#define CNTL_LCDVCOMP(x) ((x) << 12) +#define CNTL_LDMAFIFOTIME (1 << 15) +#define CNTL_WATERMARK (1 << 16) + +/* u-boot specific: information passed by the board file */ +struct clcd_config { + struct clcd_registers *address; + u32 tim0; + u32 tim1; + u32 tim2; + u32 tim3; + u32 cntl; + unsigned long pixclock; +}; diff --git a/include/nomadik.h b/include/nomadik.h index d9405fd..ea65b2d 100644 --- a/include/nomadik.h +++ b/include/nomadik.h @@ -4,6 +4,7 @@ #define __NOMADIK_H__ /* Base addresses of our peripherals */ +#define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */ #define NOMADIK_SRC_BASE 0x101E0000 /* System and Reset Cnt */ #define NOMADIK_PMU_BASE 0x101E9000 /* Power Management Unit */ #define NOMADIK_MPMC_BASE 0x10110000 /* SDRAM Controller */ |