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| author | Joris van Vossen <joris.van.vossen@sintecs.nl> | 2020-01-17 09:24:44 (GMT) |
|---|---|---|
| committer | Joris van Vossen <joris.van.vossen@sintecs.nl> | 2020-01-17 12:39:03 (GMT) |
| commit | 2d09eb46306dc029c7b25f3bdd1b705f9b92353c (patch) | |
| tree | 362e2605ddc6782719c3787e84e9833b876694a5 /include | |
| parent | c9b89a4f8b11463e3bd8587a05ae0955e2e86c2a (diff) | |
| download | u-boot-fsl-qoriq-2d09eb46306dc029c7b25f3bdd1b705f9b92353c.tar.xz | |
Moved SERDES lane multiplexing configuration before PCIe initialization.
Clean-up of ddr related code and fixed a buffer overflow.
Made M speedgrade default and added support for P speedgrade with through Kconfig.
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/simc-t10xx.h | 65 |
1 files changed, 33 insertions, 32 deletions
diff --git a/include/configs/simc-t10xx.h b/include/configs/simc-t10xx.h index 31a1189..e02d4ab 100644 --- a/include/configs/simc-t10xx.h +++ b/include/configs/simc-t10xx.h @@ -60,39 +60,40 @@ #endif /* Set the RCW config depending on the CPU type */ -#if ( defined(CONFIG_PPC_T1022) || defined(CONFIG_PPC_T1042)) && \ - defined(CONFIG_SECURE_BOOT) && defined(CONFIG_NAND_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x2_nand_secure_rcw.cfg -#elif ( defined(CONFIG_PPC_T1022) || defined(CONFIG_PPC_T1042)) && \ - defined(CONFIG_SECURE_BOOT) && defined(CONFIG_NOR_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x2_nor_secure_rcw.cfg -#elif ( defined(CONFIG_PPC_T1022) || defined(CONFIG_PPC_T1042)) && \ - defined(CONFIG_NAND_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x2_nand_rcw.cfg -#elif ( defined(CONFIG_PPC_T1022) || defined(CONFIG_PPC_T1042)) && \ - defined(CONFIG_NOR_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x2_nor_rcw.cfg -#elif ( defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1040)) && \ - defined(CONFIG_SECURE_BOOT) && defined(CONFIG_NAND_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_nand_secure_rcw.cfg -#elif ( defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1040)) && \ - defined(CONFIG_SECURE_BOOT) && defined(CONFIG_NOR_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_nor_secure_rcw.cfg -#elif ( defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1040)) && \ - defined(CONFIG_NAND_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_nand_rcw.cfg -#elif ( defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1040)) && \ - defined(CONFIG_NOR_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_nor_rcw.cfg -#elif ( defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1040)) && \ - defined(CONFIG_SPI_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_spi_rcw.cfg -#elif ( defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1040)) && \ - defined(CONFIG_SDHC_FLASH_BOOT) -#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_sdhc_rcw.cfg -#else +#if (defined(CONFIG_PPC_T1022) || defined(CONFIG_PPC_T1042)) + /* TODO */ +#elif (defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1040)) + #if defined(CONFIG_T10X0_M_SPEEDGRADE) + #if (defined(CONFIG_SECURE_BOOT) && defined(CONFIG_NAND_FLASH_BOOT)) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_m_nand_secure_rcw.cfg + #elif defined(CONFIG_NAND_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_m_nand_rcw.cfg + #elif defined(CONFIG_NOR_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_m_nor_rcw.cfg + #elif defined(CONFIG_SPI_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_m_spi_rcw.cfg + #elif defined(CONFIG_SDHC_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_m_sdhc_rcw.cfg + #endif + #elif defined(CONFIG_T10X0_P_SPEEDGRADE) + #if (defined(CONFIG_SECURE_BOOT) && defined(CONFIG_NAND_FLASH_BOOT)) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_p_nand_secure_rcw.cfg + #elif defined(CONFIG_NAND_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_p_nand_rcw.cfg + #elif defined(CONFIG_NOR_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_p_nor_rcw.cfg + #elif defined(CONFIG_SPI_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_p_spi_rcw.cfg + #elif defined(CONFIG_SDHC_FLASH_BOOT) + #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/scalys/simc-t10xx/simc-t10x0_p_sdhc_rcw.cfg + #endif + #elif defined(CONFIG_T10X0_W_SPEEDGRADE) + #endif +#endif + +#ifndef CONFIG_SYS_FSL_PBL_RCW /* unknown configuration, this should not happen */ -#error Invalid Boot configuration +#error Invalid or unsupported Boot configuration #endif #if 0 |