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authorSimon Glass <sjg@chromium.org>2013-03-11 06:08:08 (GMT)
committerSimon Glass <sjg@chromium.org>2013-03-19 15:45:37 (GMT)
commitbb8215f437a7c948eec82a6abe754c226978bd6d (patch)
tree8e03252d3317225986dee7d9e58ee4dd32123d9f /include
parent5e6fb69778fa41e685add00b73ed5f22c7a96166 (diff)
downloadu-boot-fsl-qoriq-bb8215f437a7c948eec82a6abe754c226978bd6d.tar.xz
sf: Enable FDT-based configuration and memory mapping
Enable device tree control of SPI flash, and use this to implement memory-mapped SPI flash, which is supported on Intel chips. Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'include')
-rw-r--r--include/fdtdec.h1
-rw-r--r--include/spi_flash.h1
2 files changed, 2 insertions, 0 deletions
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 5ca84a0..3b363be 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -86,6 +86,7 @@ enum fdt_compat_id {
COMPAT_SAMSUNG_EXYNOS_EHCI, /* Exynos EHCI controller */
COMPAT_SAMSUNG_EXYNOS_USB_PHY, /* Exynos phy controller for usb2.0 */
COMPAT_MAXIM_MAX77686_PMIC, /* MAX77686 PMIC */
+ COMPAT_GENERIC_SPI_FLASH, /* Generic SPI Flash chip */
COMPAT_COUNT,
};
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 030d49c..3b6a44e 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -39,6 +39,7 @@ struct spi_flash {
/* Erase (sector) size */
u32 sector_size;
+ void *memory_map; /* Address of read-only SPI flash access */
int (*read)(struct spi_flash *flash, u32 offset,
size_t len, void *buf);
int (*write)(struct spi_flash *flash, u32 offset,