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authorYork Sun <yorksun@freescale.com>2011-06-27 20:35:25 (GMT)
committerKumar Gala <galak@kernel.crashing.org>2011-07-11 18:24:20 (GMT)
commit4c99cb9190358e11ad96ba95b38d1e83cc053b46 (patch)
treecccb23d6a1c90aaa2dc6aa8a654fae14345b8779 /nand_spl/board
parentf2d264b6603239d6d214c4e2faf17dde64cf81e2 (diff)
downloadu-boot-fsl-qoriq-4c99cb9190358e11ad96ba95b38d1e83cc053b46.tar.xz
powerpc/mpc8xxx: fix DDR data width checking
Checking width before setting DDR controller. SPD for DDR1 and DDR2 has data width and primary sdram width. The latter one has different meaning for DDR3. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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