summaryrefslogtreecommitdiff
path: root/nand_spl
diff options
context:
space:
mode:
authorNick Spence <nick.spence@freescale.com>2008-08-23 06:52:50 (GMT)
committerKim Phillips <kim.phillips@freescale.com>2008-09-03 21:06:46 (GMT)
commitd9fe88173cb4f7d293796ffe10c7a0d3d426d8f9 (patch)
tree1e41ed69bee55104040500de9cbfd8f86bc896c6 /nand_spl
parent628ffd73bcff0c9f3bc5a8eeb2c7455fe9d28a51 (diff)
downloadu-boot-fsl-qoriq-d9fe88173cb4f7d293796ffe10c7a0d3d426d8f9.tar.xz
MPC83XX: Fix GPIO configuration - set gpio level before direction
Set DAT value before DIR values to avoid creating glitches on the GPIO signals. Set gpio level register before direction register to inhibit glitches on high level output pins. Dir and data gets cleared at powerup, so high level output lines see a short low pulse between setting the direction and level registers. Issue was seen on a new board with the nReset line of the NOR flash connected to a GPIO. Setting the direction register puts the NOR flash in reset so the next instruction to set the level cannot get executed. Signed-off-by: Nick Spence <nick.spence@freescale.com> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'nand_spl')
0 files changed, 0 insertions, 0 deletions