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authorLarry Johnson <lrj@acm.org>2008-01-15 19:35:58 (GMT)
committerStefan Roese <sr@denx.de>2008-01-16 10:23:33 (GMT)
commit4b3cc6ece9c455504cf12909fae38d085d848ac0 (patch)
tree821cbdba0370de08d9af2bfe6b63f5f58fe4097f /post/cpu/mpc8xx/spr.c
parent8d99cd0691b7094ea1e2bf5309b0877047a9f375 (diff)
downloadu-boot-fsl-qoriq-4b3cc6ece9c455504cf12909fae38d085d848ac0.tar.xz
ppc4xx: Refactor ECC POST for AMCC Denali core
The ECC POST reported intermittent failures running after power-up on the Korat PPC440EPx board. Even when the test passed, the debugging output occasionally reported additional unexpected ECC errors. This refactoring has three main objectives: (1) minimize the code executed with ECC enabled during the tests, (2) add more checking of the results so any unexpected ECC errors would cause the test to fail, and (3) use synchronization (only) where required by the processor. Signed-off-by: Larry Johnson <lrj@acm.org>
Diffstat (limited to 'post/cpu/mpc8xx/spr.c')
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