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| author | Minghuan Lian <Minghuan.Lian@freescale.com> | 2012-08-21 23:35:42 (GMT) |
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2012-10-22 08:03:16 (GMT) |
| commit | 505f3e6f2e0e90b78dec065e64ad57c5d8741b04 (patch) | |
| tree | 0d3254dd8c9731b8f6513baae76229c295377e58 /spl | |
| parent | 99070db0dc0b0e881841a0091f06d53351244a34 (diff) | |
| download | u-boot-fsl-qoriq-505f3e6f2e0e90b78dec065e64ad57c5d8741b04.tar.xz | |
fsl_pci: use 'Header Type' field to judge PCIE mode
The original code uses 'Programming Interface' field to judge if PCIE is
EP or RC mode, however, T4240 does not support this functionality.
According to PCIE specification, 'Header Type' offset 0x0e is used to
indicate header type, so for PCIE controller, the patch changes code to
use 'Header Type' field to identify if the PCIE is EP or RC mode.
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Diffstat (limited to 'spl')
0 files changed, 0 insertions, 0 deletions