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authorRoger Quadros <rogerq@ti.com>2016-05-23 14:37:49 (GMT)
committerTom Rini <trini@konsulko.com>2016-06-03 01:42:15 (GMT)
commit3599774eec9d06812c6124bcd0b34cebd7ec5e1c (patch)
tree475a278e6688afecece9a97d0d748f1c33d927b7 /test/env
parent55efadde7edee407a14c7cbf418c82b30a94faa8 (diff)
downloadu-boot-fsl-qoriq-3599774eec9d06812c6124bcd0b34cebd7ec5e1c.tar.xz
dra7xx: Enable USB_PHY3 32KHz clock
DRA7xx has a 32KHz PHY clock for USB_PHY3 that must be enabled for USB1 instance in Super-Speed. Signed-off-by: Roger Quadros <rogerq@ti.com>
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