diff options
377 files changed, 4010 insertions, 904 deletions
@@ -936,8 +936,19 @@ u-boot.sha1: u-boot.bin u-boot.dis: u-boot $(OBJDUMP) -d $< > $@ +# If .u-boot.cfg.d is still present, then either: +# a) The previous build used a Makefile that used if_changed rather than +# if_changed_dep when building u-boot.cfg, and hence any later builds will +# be unaware of the dependencies for u-boot.cfg. In this case, we must +# delete u-boot.cfg to force it and .u-boot.cfg.cmd to be rebuilt the +# correct way. +# b) The previous build failed or was interrupted while building u-boot.cfg, +# so deleting u-boot.cfg isn't going to cause any additional work. +ifneq ($(wildcard $(obj)/.u-boot.cfg.d),) + unused := $(shell rm -f $(obj)/u-boot.cfg) +endif u-boot.cfg: include/config.h FORCE - $(call if_changed,cpp_cfg) + $(call if_changed_dep,cpp_cfg) # Check that this build does not use CONFIG options that we don't know about # unless they are in Kconfig. All the existing CONFIG options are whitelisted, diff --git a/arch/arm/cpu/armv8/zynqmp/Kconfig b/arch/arm/cpu/armv8/zynqmp/Kconfig index e703991..1eedb39 100644 --- a/arch/arm/cpu/armv8/zynqmp/Kconfig +++ b/arch/arm/cpu/armv8/zynqmp/Kconfig @@ -47,5 +47,53 @@ config ZYNQMP_USB config SYS_MALLOC_F_LEN default 0x600 +config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED + bool "Overwrite SPL bootmode" + depends on SPL + help + Overwrite bootmode selected via boot mode pins to tell SPL what should + be the next boot device. + +config SPL_ZYNQMP_ALT_BOOTMODE + hex + default 0x0 if JTAG_MODE + default 0x1 if QSPI_MODE_24BIT + default 0x2 if QSPI_MODE_32BIT + default 0x3 if SD_MODE + default 0x4 if NAND_MODE + default 0x5 if SD_MODE1 + default 0x6 if EMMC_MODE + default 0x7 if USB_MODE + +choice + prompt "Boot mode" + depends on ZYNQMP_ALT_BOOTMODE_ENABLED + default JTAG + +config JTAG_MODE + bool "JTAG_MODE" + +config QSPI_MODE_24BIT + bool "QSPI_MODE_24BIT" + +config QSPI_MODE_32BIT + bool "QSPI_MODE_32BIT" + +config SD_MODE + bool "SD_MODE" + +config SD_MODE1 + bool "SD_MODE1" + +config NAND_MODE + bool "NAND_MODE" + +config EMMC_MODE + bool "EMMC_MODE" + +config USB_MODE + bool "USB" + +endchoice endif diff --git a/arch/arm/cpu/armv8/zynqmp/spl.c b/arch/arm/cpu/armv8/zynqmp/spl.c index 867d2b2..04e1905 100644 --- a/arch/arm/cpu/armv8/zynqmp/spl.c +++ b/arch/arm/cpu/armv8/zynqmp/spl.c @@ -35,10 +35,29 @@ void board_init_f(ulong dummy) board_init_r(NULL, 0); } +static void ps_mode_reset(ulong mode) +{ + writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT, + &crlapb_base->boot_pin_ctrl); + udelay(5); + writel(mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT | + mode << ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT, + &crlapb_base->boot_pin_ctrl); +} + +/* + * Set default PS_MODE1 which is used for USB ULPI phy reset + * Also other resets can be connected to this certain pin + */ +#ifndef MODE_RESET +# define MODE_RESET PS_MODE1 +#endif + #ifdef CONFIG_SPL_BOARD_INIT void spl_board_init(void) { preloader_console_init(); + ps_mode_reset(MODE_RESET); board_init(); } #endif @@ -48,6 +67,13 @@ u32 spl_boot_device(void) u32 reg = 0; u8 bootmode; +#if defined(CONFIG_SPL_ZYNQMP_ALT_BOOTMODE_ENABLED) + /* Change default boot mode at run-time */ + writel(BOOT_MODE_USE_ALT | + CONFIG_SPL_ZYNQMP_ALT_BOOTMODE << BOOT_MODE_ALT_SHIFT, + &crlapb_base->boot_mode); +#endif + reg = readl(&crlapb_base->boot_mode); bootmode = reg & BOOT_MODES_MASK; @@ -60,6 +86,10 @@ u32 spl_boot_device(void) case SD_MODE1: return BOOT_DEVICE_MMC1; #endif +#ifdef CONFIG_SPL_DFU_SUPPORT + case USB_MODE: + return BOOT_DEVICE_DFU; +#endif default: printf("Invalid Boot Mode:0x%x\n", bootmode); break; diff --git a/arch/arm/include/asm/arch-zynqmp/hardware.h b/arch/arm/include/asm/arch-zynqmp/hardware.h index 35964d6..456c1b0 100644 --- a/arch/arm/include/asm/arch-zynqmp/hardware.h +++ b/arch/arm/include/asm/arch-zynqmp/hardware.h @@ -25,6 +25,13 @@ #define ZYNQMP_CRL_APB_BASEADDR 0xFF5E0000 #define ZYNQMP_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT 0x1000000 +#define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_EN_SHIFT 0 +#define ZYNQMP_CRL_APB_BOOT_PIN_CTRL_OUT_VAL_SHIFT 8 + +#define PS_MODE0 BIT(0) +#define PS_MODE1 BIT(1) +#define PS_MODE2 BIT(2) +#define PS_MODE3 BIT(3) struct crlapb_regs { u32 reserved0[36]; @@ -35,7 +42,9 @@ struct crlapb_regs { u32 boot_mode; /* 0x200 */ u32 reserved3[14]; u32 rst_lpd_top; /* 0x23C */ - u32 reserved4[26]; + u32 reserved4[4]; + u32 boot_pin_ctrl; /* 0x250 */ + u32 reserved5[21]; }; #define crlapb_base ((struct crlapb_regs *)ZYNQMP_CRL_APB_BASEADDR) @@ -69,7 +78,10 @@ struct iou_scntr_secure { #define SD_MODE1 0x00000005 /* sd 1 */ #define NAND_MODE 0x00000004 #define EMMC_MODE 0x00000006 +#define USB_MODE 0x00000007 #define JTAG_MODE 0x00000000 +#define BOOT_MODE_USE_ALT 0x100 +#define BOOT_MODE_ALT_SHIFT 12 #define ZYNQMP_IOU_SLCR_BASEADDR 0xFF180000 diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index 19c38f4..6f312d6 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -28,6 +28,7 @@ enum { BOOT_DEVICE_SATA, BOOT_DEVICE_I2C, BOOT_DEVICE_BOARD, + BOOT_DEVICE_DFU, BOOT_DEVICE_NONE }; #endif diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S index b5d51bd..1bd914e 100644 --- a/arch/m68k/cpu/mcf5227x/start.S +++ b/arch/m68k/cpu/mcf5227x/start.S @@ -10,10 +10,6 @@ #include "version.h" #include <asm/cache.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define _START _start #define _FAULT _fault diff --git a/arch/m68k/cpu/mcf523x/start.S b/arch/m68k/cpu/mcf523x/start.S index c4f6082..8533108 100644 --- a/arch/m68k/cpu/mcf523x/start.S +++ b/arch/m68k/cpu/mcf523x/start.S @@ -10,10 +10,6 @@ #include "version.h" #include <asm/cache.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define _START _start #define _FAULT _fault diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S index 9837c41..ab199b1 100644 --- a/arch/m68k/cpu/mcf52x2/start.S +++ b/arch/m68k/cpu/mcf52x2/start.S @@ -10,10 +10,6 @@ #include "version.h" #include <asm/cache.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define _START _start #define _FAULT _fault diff --git a/arch/m68k/cpu/mcf530x/start.S b/arch/m68k/cpu/mcf530x/start.S index da41c9a..536daa4 100644 --- a/arch/m68k/cpu/mcf530x/start.S +++ b/arch/m68k/cpu/mcf530x/start.S @@ -10,10 +10,6 @@ #include "version.h" #include <asm/cache.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define _START _start #define _FAULT _fault diff --git a/arch/m68k/cpu/mcf532x/start.S b/arch/m68k/cpu/mcf532x/start.S index 302fca5..4678643 100644 --- a/arch/m68k/cpu/mcf532x/start.S +++ b/arch/m68k/cpu/mcf532x/start.S @@ -13,10 +13,6 @@ #include "version.h" #include <asm/cache.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define _START _start #define _FAULT _fault diff --git a/arch/m68k/cpu/mcf5445x/start.S b/arch/m68k/cpu/mcf5445x/start.S index bc48ca0..0487d84 100644 --- a/arch/m68k/cpu/mcf5445x/start.S +++ b/arch/m68k/cpu/mcf5445x/start.S @@ -15,10 +15,6 @@ #include "version.h" #include <asm/cache.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define _START _start #define _FAULT _fault diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S index fecf253..2296f9a 100644 --- a/arch/m68k/cpu/mcf547x_8x/start.S +++ b/arch/m68k/cpu/mcf547x_8x/start.S @@ -10,10 +10,6 @@ #include "version.h" #include <asm/cache.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define _START _start #define _FAULT _fault diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 21066f0..097ad58 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -26,6 +26,8 @@ config TARGET_MALTA select DM select DM_SERIAL select DYNAMIC_IO_PORT_BASE + select MIPS_CM + select MIPS_L2_CACHE select OF_CONTROL select OF_ISA_BUS select SUPPORTS_BIG_ENDIAN @@ -73,10 +75,43 @@ config MACH_PIC32 select OF_CONTROL select DM +config TARGET_BOSTON + bool "Support Boston" + select DM + select DM_SERIAL + select OF_CONTROL + select MIPS_CM + select MIPS_L1_CACHE_SHIFT_6 + select MIPS_L2_CACHE + select SUPPORTS_BIG_ENDIAN + select SUPPORTS_LITTLE_ENDIAN + select SUPPORTS_CPU_MIPS32_R1 + select SUPPORTS_CPU_MIPS32_R2 + select SUPPORTS_CPU_MIPS32_R6 + select SUPPORTS_CPU_MIPS64_R1 + select SUPPORTS_CPU_MIPS64_R2 + select SUPPORTS_CPU_MIPS64_R6 + +config TARGET_XILFPGA + bool "Support Imagination Xilfpga" + select OF_CONTROL + select DM + select DM_SERIAL + select DM_GPIO + select DM_ETH + select SUPPORTS_LITTLE_ENDIAN + select SUPPORTS_CPU_MIPS32_R1 + select SUPPORTS_CPU_MIPS32_R2 + select MIPS_L1_CACHE_SHIFT_4 + help + This supports IMGTEC MIPSfpga platform + endchoice source "board/dbau1x00/Kconfig" +source "board/imgtec/boston/Kconfig" source "board/imgtec/malta/Kconfig" +source "board/imgtec/xilfpga/Kconfig" source "board/micronas/vct/Kconfig" source "board/pb1x00/Kconfig" source "board/qemu-mips/Kconfig" @@ -300,9 +335,31 @@ config MIPS_L1_CACHE_SHIFT default "4" if MIPS_L1_CACHE_SHIFT_4 default "5" +config MIPS_L2_CACHE + bool + help + Select this if your system includes an L2 cache and you want U-Boot + to initialise & maintain it. + config DYNAMIC_IO_PORT_BASE bool +config MIPS_CM + bool + help + Select this if your system contains a MIPS Coherence Manager and you + wish U-Boot to configure it or make use of it to retrieve system + information such as cache configuration. + +config MIPS_CM_BASE + hex + default 0x1fbf8000 + help + The physical base address at which to map the MIPS Coherence Manager + Global Configuration Registers (GCRs). This should be set such that + the GCRs occupy a region of the physical address space which is + otherwise unused, or at minimum that software doesn't need to access. + endif endmenu diff --git a/arch/mips/cpu/Makefile b/arch/mips/cpu/Makefile index fc6b455..429fd3a 100644 --- a/arch/mips/cpu/Makefile +++ b/arch/mips/cpu/Makefile @@ -7,3 +7,5 @@ extra-y = start.o obj-y += time.o obj-y += interrupts.o obj-y += cpu.o + +obj-$(CONFIG_MIPS_CM) += cm_init.o diff --git a/arch/mips/cpu/cm_init.S b/arch/mips/cpu/cm_init.S new file mode 100644 index 0000000..ddcaa49 --- /dev/null +++ b/arch/mips/cpu/cm_init.S @@ -0,0 +1,45 @@ +/* + * MIPS Coherence Manager (CM) Initialisation + * + * Copyright (c) 2016 Imagination Technologies Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <asm/addrspace.h> +#include <asm/asm.h> +#include <asm/cm.h> +#include <asm/mipsregs.h> +#include <asm/regdef.h> + +LEAF(mips_cm_map) + /* Config3 must exist for a CM to be present */ + mfc0 t0, CP0_CONFIG, 1 + bgez t0, 2f + mfc0 t0, CP0_CONFIG, 2 + bgez t0, 2f + + /* Check Config3.CMGCR to determine CM presence */ + mfc0 t0, CP0_CONFIG, 3 + and t0, t0, MIPS_CONF3_CMGCR + beqz t0, 2f + + /* Find the current physical GCR base address */ +1: MFC0 t0, CP0_CMGCRBASE + PTR_SLL t0, t0, 4 + + /* If the GCRs are where we want, we're done */ + PTR_LI t1, CONFIG_MIPS_CM_BASE + beq t0, t1, 2f + + /* Move the GCRs to our configured base address */ + PTR_LI t2, CKSEG1 + PTR_ADDU t0, t0, t2 + sw zero, GCR_BASE_UPPER(t0) + sw t1, GCR_BASE(t0) + + /* Re-check the GCR base */ + b 1b + +2: jr ra + END(mips_cm_map) diff --git a/arch/mips/cpu/cpu.c b/arch/mips/cpu/cpu.c index 391feb3..1b919ed 100644 --- a/arch/mips/cpu/cpu.c +++ b/arch/mips/cpu/cpu.c @@ -8,6 +8,7 @@ #include <common.h> #include <command.h> #include <linux/compiler.h> +#include <asm/cache.h> #include <asm/mipsregs.h> #include <asm/reboot.h> @@ -35,3 +36,9 @@ void write_one_tlb(int index, u32 pagemask, u32 hi, u32 low0, u32 low1) write_c0_index(index); tlb_write_indexed(); } + +int arch_cpu_init(void) +{ + mips_cache_probe(); + return 0; +} diff --git a/arch/mips/cpu/start.S b/arch/mips/cpu/start.S index fc6dd66..3f0fc12 100644 --- a/arch/mips/cpu/start.S +++ b/arch/mips/cpu/start.S @@ -12,10 +12,6 @@ #include <asm/regdef.h> #include <asm/mipsregs.h> -#ifndef CONFIG_SYS_MIPS_CACHE_MODE -#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT -#endif - #ifndef CONFIG_SYS_INIT_SP_ADDR #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ CONFIG_SYS_INIT_SP_OFFSET) @@ -112,9 +108,28 @@ ENTRY(_start) .align 4 reset: +#if __mips_isa_rev >= 6 + mfc0 t0, CP0_CONFIG, 5 + and t0, t0, MIPS_CONF5_VP + beqz t0, 1f + nop + + b 2f + mfc0 t0, CP0_GLOBALNUMBER +#endif + +1: mfc0 t0, CP0_EBASE + and t0, t0, EBASE_CPUNUM + + /* Hang if this isn't the first CPU in the system */ +2: beqz t0, 4f + nop +3: wait + b 3b + nop /* Clear watch registers */ - MTC0 zero, CP0_WATCHLO +4: MTC0 zero, CP0_WATCHLO mtc0 zero, CP0_WATCHHI /* WP(Watch Pending), SW0/1 should be cleared */ @@ -127,9 +142,11 @@ reset: mtc0 zero, CP0_COMPARE #ifndef CONFIG_SKIP_LOWLEVEL_INIT - /* CONFIG0 register */ - li t0, CONF_CM_UNCACHED + mfc0 t0, CP0_CONFIG + and t0, t0, MIPS_CONF_IMPL + or t0, t0, CONF_CM_UNCACHED mtc0 t0, CP0_CONFIG + ehb #endif /* @@ -144,20 +161,31 @@ reset: 1: PTR_L gp, 0(ra) +#ifdef CONFIG_MIPS_CM + PTR_LA t9, mips_cm_map + jalr t9 + nop +#endif + #ifndef CONFIG_SKIP_LOWLEVEL_INIT +# ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD /* Initialize any external memory */ PTR_LA t9, lowlevel_init jalr t9 nop +# endif /* Initialize caches... */ PTR_LA t9, mips_cache_reset jalr t9 nop - /* ... and enable them */ - li t0, CONFIG_SYS_MIPS_CACHE_MODE - mtc0 t0, CP0_CONFIG +# ifndef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD + /* Initialize any external memory */ + PTR_LA t9, lowlevel_init + jalr t9 + nop +# endif #endif /* Set up temporary stack */ @@ -214,12 +242,9 @@ ENTRY(relocate_code) PTR_LI t0, CONFIG_SYS_MONITOR_BASE PTR_SUB s1, s2, t0 # s1 <-- relocation offset - PTR_LA t3, in_ram - PTR_L t2, -(3 * PTRSIZE)(t3) # t2 <-- __image_copy_end + PTR_LA t2, __image_copy_end move t1, a2 - PTR_ADD gp, s1 # adjust gp - /* * t0 = source address * t1 = target address @@ -232,32 +257,14 @@ ENTRY(relocate_code) blt t0, t2, 1b PTR_ADDU t1, PTRSIZE - /* If caches were enabled, we would have to flush them here. */ - PTR_SUB a1, t1, s2 # a1 <-- size - PTR_LA t9, flush_cache - jalr t9 - move a0, s2 # a0 <-- destination address - - /* Jump to where we've relocated ourselves */ - PTR_ADDIU t0, s2, in_ram - _start - jr t0 - nop - - PTR __rel_dyn_end - PTR __rel_dyn_start - PTR __image_copy_end - PTR _GLOBAL_OFFSET_TABLE_ - PTR num_got_entries - -in_ram: /* * Now we want to update GOT. * * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object * generated by GNU ld. Skip these reserved entries from relocation. */ - PTR_L t3, -(1 * PTRSIZE)(t0) # t3 <-- num_got_entries - PTR_L t8, -(2 * PTRSIZE)(t0) # t8 <-- _GLOBAL_OFFSET_TABLE_ + PTR_LA t3, num_got_entries + PTR_LA t8, _GLOBAL_OFFSET_TABLE_ PTR_ADD t8, s1 # t8 now holds relocated _G_O_T_ PTR_ADDIU t8, t8, 2 * PTRSIZE # skipping first two entries PTR_LI t2, 2 @@ -272,8 +279,8 @@ in_ram: PTR_ADDIU t8, PTRSIZE /* Update dynamic relocations */ - PTR_L t1, -(4 * PTRSIZE)(t0) # t1 <-- __rel_dyn_start - PTR_L t2, -(5 * PTRSIZE)(t0) # t2 <-- __rel_dyn_end + PTR_LA t1, __rel_dyn_start + PTR_LA t2, __rel_dyn_end b 2f # skip first reserved entry PTR_ADDIU t1, 2 * PTRSIZE @@ -298,6 +305,20 @@ in_ram: PTR_ADDIU t1, 2 * PTRSIZE # each rel.dyn entry is 2*PTRSIZE bytes /* + * Flush caches to ensure our newly modified instructions are visible + * to the instruction cache. We're still running with the old GOT, so + * apply the reloc offset to the start address. + */ + PTR_LA a0, __text_start + PTR_LA a1, __text_end + PTR_SUB a1, a1, a0 + PTR_LA t9, flush_cache + jalr t9 + PTR_ADD a0, s1 + + PTR_ADD gp, s1 # adjust gp + + /* * Clear BSS * * GOT is now relocated. Thus __bss_start and __bss_end can be diff --git a/arch/mips/cpu/u-boot.lds b/arch/mips/cpu/u-boot.lds index 7d71c11..0129c99 100644 --- a/arch/mips/cpu/u-boot.lds +++ b/arch/mips/cpu/u-boot.lds @@ -19,7 +19,9 @@ SECTIONS . = ALIGN(4); .text : { + __text_start = .; *(.text*) + __text_end = .; } . = ALIGN(4); diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile index 2f04d73..30fcc2b 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile @@ -4,8 +4,10 @@ dtb-$(CONFIG_TARGET_AP121) += ap121.dtb dtb-$(CONFIG_TARGET_AP143) += ap143.dtb +dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb dtb-$(CONFIG_TARGET_MALTA) += mti,malta.dtb dtb-$(CONFIG_TARGET_PIC32MZDASK) += pic32mzda_sk.dtb +dtb-$(CONFIG_TARGET_XILFPGA) += nexys4ddr.dtb dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb targets += $(dtb-y) diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts new file mode 100644 index 0000000..1d4eeda --- /dev/null +++ b/arch/mips/dts/img,boston.dts @@ -0,0 +1,222 @@ +/dts-v1/; + +#include <dt-bindings/clock/boston-clock.h> +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/interrupt-controller/mips-gic.h> + +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "img,boston"; + + chosen { + stdout-path = &uart0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "img,mips"; + reg = <0>; + clocks = <&clk_boston BOSTON_CLK_CPU>; + }; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x10000000>; + }; + + gic: interrupt-controller { + compatible = "mti,gic"; + + interrupt-controller; + #interrupt-cells = <3>; + + timer { + compatible = "mti,gic-timer"; + interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>; + clocks = <&clk_boston BOSTON_CLK_CPU>; + }; + }; + + pci0: pci@10000000 { + status = "disabled"; + compatible = "xlnx,axi-pcie-host-1.00.a"; + device_type = "pci"; + reg = <0x10000000 0x2000000>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 2 IRQ_TYPE_LEVEL_HIGH>; + + ranges = <0x02000000 0 0x40000000 + 0x40000000 0 0x40000000>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pci0_intc 0>, + <0 0 0 2 &pci0_intc 1>, + <0 0 0 3 &pci0_intc 2>, + <0 0 0 4 &pci0_intc 3>; + + pci0_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pci1: pci@12000000 { + status = "disabled"; + compatible = "xlnx,axi-pcie-host-1.00.a"; + device_type = "pci"; + reg = <0x12000000 0x2000000>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 1 IRQ_TYPE_LEVEL_HIGH>; + + ranges = <0x02000000 0 0x20000000 + 0x20000000 0 0x20000000>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pci1_intc 0>, + <0 0 0 2 &pci1_intc 1>, + <0 0 0 3 &pci1_intc 2>, + <0 0 0 4 &pci1_intc 3>; + + pci1_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + + pci2: pci@14000000 { + compatible = "xlnx,axi-pcie-host-1.00.a"; + device_type = "pci"; + reg = <0x14000000 0x2000000>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 0 IRQ_TYPE_LEVEL_HIGH>; + + ranges = <0x02000000 0 0x16000000 + 0x16000000 0 0x100000>; + + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pci2_intc 0>, + <0 0 0 2 &pci2_intc 1>, + <0 0 0 3 &pci2_intc 2>, + <0 0 0 4 &pci2_intc 3>; + + pci2_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + + pci2_root@0,0,0 { + compatible = "pci10ee,7021"; + reg = <0x00000000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + eg20t_bridge@1,0,0 { + compatible = "pci8086,8800"; + reg = <0x00010000 0 0 0 0>; + + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + + eg20t_mac@2,0,1 { + compatible = "pci8086,8802"; + reg = <0x00020100 0 0 0 0>; + phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>; + }; + + eg20t_gpio: eg20t_gpio@2,0,2 { + compatible = "pci8086,8803"; + reg = <0x00020200 0 0 0 0>; + + gpio-controller; + #gpio-cells = <2>; + }; + + eg20t_i2c@2,12,2 { + compatible = "pci8086,8817"; + reg = <0x00026200 0 0 0 0>; + + #address-cells = <1>; + #size-cells = <0>; + + rtc@0x68 { + compatible = "st,m41t81s"; + reg = <0x68>; + }; + }; + }; + }; + }; + + plat_regs: system-controller@17ffd000 { + compatible = "img,boston-platform-regs", "syscon"; + reg = <0x17ffd000 0x1000>; + u-boot,dm-pre-reloc; + }; + + clk_boston: clock { + compatible = "img,boston-clock"; + #clock-cells = <1>; + regmap = <&plat_regs>; + u-boot,dm-pre-reloc; + }; + + reboot: syscon-reboot { + compatible = "syscon-reboot"; + regmap = <&plat_regs>; + offset = <0x10>; + mask = <0x10>; + }; + + uart0: uart@17ffe000 { + compatible = "ns16550a"; + reg = <0x17ffe000 0x1000>; + reg-shift = <2>; + reg-io-width = <4>; + + interrupt-parent = <&gic>; + interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&clk_boston BOSTON_CLK_SYS>; + + u-boot,dm-pre-reloc; + }; + + lcd: lcd@17fff000 { + compatible = "img,boston-lcd"; + reg = <0x17fff000 0x8>; + }; + + flash@18000000 { + compatible = "cfi-flash"; + reg = <0x18000000 0x8000000>; + bank-width = <2>; + }; +}; diff --git a/arch/mips/dts/microAptiv.dtsi b/arch/mips/dts/microAptiv.dtsi new file mode 100644 index 0000000..81d518e --- /dev/null +++ b/arch/mips/dts/microAptiv.dtsi @@ -0,0 +1,21 @@ +/ { + #address-cells = <1>; + #size-cells = <1>; + compatible = "img,xilfpga"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu@0 { + device_type = "cpu"; + compatible = "mips,m14Kc"; + clocks = <&ext>; + reg = <0>; + }; + }; + + ext: ext { + compatible = "fixed-clock"; + #clock-cells = <0>; + }; +}; diff --git a/arch/mips/dts/nexys4ddr.dts b/arch/mips/dts/nexys4ddr.dts new file mode 100644 index 0000000..e254ab1 --- /dev/null +++ b/arch/mips/dts/nexys4ddr.dts @@ -0,0 +1,62 @@ +/dts-v1/; + +#include "microAptiv.dtsi" + +/ { + compatible = "digilent,nexys4ddr"; + + memory { + device_type = "memory"; + reg = <0x0 0x08000000>; + }; + + cpuintc: interrupt-controller@0 { + #address-cells = <0>; + #interrupt-cells = <1>; + interrupt-controller; + compatible = "mti,cpu-interrupt-controller"; + }; + + aliases { + console = &axi_uart16550; + }; + + axi_ethernetlite: ethernet@10e00000 { + compatible = "xlnx,xps-ethernetlite-1.00.a"; + device_type = "network"; + local-mac-address = [08 86 4C 0D F7 09]; + phy-handle = <&phy0>; + reg = <0x10e00000 0x10000>; + xlnx,duplex = <0x1>; + xlnx,include-global-buffers = <0x1>; + xlnx,include-internal-loopback = <0x0>; + xlnx,include-mdio = <0x1>; + xlnx,instance = "axi_ethernetlite_inst"; + xlnx,rx-ping-pong = <0x1>; + xlnx,s-axi-id-width = <0x1>; + xlnx,tx-ping-pong = <0x1>; + xlnx,use-internal = <0x0>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: phy@1 { + compatible = <0x0007c0f0 0xfffffff0>; + device_type = "ethernet-phy"; + reg = <1>; + } ; + } ; + } ; + + + axi_uart16550: serial@10400000 { + compatible = "ns16550a"; + reg = <0x10400000 0x10000>; + + reg-shift = <2>; + reg-offset = <0x1000>; + + clock-frequency = <50000000>; + + }; +}; + diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h index 0cea581..669c362 100644 --- a/arch/mips/include/asm/cache.h +++ b/arch/mips/include/asm/cache.h @@ -19,4 +19,13 @@ */ #define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN +/** + * mips_cache_probe() - Probe the properties of the caches + * + * Call this to probe the properties such as line sizes of the caches + * present in the system, if any. This must be done before cache maintenance + * functions such as flush_cache may be called. + */ +void mips_cache_probe(void); + #endif /* __MIPS_CACHE_H__ */ diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h new file mode 100644 index 0000000..b9ab0c6 --- /dev/null +++ b/arch/mips/include/asm/cm.h @@ -0,0 +1,62 @@ +/* + * MIPS Coherence Manager (CM) Register Definitions + * + * Copyright (c) 2016 Imagination Technologies Ltd. + * + * SPDX-License-Identifier: GPL-2.0+ + */ +#ifndef __MIPS_ASM_CM_H__ +#define __MIPS_ASM_CM_H__ + +/* Global Control Register (GCR) offsets */ +#define GCR_BASE 0x0008 +#define GCR_BASE_UPPER 0x000c +#define GCR_REV 0x0030 +#define GCR_L2_CONFIG 0x0130 +#define GCR_L2_TAG_ADDR 0x0600 +#define GCR_L2_TAG_ADDR_UPPER 0x0604 +#define GCR_L2_TAG_STATE 0x0608 +#define GCR_L2_TAG_STATE_UPPER 0x060c +#define GCR_L2_DATA 0x0610 +#define GCR_L2_DATA_UPPER 0x0614 +#define GCR_Cx_COHERENCE 0x2008 + +/* GCR_REV CM versions */ +#define GCR_REV_CM3 0x0800 + +/* GCR_L2_CONFIG fields */ +#define GCR_L2_CONFIG_ASSOC_SHIFT 0 +#define GCR_L2_CONFIG_ASSOC_BITS 8 +#define GCR_L2_CONFIG_LINESZ_SHIFT 8 +#define GCR_L2_CONFIG_LINESZ_BITS 4 +#define GCR_L2_CONFIG_SETSZ_SHIFT 12 +#define GCR_L2_CONFIG_SETSZ_BITS 4 +#define GCR_L2_CONFIG_BYPASS (1 << 20) + +/* GCR_Cx_COHERENCE */ +#define GCR_Cx_COHERENCE_DOM_EN (0xff << 0) +#define GCR_Cx_COHERENCE_EN (0x1 << 0) + +#ifndef __ASSEMBLY__ + +#include <asm/io.h> + +static inline void *mips_cm_base(void) +{ + return (void *)CKSEG1ADDR(CONFIG_MIPS_CM_BASE); +} + +static inline unsigned long mips_cm_l2_line_size(void) +{ + unsigned long l2conf, line_sz; + + l2conf = __raw_readl(mips_cm_base() + GCR_L2_CONFIG); + + line_sz = l2conf >> GCR_L2_CONFIG_LINESZ_SHIFT; + line_sz &= GENMASK(GCR_L2_CONFIG_LINESZ_BITS - 1, 0); + return line_sz ? (2 << line_sz) : 0; +} + +#endif /* !__ASSEMBLY__ */ + +#endif /* __MIPS_ASM_CM_H__ */ diff --git a/arch/mips/include/asm/global_data.h b/arch/mips/include/asm/global_data.h index 37f8ed5..0078bbe 100644 --- a/arch/mips/include/asm/global_data.h +++ b/arch/mips/include/asm/global_data.h @@ -21,6 +21,13 @@ struct arch_global_data { unsigned long rev; unsigned long ver; #endif +#ifdef CONFIG_SYS_CACHE_SIZE_AUTO + unsigned short l1i_line_size; + unsigned short l1d_line_size; +#endif +#ifdef CONFIG_MIPS_L2_CACHE + unsigned short l2_line_size; +#endif }; #include <asm-generic/global_data.h> diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h index 3185dc7..9ab5063 100644 --- a/arch/mips/include/asm/mipsregs.h +++ b/arch/mips/include/asm/mipsregs.h @@ -39,6 +39,7 @@ #define CP0_ENTRYLO0 $2 #define CP0_ENTRYLO1 $3 #define CP0_CONF $3 +#define CP0_GLOBALNUMBER $3, 1 #define CP0_CONTEXT $4 #define CP0_PAGEMASK $5 #define CP0_WIRED $6 @@ -361,6 +362,11 @@ #define CAUSEF_BD (_ULCAST_(1) << 31) /* + * Bits in the coprocessor 0 EBase register. + */ +#define EBASE_CPUNUM 0x3ff + +/* * Bits in the coprocessor 0 config register. */ /* Generic bits. */ @@ -450,6 +456,7 @@ #define MIPS_CONF_MT_FTLB (_ULCAST_(4) << 7) #define MIPS_CONF_AR (_ULCAST_(7) << 10) #define MIPS_CONF_AT (_ULCAST_(3) << 13) +#define MIPS_CONF_IMPL (_ULCAST_(0x1ff) << 16) #define MIPS_CONF_M (_ULCAST_(1) << 31) /* @@ -484,9 +491,13 @@ #define MIPS_CONF1_TLBS_SIZE (6) #define MIPS_CONF1_TLBS (_ULCAST_(63) << MIPS_CONF1_TLBS_SHIFT) +#define MIPS_CONF2_SA_SHF 0 #define MIPS_CONF2_SA (_ULCAST_(15) << 0) +#define MIPS_CONF2_SL_SHF 4 #define MIPS_CONF2_SL (_ULCAST_(15) << 4) +#define MIPS_CONF2_SS_SHF 8 #define MIPS_CONF2_SS (_ULCAST_(15) << 8) +#define MIPS_CONF2_L2B (_ULCAST_(1) << 12) #define MIPS_CONF2_SU (_ULCAST_(15) << 12) #define MIPS_CONF2_TA (_ULCAST_(15) << 16) #define MIPS_CONF2_TL (_ULCAST_(15) << 20) @@ -548,8 +559,10 @@ #define MIPS_CONF5_MRP (_ULCAST_(1) << 3) #define MIPS_CONF5_LLB (_ULCAST_(1) << 4) #define MIPS_CONF5_MVH (_ULCAST_(1) << 5) +#define MIPS_CONF5_VP (_ULCAST_(1) << 7) #define MIPS_CONF5_FRE (_ULCAST_(1) << 8) #define MIPS_CONF5_UFE (_ULCAST_(1) << 9) +#define MIPS_CONF5_L2C (_ULCAST_(1) << 10) #define MIPS_CONF5_MSAEN (_ULCAST_(1) << 27) #define MIPS_CONF5_EVA (_ULCAST_(1) << 28) #define MIPS_CONF5_CV (_ULCAST_(1) << 29) diff --git a/arch/mips/lib/cache.c b/arch/mips/lib/cache.c index db81953..bd14ba6 100644 --- a/arch/mips/lib/cache.c +++ b/arch/mips/lib/cache.c @@ -7,34 +7,85 @@ #include <common.h> #include <asm/cacheops.h> +#include <asm/cm.h> #include <asm/mipsregs.h> -static inline unsigned long icache_line_size(void) +DECLARE_GLOBAL_DATA_PTR; + +static void probe_l2(void) { - unsigned long conf1, il; +#ifdef CONFIG_MIPS_L2_CACHE + unsigned long conf2, sl; + bool l2c = false; + + if (!(read_c0_config1() & MIPS_CONF_M)) + return; - if (!config_enabled(CONFIG_SYS_CACHE_SIZE_AUTO)) - return CONFIG_SYS_ICACHE_LINE_SIZE; + conf2 = read_c0_config2(); + + if (__mips_isa_rev >= 6) { + l2c = conf2 & MIPS_CONF_M; + if (l2c) + l2c = read_c0_config3() & MIPS_CONF_M; + if (l2c) + l2c = read_c0_config4() & MIPS_CONF_M; + if (l2c) + l2c = read_c0_config5() & MIPS_CONF5_L2C; + } + + if (l2c && config_enabled(CONFIG_MIPS_CM)) { + gd->arch.l2_line_size = mips_cm_l2_line_size(); + } else if (l2c) { + /* We don't know how to retrieve L2 config on this system */ + BUG(); + } else { + sl = (conf2 & MIPS_CONF2_SL) >> MIPS_CONF2_SL_SHF; + gd->arch.l2_line_size = sl ? (2 << sl) : 0; + } +#endif +} + +void mips_cache_probe(void) +{ +#ifdef CONFIG_SYS_CACHE_SIZE_AUTO + unsigned long conf1, il, dl; conf1 = read_c0_config1(); + il = (conf1 & MIPS_CONF1_IL) >> MIPS_CONF1_IL_SHF; - if (!il) - return 0; - return 2 << il; + dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHF; + + gd->arch.l1i_line_size = il ? (2 << il) : 0; + gd->arch.l1d_line_size = dl ? (2 << dl) : 0; +#endif + probe_l2(); } -static inline unsigned long dcache_line_size(void) +static inline unsigned long icache_line_size(void) { - unsigned long conf1, dl; +#ifdef CONFIG_SYS_CACHE_SIZE_AUTO + return gd->arch.l1i_line_size; +#else + return CONFIG_SYS_ICACHE_LINE_SIZE; +#endif +} - if (!config_enabled(CONFIG_SYS_CACHE_SIZE_AUTO)) - return CONFIG_SYS_DCACHE_LINE_SIZE; +static inline unsigned long dcache_line_size(void) +{ +#ifdef CONFIG_SYS_CACHE_SIZE_AUTO + return gd->arch.l1d_line_size; +#else + return CONFIG_SYS_DCACHE_LINE_SIZE; +#endif +} - conf1 = read_c0_config1(); - dl = (conf1 & MIPS_CONF1_DL) >> MIPS_CONF1_DL_SHF; - if (!dl) - return 0; - return 2 << dl; +static inline unsigned long scache_line_size(void) +{ +#ifdef CONFIG_MIPS_L2_CACHE + return gd->arch.l2_line_size; +#else + return 0; +#endif } #define cache_loop(start, end, lsize, ops...) do { \ @@ -53,12 +104,13 @@ void flush_cache(ulong start_addr, ulong size) { unsigned long ilsize = icache_line_size(); unsigned long dlsize = dcache_line_size(); + unsigned long slsize = scache_line_size(); /* aend will be miscalculated when size is zero, so we return here */ if (size == 0) return; - if (ilsize == dlsize) { + if ((ilsize == dlsize) && !slsize) { /* flush I-cache & D-cache simultaneously */ cache_loop(start_addr, start_addr + size, ilsize, HIT_WRITEBACK_INV_D, HIT_INVALIDATE_I); @@ -68,6 +120,11 @@ void flush_cache(ulong start_addr, ulong size) /* flush D-cache */ cache_loop(start_addr, start_addr + size, dlsize, HIT_WRITEBACK_INV_D); + /* flush L2 cache */ + if (slsize) + cache_loop(start_addr, start_addr + size, slsize, + HIT_WRITEBACK_INV_SD); + /* flush I-cache */ cache_loop(start_addr, start_addr + size, ilsize, HIT_INVALIDATE_I); } @@ -75,21 +132,31 @@ void flush_cache(ulong start_addr, ulong size) void flush_dcache_range(ulong start_addr, ulong stop) { unsigned long lsize = dcache_line_size(); + unsigned long slsize = scache_line_size(); /* aend will be miscalculated when size is zero, so we return here */ if (start_addr == stop) return; cache_loop(start_addr, stop, lsize, HIT_WRITEBACK_INV_D); + + /* flush L2 cache */ + if (slsize) + cache_loop(start_addr, stop, slsize, HIT_WRITEBACK_INV_SD); } void invalidate_dcache_range(ulong start_addr, ulong stop) { unsigned long lsize = dcache_line_size(); + unsigned long slsize = scache_line_size(); /* aend will be miscalculated when size is zero, so we return here */ if (start_addr == stop) return; + /* invalidate L2 cache */ + if (slsize) + cache_loop(start_addr, stop, slsize, HIT_INVALIDATE_SD); + cache_loop(start_addr, stop, lsize, HIT_INVALIDATE_D); } diff --git a/arch/mips/lib/cache_init.S b/arch/mips/lib/cache_init.S index bc8ab27..698a5af 100644 --- a/arch/mips/lib/cache_init.S +++ b/arch/mips/lib/cache_init.S @@ -13,6 +13,7 @@ #include <asm/mipsregs.h> #include <asm/addrspace.h> #include <asm/cacheops.h> +#include <asm/cm.h> #ifndef CONFIG_SYS_MIPS_CACHE_MODE #define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT @@ -95,22 +96,147 @@ * with good parity is available. This routine will initialise an area of * memory starting at location zero to be used as a source of parity. * + * Note that this function does not follow the standard calling convention & + * may clobber typically callee-saved registers. + * * RETURNS: N/A * */ +#define R_RETURN s0 +#define R_IC_SIZE s1 +#define R_IC_LINE s2 +#define R_DC_SIZE s3 +#define R_DC_LINE s4 +#define R_L2_SIZE s5 +#define R_L2_LINE s6 +#define R_L2_BYPASSED s7 +#define R_L2_L2C t8 LEAF(mips_cache_reset) + move R_RETURN, ra + +#ifdef CONFIG_MIPS_L2_CACHE + /* + * For there to be an L2 present, Config2 must be present. If it isn't + * then we proceed knowing there's no L2 cache. + */ + move R_L2_SIZE, zero + move R_L2_LINE, zero + move R_L2_BYPASSED, zero + move R_L2_L2C, zero + mfc0 t0, CP0_CONFIG, 1 + bgez t0, l2_probe_done + + /* + * From MIPSr6 onwards the L2 cache configuration might not be reported + * by Config2. The Config5.L2C bit indicates whether this is the case, + * and if it is then we need knowledge of where else to look. For cores + * from Imagination Technologies this is a CM GCR. + */ +# if __mips_isa_rev >= 6 + /* Check that Config5 exists */ + mfc0 t0, CP0_CONFIG, 2 + bgez t0, l2_probe_cop0 + mfc0 t0, CP0_CONFIG, 3 + bgez t0, l2_probe_cop0 + mfc0 t0, CP0_CONFIG, 4 + bgez t0, l2_probe_cop0 + + /* Check Config5.L2C is set */ + mfc0 t0, CP0_CONFIG, 5 + and R_L2_L2C, t0, MIPS_CONF5_L2C + beqz R_L2_L2C, l2_probe_cop0 + + /* Config5.L2C is set */ +# ifdef CONFIG_MIPS_CM + /* The CM will provide L2 configuration */ + PTR_LI t0, CKSEG1ADDR(CONFIG_MIPS_CM_BASE) + lw t1, GCR_L2_CONFIG(t0) + bgez t1, l2_probe_done + + ext R_L2_LINE, t1, \ + GCR_L2_CONFIG_LINESZ_SHIFT, GCR_L2_CONFIG_LINESZ_BITS + beqz R_L2_LINE, l2_probe_done + li t2, 2 + sllv R_L2_LINE, t2, R_L2_LINE + + ext t2, t1, GCR_L2_CONFIG_ASSOC_SHIFT, GCR_L2_CONFIG_ASSOC_BITS + addiu t2, t2, 1 + mul R_L2_SIZE, R_L2_LINE, t2 + + ext t2, t1, GCR_L2_CONFIG_SETSZ_SHIFT, GCR_L2_CONFIG_SETSZ_BITS + sllv R_L2_SIZE, R_L2_SIZE, t2 + li t2, 64 + mul R_L2_SIZE, R_L2_SIZE, t2 + + /* Bypass the L2 cache so that we can init the L1s early */ + or t1, t1, GCR_L2_CONFIG_BYPASS + sw t1, GCR_L2_CONFIG(t0) + sync + li R_L2_BYPASSED, 1 + + /* Zero the L2 tag registers */ + sw zero, GCR_L2_TAG_ADDR(t0) + sw zero, GCR_L2_TAG_ADDR_UPPER(t0) + sw zero, GCR_L2_TAG_STATE(t0) + sw zero, GCR_L2_TAG_STATE_UPPER(t0) + sw zero, GCR_L2_DATA(t0) + sw zero, GCR_L2_DATA_UPPER(t0) + sync +# else + /* We don't know how to retrieve L2 configuration on this system */ +# endif + b l2_probe_done +# endif + + /* + * For pre-r6 systems, or r6 systems with Config5.L2C==0, probe the L2 + * cache configuration from the cop0 Config2 register. + */ +l2_probe_cop0: + mfc0 t0, CP0_CONFIG, 2 + + srl R_L2_LINE, t0, MIPS_CONF2_SL_SHF + andi R_L2_LINE, R_L2_LINE, MIPS_CONF2_SL >> MIPS_CONF2_SL_SHF + beqz R_L2_LINE, l2_probe_done + li t1, 2 + sllv R_L2_LINE, t1, R_L2_LINE + + srl t1, t0, MIPS_CONF2_SA_SHF + andi t1, t1, MIPS_CONF2_SA >> MIPS_CONF2_SA_SHF + addiu t1, t1, 1 + mul R_L2_SIZE, R_L2_LINE, t1 + + srl t1, t0, MIPS_CONF2_SS_SHF + andi t1, t1, MIPS_CONF2_SS >> MIPS_CONF2_SS_SHF + sllv R_L2_SIZE, R_L2_SIZE, t1 + li t1, 64 + mul R_L2_SIZE, R_L2_SIZE, t1 + + /* Attempt to bypass the L2 so that we can init the L1s early */ + or t0, t0, MIPS_CONF2_L2B + mtc0 t0, CP0_CONFIG, 2 + ehb + mfc0 t0, CP0_CONFIG, 2 + and R_L2_BYPASSED, t0, MIPS_CONF2_L2B + + /* Zero the L2 tag registers */ + mtc0 zero, CP0_TAGLO, 4 + ehb +l2_probe_done: +#endif + #ifndef CONFIG_SYS_CACHE_SIZE_AUTO - li t2, CONFIG_SYS_ICACHE_SIZE - li t8, CONFIG_SYS_ICACHE_LINE_SIZE + li R_IC_SIZE, CONFIG_SYS_ICACHE_SIZE + li R_IC_LINE, CONFIG_SYS_ICACHE_LINE_SIZE #else - l1_info t2, t8, MIPS_CONF1_IA_SHF + l1_info R_IC_SIZE, R_IC_LINE, MIPS_CONF1_IA_SHF #endif #ifndef CONFIG_SYS_CACHE_SIZE_AUTO - li t3, CONFIG_SYS_DCACHE_SIZE - li t9, CONFIG_SYS_DCACHE_LINE_SIZE + li R_DC_SIZE, CONFIG_SYS_DCACHE_SIZE + li R_DC_LINE, CONFIG_SYS_DCACHE_LINE_SIZE #else - l1_info t3, t9, MIPS_CONF1_DA_SHF + l1_info R_DC_SIZE, R_DC_LINE, MIPS_CONF1_DA_SHF #endif #ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD @@ -123,9 +249,9 @@ LEAF(mips_cache_reset) li v0, CONFIG_SYS_DCACHE_SIZE #endif #else - move v0, t2 - sltu t1, t2, t3 - movn v0, t3, t1 + move v0, R_IC_SIZE + sltu t1, R_IC_SIZE, R_DC_SIZE + movn v0, R_DC_SIZE, t1 #endif /* * Now clear that much memory starting from zero. @@ -138,13 +264,36 @@ LEAF(mips_cache_reset) #endif /* CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD */ +#ifdef CONFIG_MIPS_L2_CACHE + /* + * If the L2 is bypassed, init the L1 first so that we can execute the + * rest of the cache initialisation using the L1 instruction cache. + */ + bnez R_L2_BYPASSED, l1_init + +l2_init: + PTR_LI t0, INDEX_BASE + PTR_ADDU t1, t0, R_L2_SIZE +1: cache INDEX_STORE_TAG_SD, 0(t0) + PTR_ADDU t0, t0, R_L2_LINE + bne t0, t1, 1b + + /* + * If the L2 was bypassed then we already initialised the L1s before + * the L2, so we are now done. + */ + bnez R_L2_BYPASSED, l2_unbypass +#endif + /* * The TagLo registers used depend upon the CPU implementation, but the * architecture requires that it is safe for software to write to both * TagLo selects 0 & 2 covering supported cases. */ +l1_init: mtc0 zero, CP0_TAGLO mtc0 zero, CP0_TAGLO, 2 + ehb /* * The caches are probably in an indeterminate state, so we force good @@ -158,40 +307,122 @@ LEAF(mips_cache_reset) /* * Initialize the I-cache first, */ - blez t2, 1f + blez R_IC_SIZE, 1f PTR_LI t0, INDEX_BASE - PTR_ADDU t1, t0, t2 + PTR_ADDU t1, t0, R_IC_SIZE /* clear tag to invalidate */ - cache_loop t0, t1, t8, INDEX_STORE_TAG_I + cache_loop t0, t1, R_IC_LINE, INDEX_STORE_TAG_I #ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD /* fill once, so data field parity is correct */ PTR_LI t0, INDEX_BASE - cache_loop t0, t1, t8, FILL + cache_loop t0, t1, R_IC_LINE, FILL /* invalidate again - prudent but not strictly neccessary */ PTR_LI t0, INDEX_BASE - cache_loop t0, t1, t8, INDEX_STORE_TAG_I + cache_loop t0, t1, R_IC_LINE, INDEX_STORE_TAG_I +#endif + + /* Enable use of the I-cache by setting Config.K0 */ + sync + mfc0 t0, CP0_CONFIG + li t1, CONFIG_SYS_MIPS_CACHE_MODE +#if __mips_isa_rev >= 2 + ins t0, t1, 0, 3 +#else + ori t0, t0, CONF_CM_CMASK + xori t0, t0, CONF_CM_CMASK + or t0, t0, t1 #endif + mtc0 t0, CP0_CONFIG /* * then initialize D-cache. */ -1: blez t3, 3f +1: blez R_DC_SIZE, 3f PTR_LI t0, INDEX_BASE - PTR_ADDU t1, t0, t3 + PTR_ADDU t1, t0, R_DC_SIZE /* clear all tags */ - cache_loop t0, t1, t9, INDEX_STORE_TAG_D + cache_loop t0, t1, R_DC_LINE, INDEX_STORE_TAG_D #ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD /* load from each line (in cached space) */ PTR_LI t0, INDEX_BASE 2: LONG_L zero, 0(t0) - PTR_ADDU t0, t9 + PTR_ADDU t0, R_DC_LINE bne t0, t1, 2b /* clear all tags */ PTR_LI t0, INDEX_BASE - cache_loop t0, t1, t9, INDEX_STORE_TAG_D + cache_loop t0, t1, R_DC_LINE, INDEX_STORE_TAG_D #endif +3: + +#ifdef CONFIG_MIPS_L2_CACHE + /* If the L2 isn't bypassed then we're done */ + beqz R_L2_BYPASSED, return + + /* The L2 is bypassed - go initialise it */ + b l2_init -3: jr ra +l2_unbypass: +# if __mips_isa_rev >= 6 + beqz R_L2_L2C, 1f + + li t0, CKSEG1ADDR(CONFIG_MIPS_CM_BASE) + lw t1, GCR_L2_CONFIG(t0) + xor t1, t1, GCR_L2_CONFIG_BYPASS + sw t1, GCR_L2_CONFIG(t0) + sync + ehb + b 2f +# endif +1: mfc0 t0, CP0_CONFIG, 2 + xor t0, t0, MIPS_CONF2_L2B + mtc0 t0, CP0_CONFIG, 2 + ehb + +2: +# ifdef CONFIG_MIPS_CM + /* Config3 must exist for a CM to be present */ + mfc0 t0, CP0_CONFIG, 1 + bgez t0, 2f + mfc0 t0, CP0_CONFIG, 2 + bgez t0, 2f + + /* Check Config3.CMGCR to determine CM presence */ + mfc0 t0, CP0_CONFIG, 3 + and t0, t0, MIPS_CONF3_CMGCR + beqz t0, 2f + + /* Change Config.K0 to a coherent CCA */ + mfc0 t0, CP0_CONFIG + li t1, CONF_CM_CACHABLE_COW +#if __mips_isa_rev >= 2 + ins t0, t1, 0, 3 +#else + ori t0, t0, CONF_CM_CMASK + xori t0, t0, CONF_CM_CMASK + or t0, t0, t1 +#endif + mtc0 t0, CP0_CONFIG + + /* + * Join the coherent domain such that the caches of this core are kept + * coherent with those of other cores. + */ + PTR_LI t0, CKSEG1ADDR(CONFIG_MIPS_CM_BASE) + lw t1, GCR_REV(t0) + li t2, GCR_REV_CM3 + li t3, GCR_Cx_COHERENCE_EN + bge t1, t2, 1f + li t3, GCR_Cx_COHERENCE_DOM_EN +1: sw t3, GCR_Cx_COHERENCE(t0) + ehb +2: +# endif +#endif + +return: + /* Ensure all cache operations complete before returning */ + sync + jr ra END(mips_cache_reset) /* diff --git a/arch/mips/mach-ath79/cpu.c b/arch/mips/mach-ath79/cpu.c index 5756a06..4ef5092 100644 --- a/arch/mips/mach-ath79/cpu.c +++ b/arch/mips/mach-ath79/cpu.c @@ -46,7 +46,7 @@ static const struct ath79_soc_desc desc[] = { {ATH79_SOC_QCA9561, "9561", REV_ID_MAJOR_QCA9561, 0}, }; -int arch_cpu_init(void) +int mach_cpu_init(void) { void __iomem *base; enum ath79_soc_type soc = ATH79_SOC_UNKNOWN; diff --git a/arch/powerpc/cpu/mpc512x/start.S b/arch/powerpc/cpu/mpc512x/start.S index 6c331d1..471d401 100644 --- a/arch/powerpc/cpu/mpc512x/start.S +++ b/arch/powerpc/cpu/mpc512x/start.S @@ -15,9 +15,6 @@ #include <asm-offsets.h> #include <config.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "MPC512X" -#endif #include <version.h> #define CONFIG_521X 1 /* needed for Linux kernel header files*/ diff --git a/arch/powerpc/cpu/mpc83xx/start.S b/arch/powerpc/cpu/mpc83xx/start.S index 9bd86d8..0001687 100644 --- a/arch/powerpc/cpu/mpc83xx/start.S +++ b/arch/powerpc/cpu/mpc83xx/start.S @@ -14,9 +14,6 @@ #include <asm-offsets.h> #include <config.h> #include <mpc83xx.h> -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "MPC83XX" -#endif #include <version.h> #define CONFIG_83XX 1 /* needed for Linux kernel header files*/ diff --git a/arch/powerpc/cpu/ppc4xx/4xx_pci.c b/arch/powerpc/cpu/ppc4xx/4xx_pci.c index 30e6c65..bfe48a2 100644 --- a/arch/powerpc/cpu/ppc4xx/4xx_pci.c +++ b/arch/powerpc/cpu/ppc4xx/4xx_pci.c @@ -118,7 +118,8 @@ void pci_405gp_init(struct pci_controller *hose) #endif unsigned long ptmla[2] = {CONFIG_SYS_PCI_PTM1LA, CONFIG_SYS_PCI_PTM2LA}; unsigned long ptmms[2] = {CONFIG_SYS_PCI_PTM1MS, CONFIG_SYS_PCI_PTM2MS}; -#if defined(CONFIG_PIP405) || defined (CONFIG_MIP405) +#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \ + || defined(CONFIG_TARGET_MIP405T) unsigned long pmmla[3] = {0x80000000, 0xA0000000, 0}; unsigned long pmmma[3] = {0xE0000001, 0xE0000001, 0}; unsigned long pmmpcila[3] = {0x80000000, 0x00000000, 0}; @@ -408,7 +409,8 @@ void pci_405gp_setup_vga(struct pci_controller *hose, pci_dev_t dev, pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat); } -#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) +#if !(defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \ + || defined(CONFIG_TARGET_MIP405T)) /* *As is these functs get called out of flash Not a horrible diff --git a/arch/powerpc/cpu/ppc4xx/Kconfig b/arch/powerpc/cpu/ppc4xx/Kconfig index 92a330d..a6066ef 100644 --- a/arch/powerpc/cpu/ppc4xx/Kconfig +++ b/arch/powerpc/cpu/ppc4xx/Kconfig @@ -104,6 +104,9 @@ config TARGET_ICON config TARGET_MIP405 bool "Support MIP405" +config TARGET_MIP405T + bool "Support MIP405T" + config TARGET_PIP405 bool "Support PIP405" diff --git a/arch/powerpc/cpu/ppc4xx/resetvec.S b/arch/powerpc/cpu/ppc4xx/resetvec.S index b3308bd..a42d91f 100644 --- a/arch/powerpc/cpu/ppc4xx/resetvec.S +++ b/arch/powerpc/cpu/ppc4xx/resetvec.S @@ -4,7 +4,8 @@ #if defined(CONFIG_440) b _start_440 #else -#if defined(CONFIG_BOOT_PCI) && defined(CONFIG_MIP405) +#if defined(CONFIG_BOOT_PCI) && (defined(CONFIG_TARGET_MIP405) \ + || defined(CONFIG_TARGET_MIP405T)) b _start_pci #else b _start diff --git a/board/imgtec/boston/Kconfig b/board/imgtec/boston/Kconfig new file mode 100644 index 0000000..ab76a3c --- /dev/null +++ b/board/imgtec/boston/Kconfig @@ -0,0 +1,16 @@ +if TARGET_BOSTON + +config SYS_BOARD + default "boston" + +config SYS_VENDOR + default "imgtec" + +config SYS_CONFIG_NAME + default "boston" + +config SYS_TEXT_BASE + default 0x9fc00000 if 32BIT + default 0xffffffff9fc00000 if 64BIT + +endif diff --git a/board/imgtec/boston/MAINTAINERS b/board/imgtec/boston/MAINTAINERS new file mode 100644 index 0000000..30dd481 --- /dev/null +++ b/board/imgtec/boston/MAINTAINERS @@ -0,0 +1,6 @@ +BOSTON BOARD +M: Paul Burton <paul.burton@imgtec.com> +S: Maintained +F: board/imgtec/boston/ +F: include/configs/boston.h +F: configs/boston_defconfig diff --git a/board/imgtec/boston/Makefile b/board/imgtec/boston/Makefile new file mode 100644 index 0000000..deda457 --- /dev/null +++ b/board/imgtec/boston/Makefile @@ -0,0 +1,9 @@ +# +# Copyright (C) 2016 Imagination Technologies +# +# SPDX-License-Identifier: GPL-2.0 +# + +obj-y += checkboard.o +obj-y += ddr.o +obj-y += lowlevel_init.o diff --git a/board/imgtec/boston/boston-lcd.h b/board/imgtec/boston/boston-lcd.h new file mode 100644 index 0000000..9f5c1b9 --- /dev/null +++ b/board/imgtec/boston/boston-lcd.h @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __BOARD_BOSTON_LCD_H__ +#define __BOARD_BOSTON_LCD_H__ + +/** + * lowlevel_display() - Display a message on Boston's LCD + * @msg: The string to display + * + * Display the string @msg on the 7 character LCD display of the Boston board. + * This is typically used for debug or to present some form of status + * indication to the user, allowing faults to be identified when things go + * wrong early enough that the UART isn't up. + */ +void lowlevel_display(const char msg[static 8]); + +#endif /* __BOARD_BOSTON_LCD_H__ */ diff --git a/board/imgtec/boston/boston-regs.h b/board/imgtec/boston/boston-regs.h new file mode 100644 index 0000000..b9dfbb4 --- /dev/null +++ b/board/imgtec/boston/boston-regs.h @@ -0,0 +1,26 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __BOARD_BOSTON_REGS_H__ +#define __BOARD_BOSTON_REGS_H__ + +#include <asm/addrspace.h> + +#define BOSTON_PLAT_BASE CKSEG1ADDR(0x17ffd000) +#define BOSTON_LCD_BASE CKSEG1ADDR(0x17fff000) + +/* + * Platform Register Definitions + */ +#define BOSTON_PLAT_CORE_CL (BOSTON_PLAT_BASE + 0x04) + +#define BOSTON_PLAT_DDR3STAT (BOSTON_PLAT_BASE + 0x14) +# define BOSTON_PLAT_DDR3STAT_CALIB (1 << 2) + +#define BOSTON_PLAT_DDRCONF0 (BOSTON_PLAT_BASE + 0x38) +# define BOSTON_PLAT_DDRCONF0_SIZE (0xf << 0) + +#endif /* __BOARD_BOSTON_REGS_H__ */ diff --git a/board/imgtec/boston/checkboard.c b/board/imgtec/boston/checkboard.c new file mode 100644 index 0000000..93eae7f --- /dev/null +++ b/board/imgtec/boston/checkboard.c @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> + +#include <asm/io.h> +#include <asm/mipsregs.h> + +#include "boston-lcd.h" +#include "boston-regs.h" + +int checkboard(void) +{ + u32 changelist; + + lowlevel_display("U-boot "); + + printf("Board: MIPS Boston\n"); + + printf("CPU: 0x%08x", read_c0_prid()); + changelist = __raw_readl((uint32_t *)BOSTON_PLAT_CORE_CL); + if (changelist > 1) + printf(" cl%x", changelist); + putc('\n'); + + return 0; +} diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c new file mode 100644 index 0000000..ceffef6 --- /dev/null +++ b/board/imgtec/boston/ddr.c @@ -0,0 +1,30 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> + +#include <asm/io.h> + +#include "boston-regs.h" + +phys_size_t initdram(int board_type) +{ + u32 ddrconf0 = __raw_readl((uint32_t *)BOSTON_PLAT_DDRCONF0); + + return (phys_size_t)(ddrconf0 & BOSTON_PLAT_DDRCONF0_SIZE) << 30; +} + +ulong board_get_usable_ram_top(ulong total_size) +{ + DECLARE_GLOBAL_DATA_PTR; + + if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) { + /* 2GB wrapped around to 0 */ + return CKSEG0ADDR(256 << 20); + } + + return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20)); +} diff --git a/board/imgtec/boston/lowlevel_init.S b/board/imgtec/boston/lowlevel_init.S new file mode 100644 index 0000000..0c01aa9 --- /dev/null +++ b/board/imgtec/boston/lowlevel_init.S @@ -0,0 +1,56 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <config.h> + +#include <asm/addrspace.h> +#include <asm/asm.h> +#include <asm/mipsregs.h> +#include <asm/regdef.h> + +#include "boston-regs.h" + +.data + +msg_ddr_cal: .ascii "DDR Cal " +msg_ddr_ok: .ascii "DDR OK " + +.text + +LEAF(lowlevel_init) + move s0, ra + + PTR_LA a0, msg_ddr_cal + bal lowlevel_display + + PTR_LI t0, BOSTON_PLAT_DDR3STAT +1: lw t1, 0(t0) + andi t1, t1, BOSTON_PLAT_DDR3STAT_CALIB + beqz t1, 1b + + PTR_LA a0, msg_ddr_ok + bal lowlevel_display + + move v0, zero + jr s0 + END(lowlevel_init) + +LEAF(lowlevel_display) + .set push + .set noat + PTR_LI AT, BOSTON_LCD_BASE +#ifdef CONFIG_64BIT + ld k1, 0(a0) + sd k1, 0(AT) +#else + lw k1, 0(a0) + sw k1, 0(AT) + lw k1, 4(a0) + sw k1, 4(AT) +#endif + .set pop +1: jr ra + END(lowlevel_display) diff --git a/board/imgtec/malta/lowlevel_init.S b/board/imgtec/malta/lowlevel_init.S index 3d48cdc..6df4d9f 100644 --- a/board/imgtec/malta/lowlevel_init.S +++ b/board/imgtec/malta/lowlevel_init.S @@ -28,12 +28,6 @@ .globl lowlevel_init lowlevel_init: - /* disable any L2 cache for now */ - sync - mfc0 t0, CP0_CONFIG, 2 - ori t0, t0, 0x1 << 12 - mtc0 t0, CP0_CONFIG, 2 - /* detect the core card */ PTR_LI t0, CKSEG1ADDR(MALTA_REVISION) lw t0, 0(t0) diff --git a/board/imgtec/xilfpga/Kconfig b/board/imgtec/xilfpga/Kconfig new file mode 100644 index 0000000..b078278 --- /dev/null +++ b/board/imgtec/xilfpga/Kconfig @@ -0,0 +1,15 @@ +if TARGET_XILFPGA + +config SYS_BOARD + default "xilfpga" + +config SYS_VENDOR + default "imgtec" + +config SYS_CONFIG_NAME + default "imgtec_xilfpga" + +config SYS_TEXT_BASE + default 0x80C00000 + +endif diff --git a/board/imgtec/xilfpga/MAINTAINERS b/board/imgtec/xilfpga/MAINTAINERS new file mode 100644 index 0000000..aa04532 --- /dev/null +++ b/board/imgtec/xilfpga/MAINTAINERS @@ -0,0 +1,6 @@ +XILFPGA BOARD +M: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> +S: Maintained +F: board/imgtec/xilfpga +F: include/configs/xilfpga.h +F: configs/imgtec_xilfpga_defconfig diff --git a/board/imgtec/xilfpga/Makefile b/board/imgtec/xilfpga/Makefile new file mode 100644 index 0000000..9aaf9ce --- /dev/null +++ b/board/imgtec/xilfpga/Makefile @@ -0,0 +1,7 @@ +# +# Copyright (C) 2016, Imagination Technologies Ltd. +# Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# +obj-y := xilfpga.o diff --git a/board/imgtec/xilfpga/README b/board/imgtec/xilfpga/README new file mode 100644 index 0000000..ac19d48 --- /dev/null +++ b/board/imgtec/xilfpga/README @@ -0,0 +1,55 @@ +/* + * Copyright (C) 2016, Imagination Technologies Ltd. + * + * Zubair Lutfullah Kakakhel, Zubair.Kakakhel@imgtec.com + */ + +MIPSfpga +======================================= + +MIPSfpga is an FPGA based development platform by Imagination Technologies +As we are dealing with a MIPS core instantiated on an FPGA, specifications +are fluid and can be varied in RTL. + +The example project provided by IMGTEC runs on the Nexys4DDR board by +Digilent powered by the ARTIX-7 FPGA by Xilinx. Relevant details about +the example project and the Nexys4DDR board: + +- microAptiv UP core m14Kc +- 50MHz clock speed +- 128Mbyte DDR RAM at 0x0000_0000 +- 8Kbyte RAM at 0x1000_0000 +- axi_intc at 0x1020_0000 +- axi_uart16550 at 0x1040_0000 +- axi_gpio at 0x1060_0000 +- axi_i2c at 0x10A0_0000 +- custom_gpio at 0x10C0_0000 +- axi_ethernetlite at 0x10E0_0000 +- 8Kbyte BootRAM at 0x1FC0_0000 +- 16Mbyte QPI at 0x1D00_0000 + +Boot protocol: +-------------- + +The BootRAM is a writeable "RAM" in FPGA at 0x1FC0_0000. +This is for easy reprogrammibility via JTAG. + +DDR initialization is already handled by a HW IP block. + +When the example project bitstream is loaded, the cpu_reset button +needs to be pressed. + +The bootram initializes the cache and axi_uart +Then checks if there is anything non 0xffff_ffff at location 0x1D40_0000 + +If there is, then that is considered as u-boot. u-boot is copied from +0x1D40_0000 to memory and the bootram jumps into u-boot code. + +At this point, the board is ready to load the Linux kernel + buildroot initramfs + +This can be done in multiple ways: + +1- JTAG load the binary and jump into it. +2- Load kernel stored in the QSPI flash at 0x1D80_0000 +3- Load uImage via tftp. Ethernet works in u-boot. + e.g. env set server ip 192.168.154.45; dhcp uImage; bootm diff --git a/board/imgtec/xilfpga/xilfpga.c b/board/imgtec/xilfpga/xilfpga.c new file mode 100644 index 0000000..77a1952 --- /dev/null +++ b/board/imgtec/xilfpga/xilfpga.c @@ -0,0 +1,20 @@ +/* + * Imagination Technologies MIPSfpga platform code + * + * Copyright (C) 2016, Imagination Technologies Ltd. + * + * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> + * + * SPDX-License-Identifier: GPL-2.0+ + * + */ + +#include <common.h> + +/* initialize the DDR Controller and PHY */ +phys_size_t initdram(int board_type) +{ + /* MIG IP block is smart and doesn't need SW + * to do any init */ + return CONFIG_SYS_SDRAM_SIZE; /* in bytes */ +} diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c index 2262175..3c110fa 100644 --- a/board/mpl/common/common_util.c +++ b/board/mpl/common/common_util.c @@ -20,7 +20,7 @@ #include "../pip405/pip405.h" #include <asm/4xx_pci.h> #endif -#ifdef CONFIG_MIP405 +#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T) #include "../mip405/mip405.h" #include <asm/4xx_pci.h> #endif @@ -36,7 +36,8 @@ extern int mem_test(ulong start, ulong ramsize, int quiet); #define I2C_BACKUP_ADDR 0x7C00 /* 0x200 bytes for backup */ #define IMAGE_SIZE CONFIG_SYS_MONITOR_LEN /* ugly, but it works for now */ -#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) +#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \ + || defined(CONFIG_TARGET_MIP405T) /*----------------------------------------------------------------------- * On PIP/MIP405 we have 3 (4) possible boot mode * @@ -116,7 +117,7 @@ void setup_cs_reloc(void) mtdcr(EBC0_CFGDATA, FLASH_CR_B); } } -#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) */ +#endif /* #if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) */ #ifdef CONFIG_SYS_UPDATE_FLASH_SIZE /* adjust flash start and protection info */ @@ -190,12 +191,11 @@ mpl_prg(uchar *src, ulong size) #if defined(CONFIG_PATI) int start_sect; #endif -#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI) +#if defined(CONFIG_PIP405) || defined(CONFIG_TARGET_MIP405) \ + || defined(CONFIG_TARGET_MIP405T) || defined(CONFIG_PATI) char *copystr = (char *)src; ulong *magic = (ulong *)src; -#endif -#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) || defined(CONFIG_PATI) if (uimage_to_cpu (magic[0]) != IH_MAGIC) { puts("Bad Magic number\n"); return -1; @@ -241,7 +241,7 @@ mpl_prg(uchar *src, ulong size) return (1); } -#else /* #if !defined(CONFIG_PATI */ +#else /* #if !defined(CONFIG_PATI) */ start = FIRM_START; start_sect = -1; @@ -701,7 +701,7 @@ void video_get_info_str (int line_number, char *info) strcpy(buf,"### No HW ID - assuming PIP405"); } #endif -#ifdef CONFIG_MIP405 +#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T) if (!s || strncmp (s, "MIP405", 6)) { strcpy(buf,"### No HW ID - assuming MIP405"); } diff --git a/board/mpl/common/common_util.h b/board/mpl/common/common_util.h index e81ee35..22f5c2e 100644 --- a/board/mpl/common/common_util.h +++ b/board/mpl/common/common_util.h @@ -17,12 +17,10 @@ extern flash_info_t flash_info[]; /* info for FLASH chips */ void get_backup_values(backup_t *buf); -#if defined(CONFIG_PIP405) || defined(CONFIG_MIP405) #define BOOT_MPS 0x01 #define BOOT_PCI 0x02 int get_boot_mode(void); void setup_cs_reloc(void); -#endif void check_env(void); #if defined(CONFIG_CMD_DOC) diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h index 4193e92..75e8cae 100644 --- a/board/mpl/common/pci_parts.h +++ b/board/mpl/common/pci_parts.h @@ -91,7 +91,7 @@ static struct pci_pip405_config_entry piix4_isa_bridge_f0[] = { static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = { {PCI_CFG_PIIX4_BMIBA, 0x0001000, 4}, /* set BMI to a valid address */ {PCI_COMMAND, 0x0001, 2}, /* enable IO access */ -#if !defined(CONFIG_MIP405T) +#if !defined(CONFIG_TARGET_MIP405T) {PCI_CFG_PIIX4_IDETIM, 0x80008000, 4}, /* enable Both IDE channels */ #else {PCI_CFG_PIIX4_IDETIM, 0x00008000, 4}, /* enable IDE channel0 */ @@ -101,7 +101,7 @@ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = { /* PIIX4 USB Controller Function 2 */ static struct pci_pip405_config_entry piix4_usb_cntrl_f2[] = { -#if !defined(CONFIG_MIP405T) +#if !defined(CONFIG_TARGET_MIP405T) {PCI_INTERRUPT_LINE, 31, 1}, /* Int vector = 31 */ {PCI_BASE_ADDRESS_4, 0x0000E001, 4}, /* Set IO Address to 0xe000 to 0xe01F */ {PCI_LATENCY_TIMER, 0x80, 1}, /* Latency Timer 0x80 */ diff --git a/board/mpl/mip405/Kconfig b/board/mpl/mip405/Kconfig index 48ba91a..e003a43 100644 --- a/board/mpl/mip405/Kconfig +++ b/board/mpl/mip405/Kconfig @@ -1,4 +1,4 @@ -if TARGET_MIP405 +if TARGET_MIP405 || TARGET_MIP405T config SYS_BOARD default "mip405" @@ -9,4 +9,9 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "MIP405" +config ISO_STRING + string + default "MEV-10082-001" if TARGET_MIP405T + default "MEV-10072-001" if TARGET_MIP405 + endif diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 4a0d696..8b9892b 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -92,7 +92,7 @@ typedef struct { unsigned char sz; /* log binary => Size = (4MByte<<sz) 5 = 128, 4 = 64, 3 = 32, 2 = 16, 1=8 */ unsigned char ecc; /* if true, ecc is enabled */ } sdram_t; -#if defined(CONFIG_MIP405T) +#if defined(CONFIG_TARGET_MIP405T) const sdram_t sdram_table[] = { { 0x0F, /* MIP405T Rev A, 64MByte -1 Board */ 3, /* Case Latenty = 3 */ @@ -168,7 +168,7 @@ const sdram_t sdram_table[] = { 0xff, 0xff } }; -#endif /*CONFIG_MIP405T */ +#endif /*CONFIG_TARGET_MIP405T */ void SDRAM_err (const char *s) { #ifndef SDRAM_DEBUG @@ -262,7 +262,7 @@ int init_sdram (void) #endif /* check board */ bc = in8 (PLD_PART_REG); -#if defined(CONFIG_MIP405T) +#if defined(CONFIG_TARGET_MIP405T) if((bc & 0x80)==0) SDRAM_err ("U-Boot configured for a MIP405T not for a MIP405!!!\n"); #else @@ -543,7 +543,7 @@ void ide_set_reset (int idereset) void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var) { -#if !defined(CONFIG_MIP405T) +#if !defined(CONFIG_TARGET_MIP405T) unsigned char bc,rc,tmp; int i; @@ -575,7 +575,7 @@ void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var) * Check Board Identity: */ /* serial String: "MIP405_1000" OR "MIP405T_1000" */ -#if !defined(CONFIG_MIP405T) +#if !defined(CONFIG_TARGET_MIP405T) #define BOARD_NAME "MIP405" #else #define BOARD_NAME "MIP405T" @@ -777,7 +777,7 @@ void print_mip405_info (void) (cfg >> 1) & 0x1, (cfg >> 2) & 0x1, (cfg >> 3) & 0x1); printf ("User LED %s\n", (com_mode & 0x4) ? "on" : "off"); printf ("UART Clocks %d\n", (com_mode >> 4) & 0x3); -#if !defined(CONFIG_MIP405T) +#if !defined(CONFIG_TARGET_MIP405T) printf ("User Config Switch %d %d %d %d %d %d %d %d\n", (ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1, (ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1, @@ -793,7 +793,7 @@ void print_mip405_info (void) printf ("IDE Reset %s\n", (ext & 0x01) ? "asserted" : "not asserted"); printf ("IRQs:\n"); printf (" PIIX INTR: %s\n", (irq_reg & 0x80) ? "inactive" : "active"); -#if !defined(CONFIG_MIP405T) +#if !defined(CONFIG_TARGET_MIP405T) printf (" UART0 IRQ: %s\n", (irq_reg & 0x40) ? "inactive" : "active"); printf (" UART1 IRQ: %s\n", (irq_reg & 0x20) ? "inactive" : "active"); #endif diff --git a/board/mpl/pati/Kconfig b/board/mpl/pati/Kconfig index b141da3..0eeaf70 100644 --- a/board/mpl/pati/Kconfig +++ b/board/mpl/pati/Kconfig @@ -9,4 +9,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "PATI" +config ISO_STRING + string + default "MEV-10084-001" endif diff --git a/board/mpl/pati/pati.h b/board/mpl/pati/pati.h index 2600bba..93a5918 100644 --- a/board/mpl/pati/pati.h +++ b/board/mpl/pati/pati.h @@ -201,9 +201,8 @@ #define PCI_VENDOR_ID_MPL 0x18E6 #define PCI_DEVICE_ID_PATI 0x00DA -#if defined(CONFIG_MIP405) +#if defined(CONFIG_TARGET_MIP405) || defined(CONFIG_TARGET_MIP405T) #define PATI_FIRMWARE_START_OFFSET 0x00300000 -#define PATI_ISO_STRING "MEV-10084-001" #endif #define PATI_ENDIAN_MODE 0x3E diff --git a/board/mpl/pip405/Kconfig b/board/mpl/pip405/Kconfig index f485367..e7ae6af 100644 --- a/board/mpl/pip405/Kconfig +++ b/board/mpl/pip405/Kconfig @@ -9,4 +9,7 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "PIP405" +config ISO_STRING + string + default "MEV-10066-001" endif diff --git a/board/sandbox/README.sandbox b/board/sandbox/README.sandbox index ed820d3..02d8ab3 100644 --- a/board/sandbox/README.sandbox +++ b/board/sandbox/README.sandbox @@ -320,6 +320,25 @@ CONFIG_SPI_IDLE_VAL The idle value on the SPI bus +Block Device Emulation +---------------------- + +U-Boot can use raw disk images for block device emulation. To e.g. list +the contents of the root directory on the second partion of the image +"disk.raw", you can use the following commands: + +=>host bind 0 ./disk.raw +=>ls host 0:2 + +A disk image can be created using the following commands: + +$> truncate -s 1200M ./disk.raw +$> echo -e "label: gpt\n,64M,U\n,,L" | /usr/sbin/sfdisk ./disk.raw +$> lodev=`sudo losetup -P -f --show ./disk.raw` +$> sudo mkfs.vfat -n EFI -v ${lodev}p1 +$> sudo mkfs.ext4 -L ROOT -v ${lodev}p2 + + Writing Sandbox Drivers ----------------------- diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig index 79f644a..b139d1c 100644 --- a/board/sunxi/Kconfig +++ b/board/sunxi/Kconfig @@ -1,5 +1,8 @@ if ARCH_SUNXI +config IDENT_STRING + default " Allwinner Technology" + config SPL_GPIO_SUPPORT default y diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c index 0c5d997..566b5e8 100644 --- a/board/xilinx/zynqmp/zynqmp.c +++ b/board/xilinx/zynqmp/zynqmp.c @@ -16,14 +16,114 @@ #include <asm/io.h> #include <usb.h> #include <dwc3-uboot.h> +#include <zynqmppl.h> #include <i2c.h> +#include <g_dnl.h> DECLARE_GLOBAL_DATA_PTR; +#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ + !defined(CONFIG_SPL_BUILD) +static xilinx_desc zynqmppl = XILINX_ZYNQMP_DESC; + +static const struct { + uint32_t id; + char *name; +} zynqmp_devices[] = { + { + .id = 0x10, + .name = "3eg", + }, + { + .id = 0x11, + .name = "2eg", + }, + { + .id = 0x20, + .name = "5ev", + }, + { + .id = 0x21, + .name = "4ev", + }, + { + .id = 0x30, + .name = "7ev", + }, + { + .id = 0x38, + .name = "9eg", + }, + { + .id = 0x39, + .name = "6eg", + }, + { + .id = 0x40, + .name = "11eg", + }, + { + .id = 0x50, + .name = "15eg", + }, + { + .id = 0x58, + .name = "19eg", + }, + { + .id = 0x59, + .name = "17eg", + }, +}; + +static int chip_id(void) +{ + struct pt_regs regs; + regs.regs[0] = ZYNQMP_SIP_SVC_CSU_DMA_CHIPID; + regs.regs[1] = 0; + regs.regs[2] = 0; + regs.regs[3] = 0; + + smc_call(®s); + + return regs.regs[0]; +} + +static char *zynqmp_get_silicon_idcode_name(void) +{ + uint32_t i, id; + + id = chip_id(); + for (i = 0; i < ARRAY_SIZE(zynqmp_devices); i++) { + if (zynqmp_devices[i].id == id) + return zynqmp_devices[i].name; + } + return "unknown"; +} +#endif + +#define ZYNQMP_VERSION_SIZE 9 + int board_init(void) { printf("EL Level:\tEL%d\n", current_el()); +#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \ + !defined(CONFIG_SPL_BUILD) || (defined(CONFIG_SPL_FPGA_SUPPORT) && \ + defined(CONFIG_SPL_BUILD)) + if (current_el() != 3) { + static char version[ZYNQMP_VERSION_SIZE]; + + strncat(version, "xczu", ZYNQMP_VERSION_SIZE); + zynqmppl.name = strncat(version, + zynqmp_get_silicon_idcode_name(), + ZYNQMP_VERSION_SIZE); + printf("Chip ID:\t%s\n", zynqmppl.name); + fpga_init(); + fpga_add(fpga_xilinx, &zynqmppl); + } +#endif + return 0; } @@ -228,6 +328,10 @@ int board_late_init(void) puts("Bootmode: "); switch (bootmode) { + case USB_MODE: + puts("USB_MODE\n"); + mode = "usb"; + break; case JTAG_MODE: puts("JTAG_MODE\n"); mode = "pxe dhcp"; @@ -283,22 +387,38 @@ int checkboard(void) } #ifdef CONFIG_USB_DWC3 -static struct dwc3_device dwc3_device_data = { +static struct dwc3_device dwc3_device_data0 = { .maximum_speed = USB_SPEED_HIGH, .base = ZYNQMP_USB0_XHCI_BASEADDR, .dr_mode = USB_DR_MODE_PERIPHERAL, .index = 0, }; -int usb_gadget_handle_interrupts(void) +static struct dwc3_device dwc3_device_data1 = { + .maximum_speed = USB_SPEED_HIGH, + .base = ZYNQMP_USB1_XHCI_BASEADDR, + .dr_mode = USB_DR_MODE_PERIPHERAL, + .index = 1, +}; + +int usb_gadget_handle_interrupts(int index) { - dwc3_uboot_handle_interrupt(0); + dwc3_uboot_handle_interrupt(index); return 0; } int board_usb_init(int index, enum usb_init_type init) { - return dwc3_uboot_init(&dwc3_device_data); + debug("%s: index %x\n", __func__, index); + + switch (index) { + case 0: + return dwc3_uboot_init(&dwc3_device_data0); + case 1: + return dwc3_uboot_init(&dwc3_device_data1); + }; + + return -1; } int board_usb_cleanup(int index, enum usb_init_type init) @@ -25,6 +25,12 @@ static int do_host_ls(cmd_tbl_t *cmdtp, int flag, int argc, return do_ls(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX); } +static int do_host_size(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + return do_size(cmdtp, flag, argc, argv, FS_TYPE_SANDBOX); +} + static int do_host_save(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { @@ -138,6 +144,7 @@ static cmd_tbl_t cmd_host_sub[] = { U_BOOT_CMD_MKENT(load, 7, 0, do_host_load, "", ""), U_BOOT_CMD_MKENT(ls, 3, 0, do_host_ls, "", ""), U_BOOT_CMD_MKENT(save, 6, 0, do_host_save, "", ""), + U_BOOT_CMD_MKENT(size, 3, 0, do_host_size, "", ""), U_BOOT_CMD_MKENT(bind, 3, 0, do_host_bind, "", ""), U_BOOT_CMD_MKENT(info, 3, 0, do_host_info, "", ""), U_BOOT_CMD_MKENT(dev, 0, 1, do_host_dev, "", ""), @@ -174,6 +181,7 @@ U_BOOT_CMD( "host ls hostfs - <filename> - list files on host\n" "host save hostfs - <addr> <filename> <bytes> [<offset>] - " "save a file to host\n" + "host size hostfs - <filename> - determine size of file on host" "host bind <dev> [<filename>] - bind \"host\" device to file\n" "host info [<dev>] - show device binding & info\n" "host dev [<dev>] - Set or retrieve the current host device\n" diff --git a/common/Kconfig b/common/Kconfig index 35f4279..c69c141 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -198,6 +198,11 @@ config CONSOLE_RECORD_IN_SIZE The buffer is allocated immediately after the malloc() region is ready. +config IDENT_STRING + string "Board specific string to be added to uboot version string" + help + This options adds the board specific name to u-boot version. + config SYS_NO_FLASH bool "Disable support for parallel NOR flash" default n diff --git a/common/board_f.c b/common/board_f.c index da381db..9ef998f 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -290,6 +290,11 @@ __weak int arch_cpu_init(void) return 0; } +__weak int mach_cpu_init(void) +{ + return 0; +} + #ifdef CONFIG_SANDBOX static int setup_ram_buf(void) { @@ -860,6 +865,7 @@ static init_fnc_t init_sequence_f[] = { x86_fsp_init, #endif arch_cpu_init, /* basic arch cpu dependent setup */ + mach_cpu_init, /* SoC/machine dependent CPU setup */ initf_dm, arch_cpu_init_dm, mark_bootstage, /* need timer, go after init dm */ diff --git a/common/image-fdt.c b/common/image-fdt.c index d6ee225..3d23608 100644 --- a/common/image-fdt.c +++ b/common/image-fdt.c @@ -285,7 +285,7 @@ int boot_get_fdt(int flag, int argc, char * const argv[], uint8_t arch, fdt_noffset = fit_get_node_from_config(images, FIT_FDT_PROP, fdt_addr); - if (fdt_noffset == -ENOLINK) + if (fdt_noffset == -ENOENT) return 0; else if (fdt_noffset < 0) return 1; diff --git a/common/image-fit.c b/common/image-fit.c index 9ce68f1..1b0234a 100644 --- a/common/image-fit.c +++ b/common/image-fit.c @@ -1560,7 +1560,7 @@ int fit_get_node_from_config(bootm_headers_t *images, const char *prop_name, cfg_noffset = fit_conf_get_node(fit_hdr, images->fit_uname_cfg); if (cfg_noffset < 0) { debug("* %s: no such config\n", prop_name); - return -ENOENT; + return -EINVAL; } noffset = fit_conf_get_prop_node(fit_hdr, cfg_noffset, prop_name); diff --git a/common/image.c b/common/image.c index 7ad04ca..c8d9bc8 100644 --- a/common/image.c +++ b/common/image.c @@ -1078,7 +1078,7 @@ int boot_get_ramdisk(int argc, char * const argv[], bootm_headers_t *images, rd_addr = map_to_sysmem(images->fit_hdr_os); rd_noffset = fit_get_node_from_config(images, FIT_RAMDISK_PROP, rd_addr); - if (rd_noffset == -ENOLINK) + if (rd_noffset == -ENOENT) return 0; else if (rd_noffset < 0) return 1; diff --git a/configs/B4420QDS_NAND_defconfig b/configs/B4420QDS_NAND_defconfig index 4cb6571..c192177 100644 --- a/configs/B4420QDS_NAND_defconfig +++ b/configs/B4420QDS_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4420,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/B4860QDS_NAND_defconfig b/configs/B4860QDS_NAND_defconfig index e5b18d4..d01baaa 100644 --- a/configs/B4860QDS_NAND_defconfig +++ b/configs/B4860QDS_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_B4860QDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_B4860,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/C29XPCIE_NAND_defconfig b/configs/C29XPCIE_NAND_defconfig index a393e7e..1c03d44 100644 --- a/configs/C29XPCIE_NAND_defconfig +++ b/configs/C29XPCIE_NAND_defconfig @@ -1,6 +1,7 @@ CONFIG_PPC=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_C29XPCIE=y CONFIG_FIT=y @@ -11,7 +12,6 @@ CONFIG_SYS_EXTRA_OPTIONS="C29XPCIE,NAND" CONFIG_BOOTDELAY=-1 CONFIG_SPL=y CONFIG_TPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C_SUPPORT=y CONFIG_TPL_LIBCOMMON_SUPPORT=y diff --git a/configs/Empire_electronix_m712_defconfig b/configs/Empire_electronix_m712_defconfig index e0f7cc4..4b51380 100644 --- a/configs/Empire_electronix_m712_defconfig +++ b/configs/Empire_electronix_m712_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_SPL_I2C_SUPPORT=y CONFIG_MACH_SUN5I=y CONFIG_DRAM_CLK=408 CONFIG_MMC0_CD_PIN="PG0" @@ -14,9 +15,8 @@ CONFIG_VIDEO_LCD_BL_EN="AXP0-1" CONFIG_VIDEO_LCD_BL_PWM="PB2" CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-empire-electronix-m712" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL=y -CONFIG_SPL_I2C_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=2" +CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/MIP405T_defconfig b/configs/MIP405T_defconfig index c9913ae..e5910cd 100644 --- a/configs/MIP405T_defconfig +++ b/configs/MIP405T_defconfig @@ -1,7 +1,7 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING="\n(c) 2003 by MPL AG Switzerland, MEV-10082-001 released" CONFIG_4xx=y -CONFIG_TARGET_MIP405=y -CONFIG_SYS_EXTRA_OPTIONS="MIP405T" +CONFIG_TARGET_MIP405T=y CONFIG_BOOTDELAY=5 CONFIG_HUSH_PARSER=y CONFIG_CMD_I2C=y diff --git a/configs/MIP405_defconfig b/configs/MIP405_defconfig index c32bdd3..a38eac1 100644 --- a/configs/MIP405_defconfig +++ b/configs/MIP405_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING="\n(c) 2003 by MPL AG Switzerland, MEV-10072-001 released" CONFIG_4xx=y CONFIG_TARGET_MIP405=y CONFIG_BOOTDELAY=5 diff --git a/configs/PATI_defconfig b/configs/PATI_defconfig index 53fdfad..80f077a 100644 --- a/configs/PATI_defconfig +++ b/configs/PATI_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING="\n(c) 2003 by MPL AG Switzerland, MEV-10084-001 released" CONFIG_5xx=y CONFIG_TARGET_PATI=y CONFIG_BOOTDELAY=5 diff --git a/configs/PIP405_defconfig b/configs/PIP405_defconfig index 8ed89a9..87f2f31 100644 --- a/configs/PIP405_defconfig +++ b/configs/PIP405_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING="\n(c) 2002 by MPL AG Switzerland, MEV-10066-001 released" CONFIG_4xx=y CONFIG_TARGET_PIP405=y CONFIG_BOOTDELAY=5 diff --git a/configs/T1023RDB_NAND_defconfig b/configs/T1023RDB_NAND_defconfig index 6ce3422..b24d21b 100644 --- a/configs/T1023RDB_NAND_defconfig +++ b/configs/T1023RDB_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set diff --git a/configs/T1023RDB_SDCARD_defconfig b/configs/T1023RDB_SDCARD_defconfig index 805579c..7f84498 100644 --- a/configs/T1023RDB_SDCARD_defconfig +++ b/configs/T1023RDB_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set diff --git a/configs/T1023RDB_SPIFLASH_defconfig b/configs/T1023RDB_SPIFLASH_defconfig index 1920471..c75abbb 100644 --- a/configs/T1023RDB_SPIFLASH_defconfig +++ b/configs/T1023RDB_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1023,T1023RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set diff --git a/configs/T1024QDS_NAND_defconfig b/configs/T1024QDS_NAND_defconfig index 232c417..7173342 100644 --- a/configs/T1024QDS_NAND_defconfig +++ b/configs/T1024QDS_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1024QDS_SDCARD_defconfig b/configs/T1024QDS_SDCARD_defconfig index fb3bc00..a1c93ae 100644 --- a/configs/T1024QDS_SDCARD_defconfig +++ b/configs/T1024QDS_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XQDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1024QDS_SPIFLASH_defconfig b/configs/T1024QDS_SPIFLASH_defconfig index aef1986..f134850 100644 --- a/configs/T1024QDS_SPIFLASH_defconfig +++ b/configs/T1024QDS_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig index 7dacc39..91beb24 100644 --- a/configs/T1024RDB_NAND_defconfig +++ b/configs/T1024RDB_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig index de8bcef..11aceb8 100644 --- a/configs/T1024RDB_SDCARD_defconfig +++ b/configs/T1024RDB_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T102XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig index 9046f2f..09fe6c4 100644 --- a/configs/T1024RDB_SPIFLASH_defconfig +++ b/configs/T1024RDB_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1024,T1024RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040D4RDB_NAND_defconfig b/configs/T1040D4RDB_NAND_defconfig index a626a79..e9c7708 100644 --- a/configs/T1040D4RDB_NAND_defconfig +++ b/configs/T1040D4RDB_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040D4RDB_SDCARD_defconfig b/configs/T1040D4RDB_SDCARD_defconfig index 1b0d626..098ef3b 100644 --- a/configs/T1040D4RDB_SDCARD_defconfig +++ b/configs/T1040D4RDB_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040D4RDB_SPIFLASH_defconfig b/configs/T1040D4RDB_SPIFLASH_defconfig index a5466fe..002346a 100644 --- a/configs/T1040D4RDB_SPIFLASH_defconfig +++ b/configs/T1040D4RDB_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040RDB_NAND_defconfig b/configs/T1040RDB_NAND_defconfig index 5bb3643..9e5a409 100644 --- a/configs/T1040RDB_NAND_defconfig +++ b/configs/T1040RDB_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040RDB_SDCARD_defconfig b/configs/T1040RDB_SDCARD_defconfig index 126943f..a43304b 100644 --- a/configs/T1040RDB_SDCARD_defconfig +++ b/configs/T1040RDB_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1040RDB_SPIFLASH_defconfig b/configs/T1040RDB_SPIFLASH_defconfig index 06fd3bb..1782e07 100644 --- a/configs/T1040RDB_SPIFLASH_defconfig +++ b/configs/T1040RDB_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1040,T1040RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig index 0f2cb81..d2772fe 100644 --- a/configs/T1042D4RDB_NAND_defconfig +++ b/configs/T1042D4RDB_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,NAND,T104XD4RDB,SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig index ef68474..f8c5d45 100644 --- a/configs/T1042D4RDB_SDCARD_defconfig +++ b/configs/T1042D4RDB_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD,T104XD4RDB,SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig index 1334600..fca6122 100644 --- a/configs/T1042D4RDB_SPIFLASH_defconfig +++ b/configs/T1042D4RDB_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042D4RDB,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH,T104XD4RDB,SYS_FSL_DDR4" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig index aad0126..aa02cec 100644 --- a/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig +++ b/configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -16,7 +17,6 @@ CONFIG_BOOTDELAY=0 CONFIG_SPL=y CONFIG_SPL_CRYPTO_SUPPORT=y CONFIG_SPL_HASH_SUPPORT=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042RDB_PI_NAND_defconfig b/configs/T1042RDB_PI_NAND_defconfig index a49ffac..96985ac 100644 --- a/configs/T1042RDB_PI_NAND_defconfig +++ b/configs/T1042RDB_PI_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042RDB_PI_SDCARD_defconfig b/configs/T1042RDB_PI_SDCARD_defconfig index 2838b85..fd5da57 100644 --- a/configs/T1042RDB_PI_SDCARD_defconfig +++ b/configs/T1042RDB_PI_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T104XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T1042RDB_PI_SPIFLASH_defconfig b/configs/T1042RDB_PI_SPIFLASH_defconfig index adb7ec8..bf41ff5 100644 --- a/configs/T1042RDB_PI_SPIFLASH_defconfig +++ b/configs/T1042RDB_PI_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T1042,T1042RDB_PI,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig index 268deab..e42dd6b 100644 --- a/configs/T2080QDS_NAND_defconfig +++ b/configs/T2080QDS_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig index 0a73195..70a9965 100644 --- a/configs/T2080QDS_SDCARD_defconfig +++ b/configs/T2080QDS_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig index 6e9fa61..93b5ed6 100644 --- a/configs/T2080QDS_SPIFLASH_defconfig +++ b/configs/T2080QDS_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig index 19b1bd8..5e17f3b 100644 --- a/configs/T2080RDB_NAND_defconfig +++ b/configs/T2080RDB_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig index a5c62c8..76dcaf9 100644 --- a/configs/T2080RDB_SDCARD_defconfig +++ b/configs/T2080RDB_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XRDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MEMTEST=y diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig index 2e6a86e..f33fd4e 100644 --- a/configs/T2080RDB_SPIFLASH_defconfig +++ b/configs/T2080RDB_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2080,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_MEMTEST=y diff --git a/configs/T2081QDS_NAND_defconfig b/configs/T2081QDS_NAND_defconfig index 15acd3a..410d375 100644 --- a/configs/T2081QDS_NAND_defconfig +++ b/configs/T2081QDS_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2081QDS_SDCARD_defconfig b/configs/T2081QDS_SDCARD_defconfig index 78a23bf..a0f49d7 100644 --- a/configs/T2081QDS_SDCARD_defconfig +++ b/configs/T2081QDS_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T208XQDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T2081QDS_SPIFLASH_defconfig b/configs/T2081QDS_SPIFLASH_defconfig index 87a2402..902566d 100644 --- a/configs/T2081QDS_SPIFLASH_defconfig +++ b/configs/T2081QDS_SPIFLASH_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_MPC85xx=y @@ -15,7 +16,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T2081,RAMBOOT_PBL,SPL_FSL_PBL,SPIFLASH" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T4160QDS_NAND_defconfig b/configs/T4160QDS_NAND_defconfig index 7f0c1d1..5c981aa 100644 --- a/configs/T4160QDS_NAND_defconfig +++ b/configs/T4160QDS_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T4160QDS_SDCARD_defconfig b/configs/T4160QDS_SDCARD_defconfig index 5dcf9cc..8c5d4ad 100644 --- a/configs/T4160QDS_SDCARD_defconfig +++ b/configs/T4160QDS_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4160,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T4240QDS_NAND_defconfig b/configs/T4240QDS_NAND_defconfig index 296b054..4cdbeb4 100644 --- a/configs/T4240QDS_NAND_defconfig +++ b/configs/T4240QDS_NAND_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,NAND" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T4240QDS_SDCARD_defconfig b/configs/T4240QDS_SDCARD_defconfig index b2e4142..8f8837c 100644 --- a/configs/T4240QDS_SDCARD_defconfig +++ b/configs/T4240QDS_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240QDS=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig index 539d0e9..2104a95 100644 --- a/configs/T4240RDB_SDCARD_defconfig +++ b/configs/T4240RDB_SDCARD_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_I2C_SUPPORT=y CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_MPC85xx=y CONFIG_TARGET_T4240RDB=y CONFIG_FIT=y @@ -14,7 +15,6 @@ CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_EXTRA_OPTIONS="PPC_T4240,RAMBOOT_PBL,SPL_FSL_PBL,SDCARD" CONFIG_BOOTDELAY=10 CONFIG_SPL=y -CONFIG_SPL_DRIVERS_MISC_SUPPORT=y CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_GREPENV=y diff --git a/configs/VCMA9_defconfig b/configs/VCMA9_defconfig index 123562c..e6646fa 100644 --- a/configs/VCMA9_defconfig +++ b/configs/VCMA9_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_VCMA9=y +CONFIG_IDENT_STRING="\n(c) 2003 - 2011 by MPL AG Switzerland, MEV-10080-001 unstable" CONFIG_BOOTDELAY=5 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VCMA9 # " diff --git a/configs/am335x_boneblack_defconfig b/configs/am335x_boneblack_defconfig index 5ceceae..a3994f7 100644 --- a/configs/am335x_boneblack_defconfig +++ b/configs/am335x_boneblack_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_AM335X_EVM=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="EMMC_BOOT" @@ -7,7 +8,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_MUSB_NEW_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 9fdda59..69ee177 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_AM335X_EVM=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_FIT=y @@ -10,7 +11,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_MUSB_NEW_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index c4e6a03..00fa2aa 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_AM335X_EVM=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x82000000 @@ -10,7 +11,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_MUSB_NEW_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/am3517_crane_defconfig b/configs/am3517_crane_defconfig index 329f1f1..08902b8 100644 --- a/configs/am3517_crane_defconfig +++ b/configs/am3517_crane_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_GPIO_SUPPORT is not set +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_AM3517_CRANE=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set -# CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="AM3517_CRANE # " # CONFIG_CMD_IMI is not set diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 0c41a4e..27ea472 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_AM57XX_EVM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_DMA_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/am57xx_evm_nodt_defconfig b/configs/am57xx_evm_nodt_defconfig index e8e005b..608cc10 100644 --- a/configs/am57xx_evm_nodt_defconfig +++ b/configs/am57xx_evm_nodt_defconfig @@ -1,12 +1,12 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_AM57XX_EVM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_DMA_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 828c96c..192997a 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y CONFIG_TI_SECURE_DEVICE=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_AM57XX_EVM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -15,7 +16,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_DMA_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/apf27_defconfig b/configs/apf27_defconfig index ffaab8a..320fb3c 100644 --- a/configs/apf27_defconfig +++ b/configs/apf27_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_TARGET_APF27=y CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_IDENT_STRING=" apf27 patch 3.10" CONFIG_BOOTDELAY=5 CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 29dfcbf..e04ff5b 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_ARNDALE=y +CONFIG_IDENT_STRING=" for ARNDALE" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/aspenite_defconfig b/configs/aspenite_defconfig index 9ac6657..441e65f 100644 --- a/configs/aspenite_defconfig +++ b/configs/aspenite_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_ASPENITE=y +CONFIG_IDENT_STRING="\nMarvell-Aspenite DB" CONFIG_BOOTDELAY=3 # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig new file mode 100644 index 0000000..ca66248 --- /dev/null +++ b/configs/boston32r2_defconfig @@ -0,0 +1,41 @@ +CONFIG_MIPS=y +CONFIG_TARGET_BOSTON=y +CONFIG_SYS_TEXT_BASE=0x9fc00000 +# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set +CONFIG_MIPS_BOOT_FDT=y +CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_BEST_MATCH=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="boston # " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_CFI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_PCH_GBE=y +CONFIG_DM_PCI=y +CONFIG_PCI_XILINX=y +CONFIG_SYS_NS16550=y +CONFIG_LZ4=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig new file mode 100644 index 0000000..67f54bf --- /dev/null +++ b/configs/boston32r2el_defconfig @@ -0,0 +1,42 @@ +CONFIG_MIPS=y +CONFIG_TARGET_BOSTON=y +CONFIG_SYS_TEXT_BASE=0x9fc00000 +CONFIG_SYS_LITTLE_ENDIAN=y +# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set +CONFIG_MIPS_BOOT_FDT=y +CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_BEST_MATCH=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="boston # " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_CFI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_PCH_GBE=y +CONFIG_DM_PCI=y +CONFIG_PCI_XILINX=y +CONFIG_SYS_NS16550=y +CONFIG_LZ4=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig new file mode 100644 index 0000000..1245d1b --- /dev/null +++ b/configs/boston64r2_defconfig @@ -0,0 +1,41 @@ +CONFIG_MIPS=y +CONFIG_TARGET_BOSTON=y +CONFIG_CPU_MIPS64_R2=y +# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set +CONFIG_MIPS_BOOT_FDT=y +CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_BEST_MATCH=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="boston # " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_CFI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_PCH_GBE=y +CONFIG_DM_PCI=y +CONFIG_PCI_XILINX=y +CONFIG_SYS_NS16550=y +CONFIG_LZ4=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig new file mode 100644 index 0000000..9b5fa5a --- /dev/null +++ b/configs/boston64r2el_defconfig @@ -0,0 +1,42 @@ +CONFIG_MIPS=y +CONFIG_TARGET_BOSTON=y +CONFIG_SYS_LITTLE_ENDIAN=y +CONFIG_CPU_MIPS64_R2=y +# CONFIG_MIPS_BOOT_CMDLINE_LEGACY is not set +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set +CONFIG_MIPS_BOOT_FDT=y +CONFIG_DEFAULT_DEVICE_TREE="img,boston" +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_BEST_MATCH=y +CONFIG_OF_STDOUT_VIA_ALIAS=y +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="boston # " +# CONFIG_CMD_ELF is not set +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_GREPENV=y +CONFIG_CMD_MEMTEST=y +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_PING=y +CONFIG_CMD_SNTP=y +CONFIG_CMD_DNS=y +CONFIG_CMD_LINK_LOCAL=y +CONFIG_CMD_TIME=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_CLK=y +CONFIG_MTD=y +CONFIG_CFI_FLASH=y +CONFIG_DM_ETH=y +CONFIG_PCH_GBE=y +CONFIG_DM_PCI=y +CONFIG_PCI_XILINX=y +CONFIG_SYS_NS16550=y +CONFIG_LZ4=y diff --git a/configs/cm_t35_defconfig b/configs/cm_t35_defconfig index d754fbc..79fa39c 100644 --- a/configs/cm_t35_defconfig +++ b/configs/cm_t35_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_CM_T35=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-T3x # " CONFIG_CMD_BOOTZ=y diff --git a/configs/cm_t54_defconfig b/configs/cm_t54_defconfig index 16f9443..a22fa63 100644 --- a/configs/cm_t54_defconfig +++ b/configs/cm_t54_defconfig @@ -1,13 +1,12 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_CM_T54=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_SPL_SATA_SUPPORT=y -# CONFIG_SPL_SPI_FLASH_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="CM-T54 # " CONFIG_CMD_BOOTZ=y diff --git a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig index c0a2c77..88d189a 100644 --- a/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_DEVELOP_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" controlcenterd 0.01" CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_PHYS_64BIT=y diff --git a/configs/controlcenterd_36BIT_SDCARD_defconfig b/configs/controlcenterd_36BIT_SDCARD_defconfig index 73cd33d..c8679e2 100644 --- a/configs/controlcenterd_36BIT_SDCARD_defconfig +++ b/configs/controlcenterd_36BIT_SDCARD_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" controlcenterd 0.01" CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_PHYS_64BIT=y diff --git a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig index efb8ad6..e94d72f 100644 --- a/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_DEVELOP_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" controlcenterd trailblazer 0.01" CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH,DEVELOP" diff --git a/configs/controlcenterd_TRAILBLAZER_defconfig b/configs/controlcenterd_TRAILBLAZER_defconfig index 45e8b8f..257fa85 100644 --- a/configs/controlcenterd_TRAILBLAZER_defconfig +++ b/configs/controlcenterd_TRAILBLAZER_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" controlcenterd trailblazer 0.01" CONFIG_MPC85xx=y CONFIG_TARGET_CONTROLCENTERD=y CONFIG_SYS_EXTRA_OPTIONS="TRAILBLAZER,SPIFLASH" diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index ae9175f..3b94de4 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NET2BIG_V2=y +CONFIG_IDENT_STRING=" D2 v2" CONFIG_SYS_EXTRA_OPTIONS="D2NET_V2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/devconcenter_defconfig b/configs/devconcenter_defconfig index 8468d8d..cf41cd1 100644 --- a/configs/devconcenter_defconfig +++ b/configs/devconcenter_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" devconcenter 0.06" CONFIG_4xx=y CONFIG_TARGET_INTIP=y CONFIG_FIT=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 29a246c..e836e5e 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y CONFIG_TARGET_DEVKIT8000=y -CONFIG_SPL=y CONFIG_VERSION_VARIABLE=y +CONFIG_SPL=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/dlvision-10g_defconfig b/configs/dlvision-10g_defconfig index 4253b55..621ac44 100644 --- a/configs/dlvision-10g_defconfig +++ b/configs/dlvision-10g_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" dlvision-10g 0.06" CONFIG_4xx=y CONFIG_TARGET_DLVISION_10G=y CONFIG_FIT=y diff --git a/configs/dlvision_defconfig b/configs/dlvision_defconfig index 8fd5add..586b802 100644 --- a/configs/dlvision_defconfig +++ b/configs/dlvision_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" dlvision 0.02" CONFIG_4xx=y CONFIG_TARGET_DLVISION=y CONFIG_FIT=y diff --git a/configs/dms-ba16-1g_defconfig b/configs/dms-ba16-1g_defconfig index a579af4..db5adcf 100644 --- a/configs/dms-ba16-1g_defconfig +++ b/configs/dms-ba16-1g_defconfig @@ -2,8 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_TARGET_ADVANTECH_DMS_BA16=y CONFIG_SYS_DDR_1G=y -CONFIG_HUSH_PARSER=y CONFIG_BOOTDELAY=1 +CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set @@ -24,7 +24,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_OF_LIBFDT=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y @@ -32,3 +31,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Advantech" CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_OF_LIBFDT=y diff --git a/configs/dms-ba16_defconfig b/configs/dms-ba16_defconfig index 365d05c..e36f3dc 100644 --- a/configs/dms-ba16_defconfig +++ b/configs/dms-ba16_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_MX6=y CONFIG_TARGET_ADVANTECH_DMS_BA16=y -CONFIG_HUSH_PARSER=y CONFIG_BOOTDELAY=1 +CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set @@ -23,7 +23,6 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_OF_LIBFDT=y CONFIG_USB=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y @@ -31,3 +30,4 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="Advantech" CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 +CONFIG_OF_LIBFDT=y diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 905f6ff..450e13e 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_DNS325=y +CONFIG_IDENT_STRING="\nD-Link DNS-325" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index 73740dd..15b54c8 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_DOCKSTAR=y +CONFIG_IDENT_STRING="\nSeagate FreeAgent DockStar" CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="DockStar> " # CONFIG_CMD_IMLS is not set diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 5738f1d..64df490 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_DRA7XX_EVM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -12,7 +13,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_DMA_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 2ddd8eb..5fdc2b7 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_TI_SECURE_DEVICE=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_DRA7XX_EVM=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_SUPPORT=y @@ -16,7 +17,6 @@ CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_STACK_R=y CONFIG_SPL_DMA_SUPPORT=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 656cc81..3ff055f 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SNAPDRAGON=y +CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="dragonboard410c => " diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 830b68b..3ff3ba4 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_DREAMPLUG=y +CONFIG_IDENT_STRING="\nMarvell-DreamPlug" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set diff --git a/configs/eco5pk_defconfig b/configs/eco5pk_defconfig index 78ab1c0..03aaa2a 100644 --- a/configs/eco5pk_defconfig +++ b/configs/eco5pk_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_ECO5PK=y CONFIG_FIT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ECO5-PK # " # CONFIG_CMD_IMLS is not set diff --git a/configs/edminiv2_defconfig b/configs/edminiv2_defconfig index 9f4538e..ef221b2 100644 --- a/configs/edminiv2_defconfig +++ b/configs/edminiv2_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_TARGET_EDMINIV2=y +CONFIG_IDENT_STRING=" EDMiniV2" CONFIG_BOOTDELAY=3 CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index c50da0c..e7163d3 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS7=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_IDENT_STRING=" for ESPRESSO7420" CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420" CONFIG_SYS_PROMPT="ESPRESSO7420 # " # CONFIG_AUTOBOOT is not set diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index c463f60..8d67f77 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_GOFLEXHOME=y +CONFIG_IDENT_STRING="\nSeagate GoFlex Home" CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="GoFlexHome> " # CONFIG_CMD_IMLS is not set diff --git a/configs/gplugd_defconfig b/configs/gplugd_defconfig index 6e14154..1a8ce9a 100644 --- a/configs/gplugd_defconfig +++ b/configs/gplugd_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_GPLUGD=y +CONFIG_IDENT_STRING="\nMarvell-gplugD" CONFIG_BOOTDELAY=3 # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y diff --git a/configs/gr_cpci_ax2000_defconfig b/configs/gr_cpci_ax2000_defconfig index b30590e..faf493b 100644 --- a/configs/gr_cpci_ax2000_defconfig +++ b/configs/gr_cpci_ax2000_defconfig @@ -1,4 +1,5 @@ CONFIG_SPARC=y +CONFIG_IDENT_STRING=" Gaisler LEON3 GR-CPCI-AX2000" CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_GR_CPCI_AX2000=y CONFIG_BOOTDELAY=5 diff --git a/configs/gr_ep2s60_defconfig b/configs/gr_ep2s60_defconfig index 302d936..5b045e3 100644 --- a/configs/gr_ep2s60_defconfig +++ b/configs/gr_ep2s60_defconfig @@ -1,4 +1,5 @@ CONFIG_SPARC=y +CONFIG_IDENT_STRING=" Gaisler LEON3 EP2S60" CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_GR_EP2S60=y CONFIG_BOOTDELAY=5 diff --git a/configs/gr_xc3s_1500_defconfig b/configs/gr_xc3s_1500_defconfig index d6ed305..2319307 100644 --- a/configs/gr_xc3s_1500_defconfig +++ b/configs/gr_xc3s_1500_defconfig @@ -1,4 +1,5 @@ CONFIG_SPARC=y +CONFIG_IDENT_STRING=" Gaisler LEON3 GR-XC3S-1500" CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_GR_XC3S_1500=y CONFIG_BOOTDELAY=5 diff --git a/configs/grsim_defconfig b/configs/grsim_defconfig index f827113..7e83dc9 100644 --- a/configs/grsim_defconfig +++ b/configs/grsim_defconfig @@ -1,4 +1,5 @@ CONFIG_SPARC=y +CONFIG_IDENT_STRING=" Gaisler GRSIM" CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_GRSIM=y CONFIG_BOOTDELAY=5 diff --git a/configs/grsim_leon2_defconfig b/configs/grsim_leon2_defconfig index f5e7c43..97efdfc 100644 --- a/configs/grsim_leon2_defconfig +++ b/configs/grsim_leon2_defconfig @@ -1,4 +1,5 @@ CONFIG_SPARC=y +CONFIG_IDENT_STRING=" Gaisler GRSIM LEON2" CONFIG_SYS_TEXT_BASE=0x00000000 CONFIG_TARGET_GRSIM_LEON2=y CONFIG_BOOTDELAY=5 diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index a6e4344..3ac89e3 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_GURUPLUG=y +CONFIG_IDENT_STRING="\nMarvell-GuruPlug" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/gwventana_defconfig b/configs/gwventana_defconfig index 9183147..5198962 100644 --- a/configs/gwventana_defconfig +++ b/configs/gwventana_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y CONFIG_SPL_STACK_R_ADDR=0x18000000 -CONFIG_DM_SERIAL=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index e20f8bc..3901dfe 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_IDENT_STRING="hikey" CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set diff --git a/configs/hrcon_defconfig b/configs/hrcon_defconfig index f67eda7..b6b583d 100644 --- a/configs/hrcon_defconfig +++ b/configs/hrcon_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" hrcon 0.01" CONFIG_MPC83xx=y CONFIG_TARGET_HRCON=y CONFIG_FIT=y diff --git a/configs/hrcon_dh_defconfig b/configs/hrcon_dh_defconfig index 5eff4ac..82ebc5f 100644 --- a/configs/hrcon_dh_defconfig +++ b/configs/hrcon_dh_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" hrcon dh 0.01" CONFIG_MPC83xx=y CONFIG_TARGET_HRCON=y CONFIG_FIT=y diff --git a/configs/iNet_D978_rev2_defconfig b/configs/iNet_D978_rev2_defconfig index 554f5d5..d5e6309 100644 --- a/configs/iNet_D978_rev2_defconfig +++ b/configs/iNet_D978_rev2_defconfig @@ -16,8 +16,8 @@ CONFIG_VIDEO_LCD_BL_PWM="PH0" CONFIG_VIDEO_LCD_PANEL_LVDS=y CONFIG_DEFAULT_DEVICE_TREE="sun8i-a33-inet-d978-rev2" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL=y CONFIG_SYS_EXTRA_OPTIONS="CONS_INDEX=5" +CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index 89a971c..f79f938 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_IB62X0=y +CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ib62x0 => " diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 8ccf515..c35ce08 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_ICONNECT=y +CONFIG_IDENT_STRING=" Iomega iConnect" CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="iconnect => " # CONFIG_CMD_IMLS is not set diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig new file mode 100644 index 0000000..63f03cd --- /dev/null +++ b/configs/imgtec_xilfpga_defconfig @@ -0,0 +1,25 @@ +CONFIG_MIPS=y +CONFIG_SYS_MALLOC_F_LEN=0x600 +CONFIG_TARGET_XILFPGA=y +# CONFIG_MIPS_BOOT_ENV_LEGACY is not set +CONFIG_MIPS_BOOT_FDT=y +CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr" +CONFIG_BOOTDELAY=5 +CONFIG_HUSH_PARSER=y +CONFIG_SYS_PROMPT="MIPSfpga # " +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_SAVEENV is not set +CONFIG_CMD_MEMINFO=y +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +CONFIG_CMD_DHCP=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_TIME=y +CONFIG_OF_EMBED=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_NETCONSOLE=y +CONFIG_CLK=y +CONFIG_XILINX_EMACLITE=y +CONFIG_SYS_NS16550=y +CONFIG_CMD_DHRYSTONE=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 6de6dde..3a5bf5e 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y +CONFIG_IDENT_STRING=" IS v2" CONFIG_SYS_EXTRA_OPTIONS="INETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/intip_defconfig b/configs/intip_defconfig index 7e7a6c0..9e1b44a 100644 --- a/configs/intip_defconfig +++ b/configs/intip_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" intip 0.06" CONFIG_4xx=y CONFIG_TARGET_INTIP=y CONFIG_FIT=y diff --git a/configs/io64_defconfig b/configs/io64_defconfig index 2093210..6215c77 100644 --- a/configs/io64_defconfig +++ b/configs/io64_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" io64 0.02" CONFIG_4xx=y CONFIG_TARGET_IO64=y CONFIG_FIT=y diff --git a/configs/io_defconfig b/configs/io_defconfig index 6cca9bf..139556e5 100644 --- a/configs/io_defconfig +++ b/configs/io_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" io 0.06" CONFIG_4xx=y CONFIG_TARGET_IO=y CONFIG_FIT=y diff --git a/configs/iocon_defconfig b/configs/iocon_defconfig index 54b8c18..2cc836d 100644 --- a/configs/iocon_defconfig +++ b/configs/iocon_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" iocon 0.06" CONFIG_4xx=y CONFIG_TARGET_IOCON=y CONFIG_FIT=y diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig index 3889213..4827934 100644 --- a/configs/kc1_defconfig +++ b/configs/kc1_defconfig @@ -1,8 +1,8 @@ CONFIG_ARM=y CONFIG_OMAP44XX=y +# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_KC1=y CONFIG_SPL=y -# CONFIG_SPL_NAND_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="kc1 # " CONFIG_CMD_BOOTZ=y diff --git a/configs/km_kirkwood_128m16_defconfig b/configs/km_kirkwood_128m16_defconfig index 67356b1..c4b542a 100644 --- a/configs/km_kirkwood_128m16_defconfig +++ b/configs/km_kirkwood_128m16_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile Kirkwood 128M16" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_128M16" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/km_kirkwood_defconfig b/configs/km_kirkwood_defconfig index 7482b93..228f50e 100644 --- a/configs/km_kirkwood_defconfig +++ b/configs/km_kirkwood_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile Kirkwood" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/km_kirkwood_pci_defconfig b/configs/km_kirkwood_pci_defconfig index 9b7a5fb..04c3dcb 100644 --- a/configs/km_kirkwood_pci_defconfig +++ b/configs/km_kirkwood_pci_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile Kirkwood PCI" CONFIG_SYS_EXTRA_OPTIONS="KM_KIRKWOOD_PCI" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/kmcoge5un_defconfig b/configs/kmcoge5un_defconfig index 221dcb5..d35cf11 100644 --- a/configs/kmcoge5un_defconfig +++ b/configs/kmcoge5un_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile COGE5UN" CONFIG_SYS_EXTRA_OPTIONS="KM_COGE5UN" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/kmnusa_defconfig b/configs/kmnusa_defconfig index 01f4fce..bd3987d 100644 --- a/configs/kmnusa_defconfig +++ b/configs/kmnusa_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile NUSA" CONFIG_SYS_EXTRA_OPTIONS="KM_NUSA" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/kmsugp1_defconfig b/configs/kmsugp1_defconfig index 8e0f6da..ceeb8d9 100644 --- a/configs/kmsugp1_defconfig +++ b/configs/kmsugp1_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile SUGP1" CONFIG_SYS_EXTRA_OPTIONS="KM_SUGP1" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/kmsuv31_defconfig b/configs/kmsuv31_defconfig index eb4d583..5540343 100644 --- a/configs/kmsuv31_defconfig +++ b/configs/kmsuv31_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile SUV31" CONFIG_SYS_EXTRA_OPTIONS="KM_SUV31" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/ls2080a_emu_defconfig b/configs/ls2080a_emu_defconfig index 21a0283..dfc1415 100644 --- a/configs/ls2080a_emu_defconfig +++ b/configs/ls2080a_emu_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080A_EMU=y +CONFIG_IDENT_STRING=" LS2080A-EMU" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls2080a_simu_defconfig b/configs/ls2080a_simu_defconfig index 1b670b0..a677cb9 100644 --- a/configs/ls2080a_simu_defconfig +++ b/configs/ls2080a_simu_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_LS2080A_SIMU=y +CONFIG_IDENT_STRING=" LS2080A-SIMU" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index b9aa961..5393084 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_LSXL=y +CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_SYS_EXTRA_OPTIONS="LSCHLV2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 794ec18..48bacaa 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_LSXL=y +CONFIG_IDENT_STRING=" LS-XHL" CONFIG_SYS_EXTRA_OPTIONS="LSXHL" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/lwmon5_defconfig b/configs/lwmon5_defconfig index 807b936..b6a0bef 100644 --- a/configs/lwmon5_defconfig +++ b/configs/lwmon5_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" - v2.0" CONFIG_4xx=y CONFIG_TARGET_LWMON5=y CONFIG_FIT=y diff --git a/configs/mcx_defconfig b/configs/mcx_defconfig index 2559848..eb88e6b 100644 --- a/configs/mcx_defconfig +++ b/configs/mcx_defconfig @@ -1,11 +1,11 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_GPIO_SUPPORT is not set +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_MCX=y CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set -# CONFIG_SPL_GPIO_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="mcx # " # CONFIG_CMD_IMI is not set diff --git a/configs/mgcoge3un_defconfig b/configs/mgcoge3un_defconfig index 6f62fc0..3ecfde4 100644 --- a/configs/mgcoge3un_defconfig +++ b/configs/mgcoge3un_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile COGE3UN" CONFIG_SYS_EXTRA_OPTIONS="KM_MGCOGE3UN" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/mt_ventoux_defconfig b/configs/mt_ventoux_defconfig index 20f79e6..ffa23ad 100644 --- a/configs/mt_ventoux_defconfig +++ b/configs/mt_ventoux_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_MT_VENTOUX=y CONFIG_FIT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="mt_ventoux => " # CONFIG_CMD_IMLS is not set diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index 536c9cd..5adf1ff 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -4,13 +4,11 @@ CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y -CONFIG_MMC0_CD_PIN="PF6" -# CONFIG_VIDEO is not set CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-nanopi-neo" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set -CONFIG_USB_EHCI_HCD=y CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 91e33d0..8a0cc01 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NAS220=y +CONFIG_IDENT_STRING="\nNAS 220" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="nas220> " diff --git a/configs/neo_defconfig b/configs/neo_defconfig index 93a402f..18b43e4 100644 --- a/configs/neo_defconfig +++ b/configs/neo_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" neo 0.02" CONFIG_4xx=y CONFIG_TARGET_NEO=y CONFIG_FIT=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index f30c56b..122ed7a 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NET2BIG_V2=y +CONFIG_IDENT_STRING=" 2Big v2" CONFIG_SYS_EXTRA_OPTIONS="NET2BIG_V2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index 47aad38..0547aa6 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y +CONFIG_IDENT_STRING=" NS v2 Lite" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_LITE_V2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 7b9f190..e72815d 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y +CONFIG_IDENT_STRING=" NS Max v2" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MAX_V2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index f46b9a1..1422787 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y +CONFIG_IDENT_STRING=" NS v2 Mini" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_MINI_V2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 1b94cee..6373255 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_NETSPACE_V2=y +CONFIG_IDENT_STRING=" NS v2" CONFIG_SYS_EXTRA_OPTIONS="NETSPACE_V2" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index 3e9ef68..ee70df0 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_MESON_GXBB=y CONFIG_TARGET_ODROID_C2=y +CONFIG_IDENT_STRING=" odroid-c2" CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" CONFIG_HUSH_PARSER=y # CONFIG_CMD_BDI is not set diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 15e9bd9..af2e4f7 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y +CONFIG_IDENT_STRING=" for ODROID-XU3" CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 63590dc..6ca7e2c 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_OMAP3_EVM=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="OMAP3_EVM # " # CONFIG_CMD_IMI is not set diff --git a/configs/omap3_ha_defconfig b/configs/omap3_ha_defconfig index 1dbac35..3fcbb76 100644 --- a/configs/omap3_ha_defconfig +++ b/configs/omap3_ha_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_TAO3530=y CONFIG_SYS_EXTRA_OPTIONS="SYS_BOARD_OMAP3_HA" CONFIG_BOOTDELAY=3 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMI is not set # CONFIG_CMD_IMLS is not set diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index af6dc31..e496afe 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_OMAP44XX=y +# CONFIG_SPL_EXT_SUPPORT is not set # CONFIG_SPL_I2C_SUPPORT is not set # CONFIG_SPL_NAND_SUPPORT is not set CONFIG_TARGET_OMAP4_PANDA=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 4d9de61..ed0917b 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_OMAP54XX=y -CONFIG_TARGET_OMAP5_UEVM=y -CONFIG_SPL=y # CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_TARGET_OMAP5_UEVM=y CONFIG_VERSION_VARIABLE=y +CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 2e14052..1bb0b7e 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_OPENRD=y +CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_BASE" CONFIG_BOOTDELAY=3 # CONFIG_CMD_IMLS is not set diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 49bd597..61c4506 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_OPENRD=y +CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_CLIENT" CONFIG_BOOTDELAY=3 # CONFIG_CMD_IMLS is not set diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index 5ee4ba2..8ed8c1c 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_OPENRD=y +CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_SYS_EXTRA_OPTIONS="BOARD_IS_OPENRD_ULTIMATE" CONFIG_BOOTDELAY=3 # CONFIG_CMD_IMLS is not set diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index c42f15b..cfae5f0 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_SUNXI=y +CONFIG_SPL_I2C_SUPPORT=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881979 @@ -7,9 +8,8 @@ CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-orangepi-plus2e" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set -CONFIG_SPL=y -CONFIG_SPL_I2C_SUPPORT=y CONFIG_SYS_EXTRA_OPTIONS="MACPWR=SUNXI_GPD(6)" +CONFIG_SPL=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_FPGA is not set diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 6ad01af..0eff767 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ORIGEN=y +CONFIG_IDENT_STRING=" for ORIGEN" CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" CONFIG_SPL=y CONFIG_HUSH_PARSER=y diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig index 3a9470b..d55e4fe 100644 --- a/configs/pcm051_rev1_defconfig +++ b/configs/pcm051_rev1_defconfig @@ -17,8 +17,8 @@ CONFIG_SYS_EXTRA_OPTIONS="REV1" CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_ETH_SUPPORT=y -CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL" CONFIG_SPL_NET_SUPPORT=y +CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 1088795..cc824e6 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -17,8 +17,8 @@ CONFIG_SYS_EXTRA_OPTIONS="REV3" CONFIG_VERSION_VARIABLE=y CONFIG_SPL=y CONFIG_SPL_ETH_SUPPORT=y -CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL" CONFIG_SPL_NET_SUPPORT=y +CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL" CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 3a4ec96..9472bb0 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_PEACH_PI=y +CONFIG_IDENT_STRING=" for Peach-Pi" CONFIG_DEFAULT_DEVICE_TREE="exynos5800-peach-pi" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index 3b73237..d208d68 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_PEACH_PIT=y +CONFIG_IDENT_STRING=" for Peach-Pit" CONFIG_DEFAULT_DEVICE_TREE="exynos5420-peach-pit" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/pepper_defconfig b/configs/pepper_defconfig index f297a94..17cd66f 100644 --- a/configs/pepper_defconfig +++ b/configs/pepper_defconfig @@ -11,8 +11,8 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_POWER_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_WATCHDOG_SUPPORT=y -CONFIG_SPL=y CONFIG_VERSION_VARIABLE=y +CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="pepper# " CONFIG_CMD_BOOTZ=y diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 2b1d873..258adba 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_POGO_E02=y +CONFIG_IDENT_STRING="\nPogo E02" CONFIG_BOOTDELAY=3 CONFIG_SYS_PROMPT="PogoE02> " # CONFIG_CMD_IMLS is not set diff --git a/configs/portl2_defconfig b/configs/portl2_defconfig index 94f9349..546f785 100644 --- a/configs/portl2_defconfig +++ b/configs/portl2_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_KM_KIRKWOOD=y +CONFIG_IDENT_STRING="\nKeymile Port-L2" CONFIG_SYS_EXTRA_OPTIONS="KM_PORTL2" CONFIG_VERSION_VARIABLE=y CONFIG_HUSH_PARSER=y diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index dbafcf2..e4c846f 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_KIRKWOOD=y CONFIG_TARGET_SHEEVAPLUG=y +CONFIG_IDENT_STRING="\nMarvell-Sheevaplug" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y CONFIG_CMD_BOOTZ=y diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index a81e2e5..68ede03 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -4,12 +4,12 @@ CONFIG_TARGET_SMARTWEB=y CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_SPL_NAND_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_FIT=y CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260" CONFIG_BOOTDELAY=3 CONFIG_SPL=y -CONFIG_SPL_NAND_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot# " CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index f65a2db..6e335f0 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SMDK5250=y +CONFIG_IDENT_STRING=" for SMDK5250" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-smdk5250" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index ddf61a5..c1d8c45 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SMDK5420=y +CONFIG_IDENT_STRING=" for SMDK5420" CONFIG_DEFAULT_DEVICE_TREE="exynos5420-smdk5420" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index 0948534..6bfe26c 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_S5PC1XX=y CONFIG_TARGET_SMDKC100=y +CONFIG_IDENT_STRING=" for SMDKC100" CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_BOOTDELAY=3 CONFIG_HUSH_PARSER=y diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 5e3844c..c8c182b 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS4=y +CONFIG_IDENT_STRING=" for SMDKC210/V310" CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310" CONFIG_SPL=y CONFIG_HUSH_PARSER=y diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index 7c5be7e..a44082e 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y -CONFIG_TARGET_SNIPER=y -CONFIG_SPL=y # CONFIG_SPL_EXT_SUPPORT is not set # CONFIG_SPL_NAND_SUPPORT is not set +CONFIG_TARGET_SNIPER=y +CONFIG_SPL=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="sniper # " CONFIG_CMD_BOOTZ=y diff --git a/configs/snow_defconfig b/configs/snow_defconfig index d2697f5..3d8c8ea 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SNOW=y +CONFIG_IDENT_STRING=" for snow" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-snow" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/spear300_defconfig b/configs/spear300_defconfig index ed45de8..620758e 100644 --- a/configs/spear300_defconfig +++ b/configs/spear300_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR300" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear300_nand_defconfig b/configs/spear300_nand_defconfig index d525455..497b29d 100644 --- a/configs/spear300_nand_defconfig +++ b/configs/spear300_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,NAND" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear300_usbtty_defconfig b/configs/spear300_usbtty_defconfig index 5c67aeb..34f0ec0 100644 --- a/configs/spear300_usbtty_defconfig +++ b/configs/spear300_usbtty_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear300_usbtty_nand_defconfig b/configs/spear300_usbtty_nand_defconfig index e08a5d6..d2cf814 100644 --- a/configs/spear300_usbtty_nand_defconfig +++ b/configs/spear300_usbtty_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR300=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR300,USBTTY,NAND" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear310_defconfig b/configs/spear310_defconfig index cdead20..1b4483d 100644 --- a/configs/spear310_defconfig +++ b/configs/spear310_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR310" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear310_nand_defconfig b/configs/spear310_nand_defconfig index 2ae7bf2..6a51538 100644 --- a/configs/spear310_nand_defconfig +++ b/configs/spear310_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,NAND" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear310_pnor_defconfig b/configs/spear310_pnor_defconfig index e0ad7dc..f6424f8 100644 --- a/configs/spear310_pnor_defconfig +++ b/configs/spear310_pnor_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,FLASH_PNOR" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear310_usbtty_defconfig b/configs/spear310_usbtty_defconfig index a690e3a..f35d363 100644 --- a/configs/spear310_usbtty_defconfig +++ b/configs/spear310_usbtty_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear310_usbtty_nand_defconfig b/configs/spear310_usbtty_nand_defconfig index 37e5776..a1f9fbf 100644 --- a/configs/spear310_usbtty_nand_defconfig +++ b/configs/spear310_usbtty_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,NAND" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear310_usbtty_pnor_defconfig b/configs/spear310_usbtty_pnor_defconfig index 3e08fd6..4ac4da5 100644 --- a/configs/spear310_usbtty_pnor_defconfig +++ b/configs/spear310_usbtty_pnor_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR310=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR310,USBTTY,FLASH_PNOR" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear320_defconfig b/configs/spear320_defconfig index 4d01d46..7b09882 100644 --- a/configs/spear320_defconfig +++ b/configs/spear320_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR320" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear320_nand_defconfig b/configs/spear320_nand_defconfig index b03fab8..53e3f01 100644 --- a/configs/spear320_nand_defconfig +++ b/configs/spear320_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,NAND" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear320_pnor_defconfig b/configs/spear320_pnor_defconfig index f85ae43..d23eb36 100644 --- a/configs/spear320_pnor_defconfig +++ b/configs/spear320_pnor_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,FLASH_PNOR" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear320_usbtty_defconfig b/configs/spear320_usbtty_defconfig index a5fe95a..26ca01f 100644 --- a/configs/spear320_usbtty_defconfig +++ b/configs/spear320_usbtty_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear320_usbtty_nand_defconfig b/configs/spear320_usbtty_nand_defconfig index 3f6f14f..2478fe0 100644 --- a/configs/spear320_usbtty_nand_defconfig +++ b/configs/spear320_usbtty_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,NAND" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear320_usbtty_pnor_defconfig b/configs/spear320_usbtty_pnor_defconfig index 8831eba..e774225 100644 --- a/configs/spear320_usbtty_pnor_defconfig +++ b/configs/spear320_usbtty_pnor_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR320=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR320,USBTTY,FLASH_PNOR" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear600_defconfig b/configs/spear600_defconfig index 9d23978..e14dcc0 100644 --- a/configs/spear600_defconfig +++ b/configs/spear600_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR600" CONFIG_BOOTDELAY=1 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/spear600_nand_defconfig b/configs/spear600_nand_defconfig index b3df048..6c45fec 100644 --- a/configs/spear600_nand_defconfig +++ b/configs/spear600_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,NAND" CONFIG_BOOTDELAY=1 CONFIG_CMD_I2C=y diff --git a/configs/spear600_usbtty_defconfig b/configs/spear600_usbtty_defconfig index 4714959..4531168 100644 --- a/configs/spear600_usbtty_defconfig +++ b/configs/spear600_usbtty_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spear600_usbtty_nand_defconfig b/configs/spear600_usbtty_nand_defconfig index 034a089..968e7e4 100644 --- a/configs/spear600_usbtty_nand_defconfig +++ b/configs/spear600_usbtty_nand_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_SPEAR600=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_SYS_EXTRA_OPTIONS="SPEAR600,USBTTY,NAND" CONFIG_BOOTDELAY=-1 CONFIG_CMD_I2C=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index b81a285..74287ea 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SPRING=y +CONFIG_IDENT_STRING=" for spring" CONFIG_DEFAULT_DEVICE_TREE="exynos5250-spring" CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/strider_con_defconfig b/configs/strider_con_defconfig index 6253615..66a0b97 100644 --- a/configs/strider_con_defconfig +++ b/configs/strider_con_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" strider con 0.01" CONFIG_MPC83xx=y CONFIG_TARGET_STRIDER=y CONFIG_FIT=y diff --git a/configs/strider_con_dp_defconfig b/configs/strider_con_dp_defconfig index 3d325f4..3482653 100644 --- a/configs/strider_con_dp_defconfig +++ b/configs/strider_con_dp_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" strider con dp 0.01" CONFIG_MPC83xx=y CONFIG_TARGET_STRIDER=y CONFIG_FIT=y diff --git a/configs/strider_cpu_defconfig b/configs/strider_cpu_defconfig index 160df24..d554b0c 100644 --- a/configs/strider_cpu_defconfig +++ b/configs/strider_cpu_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" strider cpu 0.01" CONFIG_MPC83xx=y CONFIG_TARGET_STRIDER=y CONFIG_FIT=y diff --git a/configs/strider_cpu_dp_defconfig b/configs/strider_cpu_dp_defconfig index 2a2733d..5394d2f 100644 --- a/configs/strider_cpu_dp_defconfig +++ b/configs/strider_cpu_dp_defconfig @@ -1,4 +1,5 @@ CONFIG_PPC=y +CONFIG_IDENT_STRING=" strider cpu dp 0.01" CONFIG_MPC83xx=y CONFIG_TARGET_STRIDER=y CONFIG_FIT=y diff --git a/configs/tao3530_defconfig b/configs/tao3530_defconfig index 48b30fc..88a3725 100644 --- a/configs/tao3530_defconfig +++ b/configs/tao3530_defconfig @@ -1,9 +1,9 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_TAO3530=y CONFIG_BOOTDELAY=3 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="TAO-3530 # " # CONFIG_CMD_IMI is not set diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index cd74631..6dc2242 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -1,7 +1,6 @@ CONFIG_ARC=y CONFIG_TARGET_TB100=y CONFIG_SYS_CLK_FREQ=500000000 -CONFIG_DM_SERIAL=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100" CONFIG_BOOTDELAY=3 diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 8242103..9bbff6c 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -1,5 +1,6 @@ CONFIG_ARM=y CONFIG_TARGET_THUNDERX_88XX=y +CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core" CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_BOOTDELAY=5 CONFIG_HUSH_PARSER=y diff --git a/configs/twister_defconfig b/configs/twister_defconfig index 6d67f32..f024659 100644 --- a/configs/twister_defconfig +++ b/configs/twister_defconfig @@ -1,10 +1,10 @@ CONFIG_ARM=y CONFIG_OMAP34XX=y +# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_TARGET_TWISTER=y CONFIG_FIT=y CONFIG_BOOTDELAY=10 CONFIG_SPL=y -# CONFIG_SPL_EXT_SUPPORT is not set CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="twister => " # CONFIG_CMD_IMLS is not set diff --git a/configs/uniphier_ld11_defconfig b/configs/uniphier_ld11_defconfig index 3fed739..f6578c1 100644 --- a/configs/uniphier_ld11_defconfig +++ b/configs/uniphier_ld11_defconfig @@ -26,7 +26,6 @@ CONFIG_GPIO_UNIPHIER=y CONFIG_MISC=y CONFIG_I2C_EEPROM=y CONFIG_USB=y -CONFIG_DM_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y CONFIG_USB_STORAGE=y diff --git a/configs/vexpress_aemv8a_dram_defconfig b/configs/vexpress_aemv8a_dram_defconfig index 15a7f6f..59fe412 100644 --- a/configs/vexpress_aemv8a_dram_defconfig +++ b/configs/vexpress_aemv8a_dram_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_BOOTDELAY=1 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VExpress64# " diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 6930c1c..e7a0369 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS64_JUNO=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_BOOTDELAY=1 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VExpress64# " diff --git a/configs/vexpress_aemv8a_semi_defconfig b/configs/vexpress_aemv8a_semi_defconfig index cb04d19..7e5b53f 100644 --- a/configs/vexpress_aemv8a_semi_defconfig +++ b/configs/vexpress_aemv8a_semi_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_TARGET_VEXPRESS64_BASE_FVP=y CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_BOOTDELAY=1 CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="VExpress64# " diff --git a/configs/warp7_secure_defconfig b/configs/warp7_secure_defconfig index 34fcdea..b6458d1 100644 --- a/configs/warp7_secure_defconfig +++ b/configs/warp7_secure_defconfig @@ -1,6 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_MX7=y CONFIG_TARGET_WARP7=y +CONFIG_ARMV7_BOOT_SEC_DEFAULT=y # CONFIG_ARMV7_VIRT is not set CONFIG_IMX_RDC=y CONFIG_IMX_BOOTAUX=y @@ -24,13 +25,12 @@ CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_USB_GADGET=y CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_G_DNL_MANUFACTURER="FSL" CONFIG_G_DNL_VENDOR_NUM=0x0525 CONFIG_G_DNL_PRODUCT_NUM=0xa4a5 -CONFIG_USB_EHCI_HCD=y -CONFIG_MXC_USB_OTG_HACTIVE=y CONFIG_OF_LIBFDT=y -CONFIG_ARMV7_BOOT_SEC_DEFAULT=y diff --git a/configs/x600_defconfig b/configs/x600_defconfig index 94b837b..69501b4 100644 --- a/configs/x600_defconfig +++ b/configs/x600_defconfig @@ -3,6 +3,7 @@ CONFIG_TARGET_X600=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_IDENT_STRING="-SPEAr" CONFIG_BOOTDELAY=3 CONFIG_SPL=y CONFIG_SPL_NOR_SUPPORT=y diff --git a/configs/xilinx_zynqmp_ep_defconfig b/configs/xilinx_zynqmp_ep_defconfig index 196eb69..bd8b906 100644 --- a/configs/xilinx_zynqmp_ep_defconfig +++ b/configs/xilinx_zynqmp_ep_defconfig @@ -5,6 +5,7 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ZYNQMP_USB=y CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-ep108" +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y @@ -46,6 +47,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig index 2af1a59..6afacd2 100644 --- a/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm015_dc1_defconfig @@ -3,6 +3,7 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm015_dc1" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ZYNQMP_USB=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm015 dc1" CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm015-dc1" CONFIG_FIT=y @@ -37,6 +38,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig index da96b96..4068c28 100644 --- a/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm016_dc2_defconfig @@ -2,17 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm016_dc2" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 +# CONFIG_SPL_FAT_SUPPORT is not set +# CONFIG_SPL_LIBDISK_SUPPORT is not set +# CONFIG_SPL_MMC_SUPPORT is not set CONFIG_ZYNQMP_USB=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm016 dc2" CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm016-dc2" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL=y -# CONFIG_SPL_FAT_SUPPORT is not set -# CONFIG_SPL_LIBDISK_SUPPORT is not set -# CONFIG_SPL_MMC_SUPPORT is not set -# CONFIG_SPL_FLASH_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ZynqMP> " @@ -41,6 +41,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig index f9cdbe2..c717f04 100644 --- a/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm018_dc4_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y -CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm018_dc4" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4" CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4" CONFIG_FIT=y @@ -33,6 +33,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig index 2fbba0b..1a27bd0 100644 --- a/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig +++ b/configs/xilinx_zynqmp_zc1751_xm019_dc5_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1751_xm019_dc5" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm019 dc5" CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm019-dc5" CONFIG_FIT=y @@ -32,6 +33,8 @@ CONFIG_OF_EMBED=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_CADENCE=y diff --git a/configs/xilinx_zynqmp_zcu102_defconfig b/configs/xilinx_zynqmp_zcu102_defconfig index 0811f36..90b5ff6 100644 --- a/configs/xilinx_zynqmp_zcu102_defconfig +++ b/configs/xilinx_zynqmp_zcu102_defconfig @@ -3,8 +3,10 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ZYNQMP_USB=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102" CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102" +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y @@ -37,6 +39,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_DM_MMC_OPS=y diff --git a/configs/xilinx_zynqmp_zcu102_revB_defconfig b/configs/xilinx_zynqmp_zcu102_revB_defconfig index 3bb0144..5a0d686 100644 --- a/configs/xilinx_zynqmp_zcu102_revB_defconfig +++ b/configs/xilinx_zynqmp_zcu102_revB_defconfig @@ -3,8 +3,10 @@ CONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zcu102" CONFIG_ARCH_ZYNQMP=y CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_ZYNQMP_USB=y +CONFIG_IDENT_STRING=" Xilinx ZynqMP ZCU102" CONFIG_SYS_TEXT_BASE=0x8000000 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu102-revB" +CONFIG_AHCI=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y @@ -37,6 +39,8 @@ CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_BLK=y +CONFIG_FPGA_XILINX=y +CONFIG_FPGA_ZYNQMPPL=y CONFIG_DM_GPIO=y CONFIG_DM_MMC=y CONFIG_DM_MMC_OPS=y diff --git a/doc/README.boston b/doc/README.boston new file mode 100644 index 0000000..38f6710 --- /dev/null +++ b/doc/README.boston @@ -0,0 +1,58 @@ +MIPS Boston Development Board + +--------- + About +--------- + +The MIPS Boston development board is built around an FPGA & 3 PCIe controllers, +one of which is connected to an Intel EG20T Platform Controller Hub which +provides most connectivity to the board. It is used during the development & +testing of both new CPUs and the software support for them. It is essentially +the successor of the older MIPS Malta board. + +-------- + QEMU +-------- + +U-Boot can be run on a currently out-of-tree branch of QEMU with support for +the Boston board added. This QEMU code can currently be found in the "boston" +branch of git://git.linux-mips.org/pub/scm/paul/qemu.git and used like so: + + $ git clone git://git.linux-mips.org/pub/scm/paul/qemu.git -b boston + $ cd qemu + $ ./configure --target-list=mips64el-softmmu + $ make + $ ./mips64el-softmmu/qemu-system-mips64el -M boston -m 2G \ + -bios u-boot.bin -serial stdio + +Please note that QEMU will default to emulating the I6400 CPU which implements +the MIPS64r6 ISA, and at the time of writing doesn't implement any earlier CPUs +with support for the CPS features the Boston board relies upon. You will +therefore need to configure U-Boot to build for MIPSr6 in order to obtain a +binary that will work in QEMU. + +------------- + Toolchain +------------- + +If building for MIPSr6 then you will need a toolchain including GCC 5.x or +newer, or the Codescape toolchain available for download from Imagination +Technologies: + + http://codescape-mips-sdk.imgtec.com/components/toolchain/2015.06-05/ + +The "IMG GNU Linux Toolchain" is capable of building for all current MIPS ISAs, +architecture revisions & both endiannesses. + +-------- + TODO +-------- + + - AHCI support + - CPU driver + - Exception handling (+UHI?) + - Flash support + - IOCU support + - L2 cache support + - More general LCD display driver + - Multi-arch-variant multi-endian fat binary diff --git a/drivers/Kconfig b/drivers/Kconfig index 4f84469..4c555a0 100644 --- a/drivers/Kconfig +++ b/drivers/Kconfig @@ -20,6 +20,8 @@ source "drivers/dfu/Kconfig" source "drivers/dma/Kconfig" +source "drivers/fpga/Kconfig" + source "drivers/gpio/Kconfig" source "drivers/hwmon/Kconfig" diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 8f3b96a..c05ce2a 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -20,6 +20,14 @@ config SPL_CLK setting up clocks within SPL, and allows the same drivers to be used as U-Boot proper. +config CLK_BOSTON + def_bool y if TARGET_BOSTON + depends on CLK + select REGMAP + select SYSCON + help + Enable this to support the clocks + source "drivers/clk/tegra/Kconfig" source "drivers/clk/uniphier/Kconfig" source "drivers/clk/exynos/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index 778d748..40a5e8c 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -15,3 +15,4 @@ obj-y += tegra/ obj-$(CONFIG_CLK_UNIPHIER) += uniphier/ obj-$(CONFIG_CLK_EXYNOS) += exynos/ obj-$(CONFIG_CLK_AT91) += at91/ +obj-$(CONFIG_CLK_BOSTON) += clk_boston.o diff --git a/drivers/clk/clk_boston.c b/drivers/clk/clk_boston.c new file mode 100644 index 0000000..78f1b75 --- /dev/null +++ b/drivers/clk/clk_boston.c @@ -0,0 +1,97 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <clk-uclass.h> +#include <dm.h> +#include <dt-bindings/clock/boston-clock.h> +#include <regmap.h> +#include <syscon.h> + +struct clk_boston { + struct regmap *regmap; +}; + +#define BOSTON_PLAT_MMCMDIV 0x30 +# define BOSTON_PLAT_MMCMDIV_CLK0DIV (0xff << 0) +# define BOSTON_PLAT_MMCMDIV_INPUT (0xff << 8) +# define BOSTON_PLAT_MMCMDIV_MUL (0xff << 16) +# define BOSTON_PLAT_MMCMDIV_CLK1DIV (0xff << 24) + +static uint32_t ext_field(uint32_t val, uint32_t mask) +{ + return (val & mask) >> (ffs(mask) - 1); +} + +static ulong clk_boston_get_rate(struct clk *clk) +{ + struct clk_boston *state = dev_get_platdata(clk->dev); + uint32_t in_rate, mul, div; + uint mmcmdiv; + int err; + + err = regmap_read(state->regmap, BOSTON_PLAT_MMCMDIV, &mmcmdiv); + if (err) + return 0; + + in_rate = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_INPUT); + mul = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_MUL); + + switch (clk->id) { + case BOSTON_CLK_SYS: + div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK0DIV); + break; + case BOSTON_CLK_CPU: + div = ext_field(mmcmdiv, BOSTON_PLAT_MMCMDIV_CLK1DIV); + break; + default: + return 0; + } + + return (in_rate * mul * 1000000) / div; +} + +const struct clk_ops clk_boston_ops = { + .get_rate = clk_boston_get_rate, +}; + +static int clk_boston_ofdata_to_platdata(struct udevice *dev) +{ + struct clk_boston *state = dev_get_platdata(dev); + struct udevice *syscon; + int err; + + err = uclass_get_device_by_phandle(UCLASS_SYSCON, dev, + "regmap", &syscon); + if (err) { + error("unable to find syscon device\n"); + return err; + } + + state->regmap = syscon_get_regmap(syscon); + if (!state->regmap) { + error("unable to find regmap\n"); + return -ENODEV; + } + + return 0; +} + +static const struct udevice_id clk_boston_match[] = { + { + .compatible = "img,boston-clock", + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(clk_boston) = { + .name = "boston_clock", + .id = UCLASS_CLK, + .of_match = clk_boston_match, + .ofdata_to_platdata = clk_boston_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct clk_boston), + .ops = &clk_boston_ops, +}; diff --git a/drivers/core/lists.c b/drivers/core/lists.c index 6a634e6..23b6ba7 100644 --- a/drivers/core/lists.c +++ b/drivers/core/lists.c @@ -101,36 +101,24 @@ int device_bind_driver_to_node(struct udevice *parent, const char *drv_name, #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA) /** - * driver_check_compatible() - Check if a driver is compatible with this node + * driver_check_compatible() - Check if a driver matches a compatible string * - * @param blob: Device tree pointer - * @param offset: Offset of node in device tree * @param of_match: List of compatible strings to match * @param of_idp: Returns the match that was found - * @return 0 if there is a match, -ENOENT if no match, -ENODEV if the node - * does not have a compatible string, other error <0 if there is a device - * tree error + * @param compat: The compatible string to search for + * @return 0 if there is a match, -ENOENT if no match */ -static int driver_check_compatible(const void *blob, int offset, - const struct udevice_id *of_match, - const struct udevice_id **of_idp) +static int driver_check_compatible(const struct udevice_id *of_match, + const struct udevice_id **of_idp, + const char *compat) { - int ret; - - *of_idp = NULL; if (!of_match) return -ENOENT; while (of_match->compatible) { - ret = fdt_node_check_compatible(blob, offset, - of_match->compatible); - if (!ret) { + if (!strcmp(of_match->compatible, compat)) { *of_idp = of_match; return 0; - } else if (ret == -FDT_ERR_NOTFOUND) { - return -ENODEV; - } else if (ret < 0) { - return -EINVAL; } of_match++; } @@ -147,28 +135,46 @@ int lists_bind_fdt(struct udevice *parent, const void *blob, int offset, struct driver *entry; struct udevice *dev; bool found = false; - const char *name; + const char *name, *compat_list, *compat; + int compat_length, i; int result = 0; int ret = 0; - dm_dbg("bind node %s\n", fdt_get_name(blob, offset, NULL)); + name = fdt_get_name(blob, offset, NULL); + dm_dbg("bind node %s\n", name); if (devp) *devp = NULL; - for (entry = driver; entry != driver + n_ents; entry++) { - ret = driver_check_compatible(blob, offset, entry->of_match, - &id); - name = fdt_get_name(blob, offset, NULL); - if (ret == -ENOENT) { - continue; - } else if (ret == -ENODEV) { + + compat_list = fdt_getprop(blob, offset, "compatible", &compat_length); + if (!compat_list) { + if (compat_length == -FDT_ERR_NOTFOUND) { dm_dbg("Device '%s' has no compatible string\n", name); - break; - } else if (ret) { - dm_warn("Device tree error at offset %d\n", offset); - result = ret; - break; + return 0; } + dm_warn("Device tree error at offset %d\n", offset); + return compat_length; + } + + /* + * Walk through the compatible string list, attempting to match each + * compatible string in order such that we match in order of priority + * from the first string to the last. + */ + for (i = 0; i < compat_length; i += strlen(compat) + 1) { + compat = compat_list + i; + dm_dbg(" - attempt to match compatible string '%s'\n", + compat); + + for (entry = driver; entry != driver + n_ents; entry++) { + ret = driver_check_compatible(entry->of_match, &id, + compat); + if (!ret) + break; + } + if (entry == driver + n_ents) + continue; + dm_dbg(" - found match at '%s'\n", entry->name); ret = device_bind_with_driver_data(parent, entry, name, id->data, offset, &dev); @@ -188,10 +194,8 @@ int lists_bind_fdt(struct udevice *parent, const void *blob, int offset, break; } - if (!found && !result && ret != -ENODEV) { - dm_dbg("No match for node '%s'\n", - fdt_get_name(blob, offset, NULL)); - } + if (!found && !result && ret != -ENODEV) + dm_dbg("No match for node '%s'\n", name); return result; } diff --git a/drivers/core/regmap.c b/drivers/core/regmap.c index 0299ff0..c68bcba 100644 --- a/drivers/core/regmap.c +++ b/drivers/core/regmap.c @@ -13,6 +13,8 @@ #include <mapmem.h> #include <regmap.h> +#include <asm/io.h> + DECLARE_GLOBAL_DATA_PTR; static struct regmap *regmap_alloc_count(int count) @@ -117,3 +119,21 @@ int regmap_uninit(struct regmap *map) return 0; } + +int regmap_read(struct regmap *map, uint offset, uint *valp) +{ + uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); + + *valp = le32_to_cpu(readl(ptr)); + + return 0; +} + +int regmap_write(struct regmap *map, uint offset, uint val) +{ + uint32_t *ptr = map_physmem(map->base + offset, 4, MAP_NOCACHE); + + writel(cpu_to_le32(val), ptr); + + return 0; +} diff --git a/drivers/core/syscon-uclass.c b/drivers/core/syscon-uclass.c index 01bd968..2148469 100644 --- a/drivers/core/syscon-uclass.c +++ b/drivers/core/syscon-uclass.c @@ -95,3 +95,14 @@ UCLASS_DRIVER(syscon) = { .per_device_auto_alloc_size = sizeof(struct syscon_uc_info), .pre_probe = syscon_pre_probe, }; + +static const struct udevice_id generic_syscon_ids[] = { + { .compatible = "syscon" }, + { } +}; + +U_BOOT_DRIVER(generic_syscon) = { + .name = "syscon", + .id = UCLASS_SYSCON, + .of_match = generic_syscon_ids, +}; diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig new file mode 100644 index 0000000..f3f6bf7 --- /dev/null +++ b/drivers/fpga/Kconfig @@ -0,0 +1,20 @@ +menu "FPGA support" + +config FPGA + bool + +config FPGA_XILINX + bool "Enable Xilinx FPGA drivers" + select FPGA + help + Enable Xilinx FPGA specific functions which includes bitstream + (in BIT format), fpga and device validation. + +config FPGA_ZYNQMPPL + bool "Enable Xilinx FPGA driver for ZynqMP" + depends on FPGA_XILINX + help + Enable FPGA driver for loading bitstream in BIT and BIN format + on Xilinx Zynq UltraScale+ (ZynqMP) device. + +endmenu diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile index fec3fec..777706f 100644 --- a/drivers/fpga/Makefile +++ b/drivers/fpga/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_FPGA_SPARTAN2) += spartan2.o obj-$(CONFIG_FPGA_SPARTAN3) += spartan3.o obj-$(CONFIG_FPGA_VIRTEX2) += virtex2.o obj-$(CONFIG_FPGA_ZYNQPL) += zynqpl.o +obj-$(CONFIG_FPGA_ZYNQMPPL) += zynqmppl.o obj-$(CONFIG_FPGA_XILINX) += xilinx.o obj-$(CONFIG_FPGA_LATTICE) += ivm_core.o lattice.o ifdef CONFIG_FPGA_ALTERA diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c index d459a2f..2cd0104 100644 --- a/drivers/fpga/xilinx.c +++ b/drivers/fpga/xilinx.c @@ -199,6 +199,9 @@ int xilinx_info(xilinx_desc *desc) case xilinx_zynq: printf("Zynq PL\n"); break; + case xilinx_zynqmp: + printf("ZynqMP PL\n"); + break; /* Add new family types here */ default: printf ("Unknown family type, %d\n", desc->family); @@ -227,6 +230,9 @@ int xilinx_info(xilinx_desc *desc) case devcfg: printf("Device configuration interface (Zynq)\n"); break; + case csu_dma: + printf("csu_dma configuration interface (ZynqMP)\n"); + break; /* Add new interface types here */ default: printf ("Unsupported interface type, %d\n", desc->iface); diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c new file mode 100644 index 0000000..23039c3 --- /dev/null +++ b/drivers/fpga/zynqmppl.c @@ -0,0 +1,238 @@ +/* + * (C) Copyright 2015 - 2016, Xilinx, Inc, + * Michal Simek <michal.simek@xilinx.com> + * Siva Durga Prasad <siva.durga.paladugu@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <console.h> +#include <common.h> +#include <zynqmppl.h> +#include <linux/sizes.h> + +#define DUMMY_WORD 0xffffffff + +/* Xilinx binary format header */ +static const u32 bin_format[] = { + DUMMY_WORD, /* Dummy words */ + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + DUMMY_WORD, + 0x000000bb, /* Sync word */ + 0x11220044, /* Sync word */ + DUMMY_WORD, + DUMMY_WORD, + 0xaa995566, /* Sync word */ +}; + +#define SWAP_NO 1 +#define SWAP_DONE 2 + +/* + * Load the whole word from unaligned buffer + * Keep in your mind that it is byte loading on little-endian system + */ +static u32 load_word(const void *buf, u32 swap) +{ + u32 word = 0; + u8 *bitc = (u8 *)buf; + int p; + + if (swap == SWAP_NO) { + for (p = 0; p < 4; p++) { + word <<= 8; + word |= bitc[p]; + } + } else { + for (p = 3; p >= 0; p--) { + word <<= 8; + word |= bitc[p]; + } + } + + return word; +} + +static u32 check_header(const void *buf) +{ + u32 i, pattern; + int swap = SWAP_NO; + u32 *test = (u32 *)buf; + + debug("%s: Let's check bitstream header\n", __func__); + + /* Checking that passing bin is not a bitstream */ + for (i = 0; i < ARRAY_SIZE(bin_format); i++) { + pattern = load_word(&test[i], swap); + + /* + * Bitstreams in binary format are swapped + * compare to regular bistream. + * Do not swap dummy word but if swap is done assume + * that parsing buffer is binary format + */ + if ((__swab32(pattern) != DUMMY_WORD) && + (__swab32(pattern) == bin_format[i])) { + swap = SWAP_DONE; + debug("%s: data swapped - let's swap\n", __func__); + } + + debug("%s: %d/%px: pattern %x/%x bin_format\n", __func__, i, + &test[i], pattern, bin_format[i]); + } + debug("%s: Found bitstream header at %px %s swapinng\n", __func__, + buf, swap == SWAP_NO ? "without" : "with"); + + return swap; +} + +static void *check_data(u8 *buf, size_t bsize, u32 *swap) +{ + u32 word, p = 0; /* possition */ + + /* Because buf doesn't need to be aligned let's read it by chars */ + for (p = 0; p < bsize; p++) { + word = load_word(&buf[p], SWAP_NO); + debug("%s: word %x %x/%px\n", __func__, word, p, &buf[p]); + + /* Find the first bitstream dummy word */ + if (word == DUMMY_WORD) { + debug("%s: Found dummy word at position %x/%px\n", + __func__, p, &buf[p]); + *swap = check_header(&buf[p]); + if (*swap) { + /* FIXME add full bitstream checking here */ + return &buf[p]; + } + } + /* Loop can be huge - support CTRL + C */ + if (ctrlc()) + return NULL; + } + return NULL; +} + +static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap) +{ + u32 *new_buf; + u32 i; + + if ((ulong)buf != ALIGN((ulong)buf, ARCH_DMA_MINALIGN)) { + new_buf = (u32 *)ALIGN((ulong)buf, ARCH_DMA_MINALIGN); + + /* + * This might be dangerous but permits to flash if + * ARCH_DMA_MINALIGN is greater than header size + */ + if (new_buf > (u32 *)buf) { + debug("%s: Aligned buffer is after buffer start\n", + __func__); + new_buf -= ARCH_DMA_MINALIGN; + } + printf("%s: Align buffer at %px to %px(swap %d)\n", __func__, + buf, new_buf, swap); + + for (i = 0; i < (len/4); i++) + new_buf[i] = load_word(&buf[i], swap); + + buf = new_buf; + } else if (swap != SWAP_DONE) { + /* For bitstream which are aligned */ + u32 *new_buf = (u32 *)buf; + + printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__, + swap); + + for (i = 0; i < (len/4); i++) + new_buf[i] = load_word(&buf[i], swap); + } + + return (ulong)buf; +} + +static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf, + size_t bsize, u32 blocksize, u32 *swap) +{ + ulong *buf_start; + ulong diff; + + buf_start = check_data((u8 *)buf, blocksize, swap); + + if (!buf_start) + return FPGA_FAIL; + + /* Check if data is postpone from start */ + diff = (ulong)buf_start - (ulong)buf; + if (diff) { + printf("%s: Bitstream is not validated yet (diff %lx)\n", + __func__, diff); + return FPGA_FAIL; + } + + if ((ulong)buf < SZ_1M) { + printf("%s: Bitstream has to be placed up to 1MB (%px)\n", + __func__, buf); + return FPGA_FAIL; + } + + return 0; +} + +static int invoke_smc(ulong id, ulong reg0, ulong reg1, ulong reg2) +{ + struct pt_regs regs; + regs.regs[0] = id; + regs.regs[1] = reg0; + regs.regs[2] = reg1; + regs.regs[3] = reg2; + + smc_call(®s); + + return regs.regs[0]; +} + +static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize, + bitstream_type bstype) +{ + u32 swap; + ulong bin_buf, flags; + int ret; + + if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap)) + return FPGA_FAIL; + + bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap); + + debug("%s called!\n", __func__); + flush_dcache_range(bin_buf, bin_buf + bsize); + + if (bsize % 4) + bsize = bsize / 4 + 1; + else + bsize = bsize / 4; + + flags = (u32)bsize | ((u64)bstype << 32); + + ret = invoke_smc(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, bin_buf, flags, 0); + if (ret) + debug("PL FPGA LOAD fail\n"); + + return ret; +} + +struct xilinx_fpga_op zynqmp_op = { + .load = zynqmp_load, +}; diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index afc674d..074f86c 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -120,9 +120,9 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) if (host->fifo_mode && size) { len = 0; - if (data->flags == MMC_DATA_READ) { - if ((dwmci_readl(host, DWMCI_RINTSTS) & - DWMCI_INTMSK_RXDR)) { + if (data->flags == MMC_DATA_READ && + (mask & DWMCI_INTMSK_RXDR)) { + while (size) { len = dwmci_readl(host, DWMCI_STATUS); len = (len >> DWMCI_FIFO_SHIFT) & DWMCI_FIFO_MASK; @@ -130,12 +130,13 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) for (i = 0; i < len; i++) *buf++ = dwmci_readl(host, DWMCI_DATA); - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_RXDR); + size = size > len ? (size - len) : 0; } - } else { - if ((dwmci_readl(host, DWMCI_RINTSTS) & - DWMCI_INTMSK_TXDR)) { + dwmci_writel(host, DWMCI_RINTSTS, + DWMCI_INTMSK_RXDR); + } else if (data->flags == MMC_DATA_WRITE && + (mask & DWMCI_INTMSK_TXDR)) { + while (size) { len = dwmci_readl(host, DWMCI_STATUS); len = fifo_depth - ((len >> DWMCI_FIFO_SHIFT) & @@ -144,11 +145,11 @@ static int dwmci_data_transfer(struct dwmci_host *host, struct mmc_data *data) for (i = 0; i < len; i++) dwmci_writel(host, DWMCI_DATA, *buf++); - dwmci_writel(host, DWMCI_RINTSTS, - DWMCI_INTMSK_TXDR); + size = size > len ? (size - len) : 0; } + dwmci_writel(host, DWMCI_RINTSTS, + DWMCI_INTMSK_TXDR); } - size = size > len ? (size - len) : 0; } /* Data arrived correctly. */ diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index 43ea0bb..0312da9 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -21,6 +21,14 @@ #include <div64.h> #include "mmc_private.h" +static const unsigned int sd_au_size[] = { + 0, SZ_16K / 512, SZ_32K / 512, + SZ_64K / 512, SZ_128K / 512, SZ_256K / 512, + SZ_512K / 512, SZ_1M / 512, SZ_2M / 512, + SZ_4M / 512, SZ_8M / 512, (SZ_8M + SZ_4M) / 512, + SZ_16M / 512, (SZ_16M + SZ_8M) / 512, SZ_32M / 512, SZ_64M / 512, +}; + #ifndef CONFIG_DM_MMC_OPS __weak int board_mmc_getwp(struct mmc *mmc) { @@ -945,6 +953,62 @@ retry_scr: return 0; } +static int sd_read_ssr(struct mmc *mmc) +{ + int err, i; + struct mmc_cmd cmd; + ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16); + struct mmc_data data; + int timeout = 3; + unsigned int au, eo, et, es; + + cmd.cmdidx = MMC_CMD_APP_CMD; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = mmc->rca << 16; + + err = mmc_send_cmd(mmc, &cmd, NULL); + if (err) + return err; + + cmd.cmdidx = SD_CMD_APP_SD_STATUS; + cmd.resp_type = MMC_RSP_R1; + cmd.cmdarg = 0; + +retry_ssr: + data.dest = (char *)ssr; + data.blocksize = 64; + data.blocks = 1; + data.flags = MMC_DATA_READ; + + err = mmc_send_cmd(mmc, &cmd, &data); + if (err) { + if (timeout--) + goto retry_ssr; + + return err; + } + + for (i = 0; i < 16; i++) + ssr[i] = be32_to_cpu(ssr[i]); + + au = (ssr[2] >> 12) & 0xF; + if ((au <= 9) || (mmc->version == SD_VERSION_3)) { + mmc->ssr.au = sd_au_size[au]; + es = (ssr[3] >> 24) & 0xFF; + es |= (ssr[2] & 0xFF) << 8; + et = (ssr[3] >> 18) & 0x3F; + if (es && et) { + eo = (ssr[3] >> 16) & 0x3; + mmc->ssr.erase_timeout = (et * 1000) / es; + mmc->ssr.erase_offset = eo * 1000; + } + } else { + debug("Invalid Allocation Unit Size.\n"); + } + + return 0; +} + /* frequency bases */ /* divided by 10 to be nice to platforms without floating point */ static const int fbase[] = { @@ -1350,6 +1414,10 @@ static int mmc_startup(struct mmc *mmc) mmc_set_bus_width(mmc, 4); } + err = sd_read_ssr(mmc); + if (err) + return err; + if (mmc->card_caps & MMC_MODE_HS) mmc->tran_speed = 50000000; else diff --git a/drivers/mmc/mmc_write.c b/drivers/mmc/mmc_write.c index 0f8b5c7..2289640 100644 --- a/drivers/mmc/mmc_write.c +++ b/drivers/mmc/mmc_write.c @@ -100,8 +100,13 @@ unsigned long mmc_berase(struct blk_desc *block_dev, lbaint_t start, & ~(mmc->erase_grp_size - 1)) - 1); while (blk < blkcnt) { - blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? - mmc->erase_grp_size : (blkcnt - blk); + if (IS_SD(mmc) && mmc->ssr.au) { + blk_r = ((blkcnt - blk) > mmc->ssr.au) ? + mmc->ssr.au : (blkcnt - blk); + } else { + blk_r = ((blkcnt - blk) > mmc->erase_grp_size) ? + mmc->erase_grp_size : (blkcnt - blk); + } err = mmc_erase_t(mmc, start + blk, blk_r); if (err) break; diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 7ddb549..b2bf5a0 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -121,13 +121,10 @@ static int sdhci_transfer_data(struct sdhci_host *host, struct mmc_data *data, * for card ready state. * Every time when card is busy after timeout then (last) timeout value will be * increased twice but only if it doesn't exceed global defined maximum. - * Each function call will use last timeout value. Max timeout can be redefined - * in board config file. + * Each function call will use last timeout value. */ -#ifndef CONFIG_SDHCI_CMD_MAX_TIMEOUT -#define CONFIG_SDHCI_CMD_MAX_TIMEOUT 3200 -#endif -#define CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT 100 +#define SDHCI_CMD_MAX_TIMEOUT 3200 +#define SDHCI_CMD_DEFAULT_TIMEOUT 100 #define SDHCI_READ_STATUS_TIMEOUT 1000 #ifdef CONFIG_DM_MMC_OPS @@ -151,7 +148,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, unsigned start = get_timer(0); /* Timeout unit - ms */ - static unsigned int cmd_timeout = CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT; + static unsigned int cmd_timeout = SDHCI_CMD_DEFAULT_TIMEOUT; sdhci_writel(host, SDHCI_INT_ALL_MASK, SDHCI_INT_STATUS); mask = SDHCI_CMD_INHIBIT | SDHCI_DATA_INHIBIT; @@ -164,7 +161,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) { if (time >= cmd_timeout) { printf("%s: MMC: %d busy ", __func__, mmc_dev); - if (2 * cmd_timeout <= CONFIG_SDHCI_CMD_MAX_TIMEOUT) { + if (2 * cmd_timeout <= SDHCI_CMD_MAX_TIMEOUT) { cmd_timeout += cmd_timeout; printf("timeout increasing to: %u ms.\n", cmd_timeout); @@ -297,7 +294,7 @@ static int sdhci_send_command(struct mmc *mmc, struct mmc_cmd *cmd, static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) { struct sdhci_host *host = mmc->priv; - unsigned int div, clk, timeout, reg; + unsigned int div, clk = 0, timeout, reg; /* Wait max 20 ms */ timeout = 200; @@ -321,14 +318,36 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) return 0; if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { - /* Version 3.00 divisors must be a multiple of 2. */ - if (mmc->cfg->f_max <= clock) - div = 1; - else { - for (div = 2; div < SDHCI_MAX_DIV_SPEC_300; div += 2) { - if ((mmc->cfg->f_max / div) <= clock) + /* + * Check if the Host Controller supports Programmable Clock + * Mode. + */ + if (host->clk_mul) { + for (div = 1; div <= 1024; div++) { + if ((mmc->cfg->f_max * host->clk_mul / div) + <= clock) break; } + + /* + * Set Programmable Clock Mode in the Clock + * Control register. + */ + clk = SDHCI_PROG_CLOCK_MODE; + div--; + } else { + /* Version 3.00 divisors must be a multiple of 2. */ + if (mmc->cfg->f_max <= clock) { + div = 1; + } else { + for (div = 2; + div < SDHCI_MAX_DIV_SPEC_300; + div += 2) { + if ((mmc->cfg->f_max / div) <= clock) + break; + } + } + div >>= 1; } } else { /* Version 2.00 divisors must be a power of 2. */ @@ -336,13 +355,13 @@ static int sdhci_set_clock(struct mmc *mmc, unsigned int clock) if ((mmc->cfg->f_max / div) <= clock) break; } + div >>= 1; } - div >>= 1; if (host->set_clock) host->set_clock(host->index, div); - clk = (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; + clk |= (div & SDHCI_DIV_MASK) << SDHCI_DIVIDER_SHIFT; clk |= ((div & SDHCI_DIV_HI_MASK) >> SDHCI_DIV_MASK_LEN) << SDHCI_DIVIDER_HI_SHIFT; clk |= SDHCI_CLOCK_INT_EN; @@ -451,6 +470,8 @@ static int sdhci_init(struct mmc *mmc) { struct sdhci_host *host = mmc->priv; + sdhci_reset(host, SDHCI_RESET_ALL); + if ((host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR) && !aligned_buffer) { aligned_buffer = memalign(8, 512*1024); if (!aligned_buffer) { @@ -514,9 +535,17 @@ static const struct mmc_ops sdhci_ops = { int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, u32 max_clk, u32 min_clk) { - u32 caps; + u32 caps, caps_1; caps = sdhci_readl(host, SDHCI_CAPABILITIES); + +#ifdef CONFIG_MMC_SDMA + if (!(caps & SDHCI_CAN_DO_SDMA)) { + printf("%s: Your controller doesn't support SDMA!!\n", + __func__); + return -EINVAL; + } +#endif host->version = sdhci_readw(host, SDHCI_HOST_VERSION); cfg->name = host->name; @@ -534,8 +563,11 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, SDHCI_CLOCK_BASE_SHIFT; cfg->f_max *= 1000000; } - if (cfg->f_max == 0) + if (cfg->f_max == 0) { + printf("%s: Hardware doesn't specify base clock frequency\n", + __func__); return -EINVAL; + } if (min_clk) cfg->f_min = min_clk; else { @@ -552,6 +584,9 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, if (caps & SDHCI_CAN_VDD_180) cfg->voltages |= MMC_VDD_165_195; + if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) + cfg->voltages |= host->voltages; + cfg->host_caps = MMC_MODE_HS | MMC_MODE_HS_52MHz | MMC_MODE_4BIT; if (SDHCI_GET_VERSION(host) >= SDHCI_SPEC_300) { if (caps & SDHCI_CAN_DO_8BIT) @@ -564,6 +599,14 @@ int sdhci_setup_cfg(struct mmc_config *cfg, struct sdhci_host *host, cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + /* + * In case of Host Controller v3.00, find out whether clock + * multiplier is supported. + */ + caps_1 = sdhci_readl(host, SDHCI_CAPABILITIES_1); + host->clk_mul = (caps_1 & SDHCI_CLOCK_MUL_MASK) >> + SDHCI_CLOCK_MUL_SHIFT; + return 0; } @@ -575,27 +618,11 @@ int sdhci_bind(struct udevice *dev, struct mmc *mmc, struct mmc_config *cfg) #else int add_sdhci(struct sdhci_host *host, u32 max_clk, u32 min_clk) { -#ifdef CONFIG_MMC_SDMA - unsigned int caps; - - caps = sdhci_readl(host, SDHCI_CAPABILITIES); - if (!(caps & SDHCI_CAN_DO_SDMA)) { - printf("%s: Your controller doesn't support SDMA!!\n", - __func__); - return -1; - } -#endif - - if (sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk)) { - printf("%s: Hardware doesn't specify base clock frequency\n", - __func__); - return -EINVAL; - } + int ret; - if (host->quirks & SDHCI_QUIRK_BROKEN_VOLTAGE) - host->cfg.voltages |= host->voltages; - - sdhci_reset(host, SDHCI_RESET_ALL); + ret = sdhci_setup_cfg(&host->cfg, host, max_clk, min_clk); + if (ret) + return ret; host->mmc = mmc_create(&host->cfg, host); if (host->mmc == NULL) { diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index be3ed73..302c005 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -175,7 +175,7 @@ config XILINX_AXIEMAC This MAC is present in Xilinx Microblaze, Zynq and ZynqMP SoCs. config XILINX_EMACLITE - depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP) + depends on DM_ETH && (MICROBLAZE || ARCH_ZYNQ || ARCH_ZYNQMP || MIPS) select PHYLIB select MII bool "Xilinx Ethernetlite" diff --git a/drivers/net/pch_gbe.c b/drivers/net/pch_gbe.c index 137818b..d40fff0 100644 --- a/drivers/net/pch_gbe.c +++ b/drivers/net/pch_gbe.c @@ -118,14 +118,14 @@ static void pch_gbe_rx_descs_init(struct udevice *dev) memset(rx_desc, 0, sizeof(struct pch_gbe_rx_desc) * PCH_GBE_DESC_NUM); for (i = 0; i < PCH_GBE_DESC_NUM; i++) rx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, - (u32)(priv->rx_buff[i])); + (ulong)(priv->rx_buff[i])); - writel(dm_pci_phys_to_mem(priv->dev, (u32)rx_desc), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)rx_desc), &mac_regs->rx_dsc_base); writel(sizeof(struct pch_gbe_rx_desc) * (PCH_GBE_DESC_NUM - 1), &mac_regs->rx_dsc_size); - writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_desc + 1)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(rx_desc + 1)), &mac_regs->rx_dsc_sw_p); } @@ -137,11 +137,11 @@ static void pch_gbe_tx_descs_init(struct udevice *dev) memset(tx_desc, 0, sizeof(struct pch_gbe_tx_desc) * PCH_GBE_DESC_NUM); - writel(dm_pci_phys_to_mem(priv->dev, (u32)tx_desc), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)tx_desc), &mac_regs->tx_dsc_base); writel(sizeof(struct pch_gbe_tx_desc) * (PCH_GBE_DESC_NUM - 1), &mac_regs->tx_dsc_size); - writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_desc + 1)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(tx_desc + 1)), &mac_regs->tx_dsc_sw_p); } @@ -251,7 +251,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length) if (length < 64) frame_ctrl |= PCH_GBE_TXD_CTRL_APAD; - tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (u32)packet); + tx_desc->buffer_addr = dm_pci_phys_to_mem(priv->dev, (ulong)packet); tx_desc->length = length; tx_desc->tx_words_eob = length + 3; tx_desc->tx_frame_ctrl = frame_ctrl; @@ -262,7 +262,7 @@ static int pch_gbe_send(struct udevice *dev, void *packet, int length) if (++priv->tx_idx >= PCH_GBE_DESC_NUM) priv->tx_idx = 0; - writel(dm_pci_phys_to_mem(priv->dev, (u32)(tx_head + priv->tx_idx)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(tx_head + priv->tx_idx)), &mac_regs->tx_dsc_sw_p); start = get_timer(0); @@ -283,7 +283,7 @@ static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp) struct pch_gbe_priv *priv = dev_get_priv(dev); struct pch_gbe_regs *mac_regs = priv->mac_regs; struct pch_gbe_rx_desc *rx_desc; - u32 hw_desc, buffer_addr, length; + ulong hw_desc, buffer_addr, length; rx_desc = &priv->rx_desc[priv->rx_idx]; @@ -291,7 +291,7 @@ static int pch_gbe_recv(struct udevice *dev, int flags, uchar **packetp) hw_desc = readl(&mac_regs->rx_dsc_hw_p_hld); /* Just return if not receiving any packet */ - if ((u32)rx_desc == hw_desc) + if ((ulong)rx_desc == hw_desc) return -EAGAIN; buffer_addr = dm_pci_mem_to_phys(priv->dev, rx_desc->buffer_addr); @@ -315,7 +315,7 @@ static int pch_gbe_free_pkt(struct udevice *dev, uchar *packet, int length) if (++rx_swp >= PCH_GBE_DESC_NUM) rx_swp = 0; - writel(dm_pci_phys_to_mem(priv->dev, (u32)(rx_head + rx_swp)), + writel(dm_pci_phys_to_mem(priv->dev, (ulong)(rx_head + rx_swp)), &mac_regs->rx_dsc_sw_p); return 0; @@ -421,7 +421,7 @@ int pch_gbe_probe(struct udevice *dev) { struct pch_gbe_priv *priv; struct eth_pdata *plat = dev_get_platdata(dev); - u32 iobase; + void *iobase; /* * The priv structure contains the descriptors and frame buffers which @@ -432,11 +432,9 @@ int pch_gbe_probe(struct udevice *dev) priv->dev = dev; - dm_pci_read_config32(dev, PCI_BASE_ADDRESS_1, &iobase); - iobase &= PCI_BASE_ADDRESS_MEM_MASK; - iobase = dm_pci_mem_to_phys(dev, iobase); + iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_1, PCI_REGION_MEM); - plat->iobase = iobase; + plat->iobase = (ulong)iobase; priv->mac_regs = (struct pch_gbe_regs *)iobase; /* Read MAC address from SROM and initialize dev->enetaddr with it */ diff --git a/drivers/net/xilinx_emaclite.c b/drivers/net/xilinx_emaclite.c index 7b85aa0..d86e7a3 100644 --- a/drivers/net/xilinx_emaclite.c +++ b/drivers/net/xilinx_emaclite.c @@ -19,6 +19,7 @@ #include <fdtdec.h> #include <asm-generic/errno.h> #include <linux/kernel.h> +#include <asm/io.h> DECLARE_GLOBAL_DATA_PTR; @@ -154,7 +155,7 @@ static int wait_for_bit(const char *func, u32 *reg, const u32 mask, unsigned long start = get_timer(0); while (1) { - val = readl(reg); + val = __raw_readl(reg); if (!set) val = ~val; @@ -193,16 +194,17 @@ static u32 phyread(struct xemaclite *emaclite, u32 phyaddress, u32 registernum, if (mdio_wait(regs)) return 1; - u32 ctrl_reg = in_be32(®s->mdioctrl); - out_be32(®s->mdioaddr, XEL_MDIOADDR_OP_MASK | - ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) | registernum)); - out_be32(®s->mdioctrl, ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); + u32 ctrl_reg = __raw_readl(®s->mdioctrl); + __raw_writel(XEL_MDIOADDR_OP_MASK + | ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) + | registernum), ®s->mdioaddr); + __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl); if (mdio_wait(regs)) return 1; /* Read data */ - *data = in_be32(®s->mdiord); + *data = __raw_readl(®s->mdiord); return 0; } @@ -220,11 +222,12 @@ static u32 phywrite(struct xemaclite *emaclite, u32 phyaddress, u32 registernum, * Data register. Finally, set the Status bit in the MDIO Control * register to start a MDIO write transaction. */ - u32 ctrl_reg = in_be32(®s->mdioctrl); - out_be32(®s->mdioaddr, ~XEL_MDIOADDR_OP_MASK & - ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) | registernum)); - out_be32(®s->mdiowr, data); - out_be32(®s->mdioctrl, ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK); + u32 ctrl_reg = __raw_readl(®s->mdioctrl); + __raw_writel(~XEL_MDIOADDR_OP_MASK + & ((phyaddress << XEL_MDIOADDR_PHYADR_SHIFT) + | registernum), ®s->mdioaddr); + __raw_writel(data, ®s->mdiowr); + __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK, ®s->mdioctrl); if (mdio_wait(regs)) return 1; @@ -327,27 +330,27 @@ static int emaclite_start(struct udevice *dev) * TX - TX_PING & TX_PONG initialization */ /* Restart PING TX */ - out_be32(®s->tx_ping_tsr, 0); + __raw_writel(0, ®s->tx_ping_tsr); /* Copy MAC address */ xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_ping, ENET_ADDR_LENGTH); /* Set the length */ - out_be32(®s->tx_ping_tplr, ENET_ADDR_LENGTH); + __raw_writel(ENET_ADDR_LENGTH, ®s->tx_ping_tplr); /* Update the MAC address in the EMAC Lite */ - out_be32(®s->tx_ping_tsr, XEL_TSR_PROG_MAC_ADDR); + __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_ping_tsr); /* Wait for EMAC Lite to finish with the MAC address update */ - while ((in_be32 (®s->tx_ping_tsr) & + while ((__raw_readl(®s->tx_ping_tsr) & XEL_TSR_PROG_MAC_ADDR) != 0) ; if (emaclite->txpp) { /* The same operation with PONG TX */ - out_be32(®s->tx_pong_tsr, 0); + __raw_writel(0, ®s->tx_pong_tsr); xemaclite_alignedwrite(pdata->enetaddr, ®s->tx_pong, ENET_ADDR_LENGTH); - out_be32(®s->tx_pong_tplr, ENET_ADDR_LENGTH); - out_be32(®s->tx_pong_tsr, XEL_TSR_PROG_MAC_ADDR); - while ((in_be32(®s->tx_pong_tsr) & + __raw_writel(ENET_ADDR_LENGTH, ®s->tx_pong_tplr); + __raw_writel(XEL_TSR_PROG_MAC_ADDR, ®s->tx_pong_tsr); + while ((__raw_readl(®s->tx_pong_tsr) & XEL_TSR_PROG_MAC_ADDR) != 0) ; } @@ -356,13 +359,13 @@ static int emaclite_start(struct udevice *dev) * RX - RX_PING & RX_PONG initialization */ /* Write out the value to flush the RX buffer */ - out_be32(®s->rx_ping_rsr, XEL_RSR_RECV_IE_MASK); + __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_ping_rsr); if (emaclite->rxpp) - out_be32(®s->rx_pong_rsr, XEL_RSR_RECV_IE_MASK); + __raw_writel(XEL_RSR_RECV_IE_MASK, ®s->rx_pong_rsr); - out_be32(®s->mdioctrl, XEL_MDIOCTRL_MDIOEN_MASK); - if (in_be32(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK) + __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK, ®s->mdioctrl); + if (__raw_readl(®s->mdioctrl) & XEL_MDIOCTRL_MDIOEN_MASK) if (!setup_phy(dev)) return -1; @@ -379,9 +382,9 @@ static int xemaclite_txbufferavailable(struct xemaclite *emaclite) * Read the other buffer register * and determine if the other buffer is available */ - tmp = ~in_be32(®s->tx_ping_tsr); + tmp = ~__raw_readl(®s->tx_ping_tsr); if (emaclite->txpp) - tmp |= ~in_be32(®s->tx_pong_tsr); + tmp |= ~__raw_readl(®s->tx_pong_tsr); return !(tmp & XEL_TSR_XMIT_BUSY_MASK); } @@ -405,40 +408,42 @@ static int emaclite_send(struct udevice *dev, void *ptr, int len) if (!maxtry) { printf("Error: Timeout waiting for ethernet TX buffer\n"); /* Restart PING TX */ - out_be32(®s->tx_ping_tsr, 0); + __raw_writel(0, ®s->tx_ping_tsr); if (emaclite->txpp) { - out_be32(®s->tx_pong_tsr, 0); + __raw_writel(0, ®s->tx_pong_tsr); } return -1; } /* Determine if the expected buffer address is empty */ - reg = in_be32(®s->tx_ping_tsr); + reg = __raw_readl(®s->tx_ping_tsr); if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { debug("Send packet from tx_ping buffer\n"); /* Write the frame to the buffer */ xemaclite_alignedwrite(ptr, ®s->tx_ping, len); - out_be32(®s->tx_ping_tplr, len & - (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO)); - reg = in_be32(®s->tx_ping_tsr); + __raw_writel(len + & (XEL_TPLR_LENGTH_MASK_HI | XEL_TPLR_LENGTH_MASK_LO), + ®s->tx_ping_tplr); + reg = __raw_readl(®s->tx_ping_tsr); reg |= XEL_TSR_XMIT_BUSY_MASK; - out_be32(®s->tx_ping_tsr, reg); + __raw_writel(reg, ®s->tx_ping_tsr); return 0; } if (emaclite->txpp) { /* Determine if the expected buffer address is empty */ - reg = in_be32(®s->tx_pong_tsr); + reg = __raw_readl(®s->tx_pong_tsr); if ((reg & XEL_TSR_XMIT_BUSY_MASK) == 0) { debug("Send packet from tx_pong buffer\n"); /* Write the frame to the buffer */ xemaclite_alignedwrite(ptr, ®s->tx_pong, len); - out_be32(®s->tx_pong_tplr, len & + __raw_writel(len & (XEL_TPLR_LENGTH_MASK_HI | - XEL_TPLR_LENGTH_MASK_LO)); - reg = in_be32(®s->tx_pong_tsr); + XEL_TPLR_LENGTH_MASK_LO), + ®s->tx_pong_tplr); + reg = __raw_readl(®s->tx_pong_tsr); reg |= XEL_TSR_XMIT_BUSY_MASK; - out_be32(®s->tx_pong_tsr, reg); + __raw_writel(reg, ®s->tx_pong_tsr); return 0; } } @@ -458,7 +463,7 @@ static int emaclite_recv(struct udevice *dev, int flags, uchar **packetp) try_again: if (!emaclite->use_rx_pong_buffer_next) { - reg = in_be32(®s->rx_ping_rsr); + reg = __raw_readl(®s->rx_ping_rsr); debug("Testing data at rx_ping\n"); if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { debug("Data found in rx_ping buffer\n"); @@ -478,7 +483,7 @@ try_again: goto try_again; } } else { - reg = in_be32(®s->rx_pong_rsr); + reg = __raw_readl(®s->rx_pong_rsr); debug("Testing data at rx_pong\n"); if ((reg & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) { debug("Data found in rx_pong buffer\n"); @@ -525,9 +530,9 @@ try_again: length - first_read); /* Acknowledge the frame */ - reg = in_be32(ack); + reg = __raw_readl(ack); reg &= ~XEL_RSR_RECV_DONE_MASK; - out_be32(ack, reg); + __raw_writel(reg, ack); debug("Packet receive from 0x%p, length %dB\n", addr, length); *packetp = etherrxbuff; @@ -595,7 +600,8 @@ static int emaclite_ofdata_to_platdata(struct udevice *dev) int offset = 0; pdata->iobase = (phys_addr_t)dev_get_addr(dev); - emaclite->regs = (struct emaclite_regs *)pdata->iobase; + emaclite->regs = (struct emaclite_regs *)ioremap_nocache(pdata->iobase, + 0x10000); emaclite->phyaddr = -1; diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 669e37b..9a7c187 100644 --- a/drivers/pci/Kconfig +++ b/drivers/pci/Kconfig @@ -39,4 +39,11 @@ config PCI_TEGRA with a total of 5 lanes. Some boards require this for Ethernet support to work (e.g. beaver, jetson-tk1). +config PCI_XILINX + bool "Xilinx AXI Bridge for PCI Express" + depends on DM_PCI + help + Enable support for the Xilinx AXI bridge for PCI express, an IP block + which can be used on some generations of Xilinx FPGAs. + endmenu diff --git a/drivers/pci/Makefile b/drivers/pci/Makefile index f8be9bf..9583e91 100644 --- a/drivers/pci/Makefile +++ b/drivers/pci/Makefile @@ -31,3 +31,4 @@ obj-$(CONFIG_PCI_TEGRA) += pci_tegra.o obj-$(CONFIG_TSI108_PCI) += tsi108_pci.o obj-$(CONFIG_WINBOND_83C553) += w83c553f.o obj-$(CONFIG_PCIE_LAYERSCAPE) += pcie_layerscape.o +obj-$(CONFIG_PCI_XILINX) += pcie_xilinx.o diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c index 342b78c..3b00e6a 100644 --- a/drivers/pci/pci-uclass.c +++ b/drivers/pci/pci-uclass.c @@ -837,7 +837,7 @@ static int pci_uclass_pre_probe(struct udevice *bus) hose = bus->uclass_priv; /* For bridges, use the top-level PCI controller */ - if (device_get_uclass_id(bus->parent) == UCLASS_ROOT) { + if (!device_is_on_pci_bus(bus)) { hose->ctlr = bus; ret = decode_regions(hose, gd->fdt_blob, bus->parent->of_offset, bus->of_offset); diff --git a/drivers/pci/pcie_xilinx.c b/drivers/pci/pcie_xilinx.c new file mode 100644 index 0000000..5216001 --- /dev/null +++ b/drivers/pci/pcie_xilinx.c @@ -0,0 +1,220 @@ +/* + * Xilinx AXI Bridge for PCI Express Driver + * + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#include <common.h> +#include <dm.h> +#include <pci.h> + +#include <asm/io.h> + +/** + * struct xilinx_pcie - Xilinx PCIe controller state + * @hose: The parent classes PCI controller state + * @cfg_base: The base address of memory mapped configuration space + */ +struct xilinx_pcie { + struct pci_controller hose; + void *cfg_base; +}; + +/* Register definitions */ +#define XILINX_PCIE_REG_PSCR 0x144 +#define XILINX_PCIE_REG_PSCR_LNKUP BIT(11) + +/** + * pcie_xilinx_link_up() - Check whether the PCIe link is up + * @pcie: Pointer to the PCI controller state + * + * Checks whether the PCIe link for the given device is up or down. + * + * Return: true if the link is up, else false + */ +static bool pcie_xilinx_link_up(struct xilinx_pcie *pcie) +{ + uint32_t pscr = __raw_readl(pcie->cfg_base + XILINX_PCIE_REG_PSCR); + + return pscr & XILINX_PCIE_REG_PSCR_LNKUP; +} + +/** + * pcie_xilinx_config_address() - Calculate the address of a config access + * @pcie: Pointer to the PCI controller state + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @paddress: Pointer to the pointer to write the calculates address to + * + * Calculates the address that should be accessed to perform a PCIe + * configuration space access for a given device identified by the PCIe + * controller device @pcie and the bus, device & function numbers in @bdf. If + * access to the device is not valid then the function will return an error + * code. Otherwise the address to access will be written to the pointer pointed + * to by @paddress. + * + * Return: 0 on success, else -ENODEV + */ +static int pcie_xilinx_config_address(struct xilinx_pcie *pcie, pci_dev_t bdf, + uint offset, void **paddress) +{ + unsigned int bus = PCI_BUS(bdf); + unsigned int dev = PCI_DEV(bdf); + unsigned int func = PCI_FUNC(bdf); + void *addr; + + if ((bus > 0) && !pcie_xilinx_link_up(pcie)) + return -ENODEV; + + /* + * Busses 0 (host-PCIe bridge) & 1 (its immediate child) are + * limited to a single device each. + */ + if ((bus < 2) && (dev > 0)) + return -ENODEV; + + addr = pcie->cfg_base; + addr += bus << 20; + addr += dev << 15; + addr += func << 12; + addr += offset; + *paddress = addr; + + return 0; +} + +/** + * pcie_xilinx_read_config() - Read from configuration space + * @pcie: Pointer to the PCI controller state + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @valuep: A pointer at which to store the read value + * @size: Indicates the size of access to perform + * + * Read a value of size @size from offset @offset within the configuration + * space of the device identified by the bus, device & function numbers in @bdf + * on the PCI bus @bus. + * + * Return: 0 on success, else -ENODEV or -EINVAL + */ +static int pcie_xilinx_read_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong *valuep, + enum pci_size_t size) +{ + struct xilinx_pcie *pcie = dev_get_priv(bus); + void *address; + int err; + + err = pcie_xilinx_config_address(pcie, bdf, offset, &address); + if (err < 0) { + *valuep = pci_get_ff(size); + return 0; + } + + switch (size) { + case PCI_SIZE_8: + *valuep = __raw_readb(address); + return 0; + case PCI_SIZE_16: + *valuep = __raw_readw(address); + return 0; + case PCI_SIZE_32: + *valuep = __raw_readl(address); + return 0; + default: + return -EINVAL; + } +} + +/** + * pcie_xilinx_write_config() - Write to configuration space + * @pcie: Pointer to the PCI controller state + * @bdf: Identifies the PCIe device to access + * @offset: The offset into the device's configuration space + * @value: The value to write + * @size: Indicates the size of access to perform + * + * Write the value @value of size @size from offset @offset within the + * configuration space of the device identified by the bus, device & function + * numbers in @bdf on the PCI bus @bus. + * + * Return: 0 on success, else -ENODEV or -EINVAL + */ +static int pcie_xilinx_write_config(struct udevice *bus, pci_dev_t bdf, + uint offset, ulong value, + enum pci_size_t size) +{ + struct xilinx_pcie *pcie = dev_get_priv(bus); + void *address; + int err; + + err = pcie_xilinx_config_address(pcie, bdf, offset, &address); + if (err < 0) + return 0; + + switch (size) { + case PCI_SIZE_8: + __raw_writeb(value, address); + return 0; + case PCI_SIZE_16: + __raw_writew(value, address); + return 0; + case PCI_SIZE_32: + __raw_writel(value, address); + return 0; + default: + return -EINVAL; + } +} + +/** + * pcie_xilinx_ofdata_to_platdata() - Translate from DT to device state + * @dev: A pointer to the device being operated on + * + * Translate relevant data from the device tree pertaining to device @dev into + * state that the driver will later make use of. This state is stored in the + * device's private data structure. + * + * Return: 0 on success, else -EINVAL + */ +static int pcie_xilinx_ofdata_to_platdata(struct udevice *dev) +{ + struct xilinx_pcie *pcie = dev_get_priv(dev); + struct fdt_resource reg_res; + DECLARE_GLOBAL_DATA_PTR; + int err; + + err = fdt_get_resource(gd->fdt_blob, dev->of_offset, "reg", + 0, ®_res); + if (err < 0) { + error("\"reg\" resource not found\n"); + return err; + } + + pcie->cfg_base = map_physmem(reg_res.start, + fdt_resource_size(®_res), + MAP_NOCACHE); + + return 0; +} + +static const struct dm_pci_ops pcie_xilinx_ops = { + .read_config = pcie_xilinx_read_config, + .write_config = pcie_xilinx_write_config, +}; + +static const struct udevice_id pcie_xilinx_ids[] = { + { .compatible = "xlnx,axi-pcie-host-1.00.a" }, + { } +}; + +U_BOOT_DRIVER(pcie_xilinx) = { + .name = "pcie_xilinx", + .id = UCLASS_PCI, + .of_match = pcie_xilinx_ids, + .ops = &pcie_xilinx_ops, + .ofdata_to_platdata = pcie_xilinx_ofdata_to_platdata, + .priv_auto_alloc_size = sizeof(struct xilinx_pcie), +}; diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 88fca15..3f6ea4d 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <clk.h> #include <dm.h> #include <errno.h> #include <fdtdec.h> @@ -352,6 +353,8 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) { struct ns16550_platdata *plat = dev->platdata; fdt_addr_t addr; + struct clk clk; + int err; /* try Processor Local Bus device first */ addr = dev_get_addr(dev); @@ -397,9 +400,21 @@ int ns16550_serial_ofdata_to_platdata(struct udevice *dev) "reg-offset", 0); plat->reg_shift = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg-shift", 0); - plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, - "clock-frequency", - CONFIG_SYS_NS16550_CLK); + + err = clk_get_by_index(dev, 0, &clk); + if (!err) { + err = clk_get_rate(&clk); + if (!IS_ERR_VALUE(err)) + plat->clock = err; + } else if (err != -ENODEV && err != -ENOSYS) { + debug("ns16550 failed to get clock\n"); + return err; + } + + if (!plat->clock) + plat->clock = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "clock-frequency", + CONFIG_SYS_NS16550_CLK); if (!plat->clock) { debug("ns16550 clock not defined\n"); return -EINVAL; diff --git a/drivers/spi/zynq_spi.c b/drivers/spi/zynq_spi.c index dd3de27..15ca271 100644 --- a/drivers/spi/zynq_spi.c +++ b/drivers/spi/zynq_spi.c @@ -92,7 +92,8 @@ static void zynq_spi_init_hw(struct zynq_spi_priv *priv) u32 confr; /* Disable SPI */ - writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr); + confr = ZYNQ_SPI_ENR_SPI_EN_MASK; + writel(~confr, ®s->enr); /* Disable Interrupts */ writel(ZYNQ_SPI_IXR_ALL_MASK, ®s->idr); @@ -173,8 +174,10 @@ static int zynq_spi_release_bus(struct udevice *dev) struct udevice *bus = dev->parent; struct zynq_spi_priv *priv = dev_get_priv(bus); struct zynq_spi_regs *regs = priv->regs; + u32 confr; - writel(~ZYNQ_SPI_ENR_SPI_EN_MASK, ®s->enr); + confr = ZYNQ_SPI_ENR_SPI_EN_MASK; + writel(~confr, ®s->enr); return 0; } diff --git a/include/clk.h b/include/clk.h index dc18b03..94c0037 100644 --- a/include/clk.h +++ b/include/clk.h @@ -10,6 +10,7 @@ #define _CLK_H_ #include <linux/types.h> +#include <asm/errno.h> /** * A clock is a hardware signal that oscillates autonomously at a specific @@ -59,7 +60,7 @@ struct clk { unsigned long id; }; -#if CONFIG_IS_ENABLED(OF_CONTROL) +#if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK) struct phandle_2_cell; int clk_get_by_index_platdata(struct udevice *dev, int index, struct phandle_2_cell *cells, struct clk *clk); diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index 5da0005..bf75209 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -17,7 +17,6 @@ * (easy to change) ***********************************************************/ #define CONFIG_405GP 1 /* This is a PPC405 CPU */ -#define CONFIG_MIP405 1 /* ...on a MIP405 board */ #define CONFIG_SYS_TEXT_BASE 0xFFF80000 @@ -57,9 +56,6 @@ #define CONFIG_CMD_SAVES #define CONFIG_CMD_BSP -#if !defined(CONFIG_MIP405T) -#endif - /************************************************************** * I2C Stuff: * the MIP405 is equiped with an Atmel 24C128/256 EEPROM at address @@ -312,7 +308,7 @@ /************************************************************ * IDE/ATA stuff ************************************************************/ -#if defined(CONFIG_MIP405T) +#if defined(CONFIG_TARGET_MIP405T) #define CONFIG_SYS_IDE_MAXBUS 1 /* MIP405T has only one IDE bus */ #else #define CONFIG_SYS_IDE_MAXBUS 2 /* max. 2 IDE busses */ @@ -358,7 +354,7 @@ /************************************************************ * USB support EXPERIMENTAL ************************************************************/ -#if !defined(CONFIG_MIP405T) +#if !defined(CONFIG_TARGET_MIP405T) #define CONFIG_USB_UHCI #define CONFIG_USB_KEYBOARD @@ -377,21 +373,4 @@ ************************************************************/ #define CONFIG_BZIP2 1 -/************************************************************ - * Ident - ************************************************************/ - -#define VERSION_TAG "released" -#if !defined(CONFIG_MIP405T) -#define CONFIG_ISO_STRING "MEV-10072-001" -#else -#define CONFIG_ISO_STRING "MEV-10082-001" -#endif - -#if !defined(CONFIG_BOOT_PCI) -#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG -#else -#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, PCI_BOOT Version" -#endif - #endif /* __CONFIG_H */ diff --git a/include/configs/PATI.h b/include/configs/PATI.h index e96fbc5..ebabdff 100644 --- a/include/configs/PATI.h +++ b/include/configs/PATI.h @@ -252,9 +252,4 @@ */ #define CONFIG_SYS_DER 0x00000000 -#define VERSION_TAG "released" -#define CONFIG_ISO_STRING "MEV-10084-001" - -#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG - #endif /* __CONFIG_H */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index ecb126b..7d08f0c 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -333,11 +333,4 @@ ************************************************************/ #define CONFIG_BZIP2 1 -/************************************************************ - * Ident - ************************************************************/ -#define VERSION_TAG "released" -#define CONFIG_ISO_STRING "MEV-10066-001" -#define CONFIG_IDENT_STRING "\n(c) 2002 by MPL AG Switzerland, " CONFIG_ISO_STRING " " VERSION_TAG - #endif /* __CONFIG_H */ diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index c5a7d68..a368d81 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -151,12 +151,6 @@ #define CONFIG_LZO #define CONFIG_LZMA -/* Ident */ -/*#define VERSION_TAG "released"*/ -#define VERSION_TAG "unstable" -#define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \ - "MEV-10080-001 " VERSION_TAG - /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */ diff --git a/include/configs/apf27.h b/include/configs/apf27.h index 136e3a6..e100b51 100644 --- a/include/configs/apf27.h +++ b/include/configs/apf27.h @@ -11,7 +11,6 @@ #define __CONFIG_H #define CONFIG_ENV_VERSION 10 -#define CONFIG_IDENT_STRING " apf27 patch 3.10" #define CONFIG_BOARD_NAME apf27 /* diff --git a/include/configs/arndale.h b/include/configs/arndale.h index b08f341..74fd9c4 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -27,8 +27,6 @@ /* Miscellaneous configurable options */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0" -#define CONFIG_IDENT_STRING " for ARNDALE" - #define CONFIG_ENV_IS_IN_MMC #define CONFIG_ENV_OFFSET (CONFIG_BL2_OFFSET + CONFIG_BL2_SIZE) diff --git a/include/configs/aspenite.h b/include/configs/aspenite.h index c468484..0cc72ca 100644 --- a/include/configs/aspenite.h +++ b/include/configs/aspenite.h @@ -11,11 +11,6 @@ #define __CONFIG_ASPENITE_H /* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nMarvell-Aspenite DB" - -/* * High Level Configuration Options */ #define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */ diff --git a/include/configs/boston.h b/include/configs/boston.h new file mode 100644 index 0000000..e958054 --- /dev/null +++ b/include/configs/boston.h @@ -0,0 +1,81 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __CONFIGS_BOSTON_H__ +#define __CONFIGS_BOSTON_H__ + +/* + * General board configuration + */ +#define CONFIG_DISPLAY_BOARDINFO + +/* + * CPU + */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 30000000 + +/* + * PCI + */ +#define CONFIG_PCI +#define CONFIG_PCI_PNP +#define CONFIG_CMD_PCI + +/* + * Memory map + */ +#ifdef CONFIG_64BIT +# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 +#else +# define CONFIG_SYS_SDRAM_BASE 0x80000000 +#endif + +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE + +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000) + +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0) +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x10000000) + +#define CONFIG_SYS_MALLOC_LEN (256 * 1024) + +/* + * Console + */ +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ + sizeof(CONFIG_SYS_PROMPT) + 16) +#define CONFIG_SYS_LONGHELP +#define CONFIG_BAUDRATE 115200 + +/* + * Flash + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 +#define CONFIG_SYS_MAX_FLASH_SECT 1024 + +/* + * Environment + */ +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_SECT_SIZE 0x20000 +#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE +#ifdef CONFIG_64BIT +# define CONFIG_ENV_ADDR \ + (0xffffffffb8000000 + (128 << 20) - CONFIG_ENV_SIZE) +#else +# define CONFIG_ENV_ADDR \ + (0xb8000000 + (128 << 20) - CONFIG_ENV_SIZE) +#endif + +#endif /* __CONFIGS_BOSTON_H__ */ diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 29189a4..fbe9c82 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -45,12 +45,6 @@ #define CONFIG_ENABLE_36BIT_PHYS #define CONFIG_FSL_LAW /* Use common FSL init code */ -#ifdef CONFIG_TRAILBLAZER -#define CONFIG_IDENT_STRING " controlcenterd trailblazer 0.01" -#else -#define CONFIG_IDENT_STRING " controlcenterd 0.01" -#endif - #ifdef CONFIG_PHYS_64BIT #define CONFIG_ADDR_MAP #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ diff --git a/include/configs/dlvision-10g.h b/include/configs/dlvision-10g.h index 521604e..a5384a2 100644 --- a/include/configs/dlvision-10g.h +++ b/include/configs/dlvision-10g.h @@ -17,7 +17,6 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvsion-10g -#define CONFIG_IDENT_STRING " dlvision-10g 0.06" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/dlvision.h b/include/configs/dlvision.h index 4dda319..57640da 100644 --- a/include/configs/dlvision.h +++ b/include/configs/dlvision.h @@ -17,7 +17,6 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME dlvision -#define CONFIG_IDENT_STRING " dlvision 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ diff --git a/include/configs/dns325.h b/include/configs/dns325.h index 7ee274e..23c173e 100644 --- a/include/configs/dns325.h +++ b/include/configs/dns325.h @@ -18,7 +18,6 @@ */ #define MACH_TYPE_DNS325 3800 #define CONFIG_MACH_TYPE MACH_TYPE_DNS325 -#define CONFIG_IDENT_STRING "\nD-Link DNS-325" /* * High Level Configuration Options (easy to change) diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h index cd05857..b526620 100644 --- a/include/configs/dockstar.h +++ b/include/configs/dockstar.h @@ -13,11 +13,6 @@ #define _CONFIG_DOCKSTAR_H /* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nSeagate FreeAgent DockStar" - -/* * High Level Configuration Options (easy to change) */ #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ diff --git a/include/configs/dragonboard410c.h b/include/configs/dragonboard410c.h index cc7ab83..1b440ea 100644 --- a/include/configs/dragonboard410c.h +++ b/include/configs/dragonboard410c.h @@ -12,8 +12,6 @@ #include <linux/sizes.h> #include <asm/arch/sysmap-apq8016.h> -#define CONFIG_IDENT_STRING "\nQualcomm-DragonBoard 410C" - #define CONFIG_MISC_INIT_R /* To stop autoboot */ /* Physical Memory Map */ diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h index c78c949..252e5f5 100644 --- a/include/configs/dreamplug.h +++ b/include/configs/dreamplug.h @@ -26,11 +26,6 @@ #endif /* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nMarvell-DreamPlug" - -/* * High Level Configuration Options (easy to change) */ #define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h index 1e2807d..982d526 100644 --- a/include/configs/edminiv2.h +++ b/include/configs/edminiv2.h @@ -31,12 +31,6 @@ #define CONFIG_SYS_TEXT_BASE 0x00800000 /* - * Version number information - */ - -#define CONFIG_IDENT_STRING " EDMiniV2" - -/* * High Level Configuration Options (easy to change) */ diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index c6a756d..0a50154 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -24,7 +24,6 @@ /* select serial console configuration */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" -#define CONFIG_IDENT_STRING " for ESPRESSO7420" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" /* DRAM Memory Banks */ diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h index ffbe660..ae6539c 100644 --- a/include/configs/goflexhome.h +++ b/include/configs/goflexhome.h @@ -16,11 +16,6 @@ #define _CONFIG_GOFLEXHOME_H /* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nSeagate GoFlex Home" - -/* * High Level Configuration Options (easy to change) */ #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ diff --git a/include/configs/gplugd.h b/include/configs/gplugd.h index 82b1830..c1b43fd 100644 --- a/include/configs/gplugd.h +++ b/include/configs/gplugd.h @@ -26,11 +26,6 @@ #endif /* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nMarvell-gplugD" - -/* * High Level Configuration Options */ #define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */ diff --git a/include/configs/gr_cpci_ax2000.h b/include/configs/gr_cpci_ax2000.h index 8b57354..842ed16 100644 --- a/include/configs/gr_cpci_ax2000.h +++ b/include/configs/gr_cpci_ax2000.h @@ -340,9 +340,6 @@ /* no DDR2 Controller */ #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1 -/* Identification string */ -#define CONFIG_IDENT_STRING " Gaisler LEON3 GR-CPCI-AX2000" - /* default kernel command line */ #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" diff --git a/include/configs/gr_ep2s60.h b/include/configs/gr_ep2s60.h index 265f03c..fa10676 100644 --- a/include/configs/gr_ep2s60.h +++ b/include/configs/gr_ep2s60.h @@ -306,9 +306,6 @@ /* no DDR2 Controller */ #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1 -/* Identification string */ -#define CONFIG_IDENT_STRING " Gaisler LEON3 EP2S60" - /* default kernel command line */ #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" diff --git a/include/configs/gr_xc3s_1500.h b/include/configs/gr_xc3s_1500.h index 36acf01..9e00ff9 100644 --- a/include/configs/gr_xc3s_1500.h +++ b/include/configs/gr_xc3s_1500.h @@ -272,9 +272,6 @@ /* no DDR2 Controller */ #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1 -/* Identification string */ -#define CONFIG_IDENT_STRING " Gaisler LEON3 GR-XC3S-1500" - /* default kernel command line */ #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" diff --git a/include/configs/grsim.h b/include/configs/grsim.h index c2656fb..5736540 100644 --- a/include/configs/grsim.h +++ b/include/configs/grsim.h @@ -292,8 +292,6 @@ /* default kernel command line */ #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" -#define CONFIG_IDENT_STRING " Gaisler GRSIM" - /* TSIM command: * $ ./tsim-leon3 -mmu -cas * diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h index 59adbdc..0f3204e 100644 --- a/include/configs/grsim_leon2.h +++ b/include/configs/grsim_leon2.h @@ -287,6 +287,4 @@ /* default kernel command line */ #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0" -#define CONFIG_IDENT_STRING " Gaisler GRSIM LEON2" - #endif /* __CONFIG_H */ diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h index 5907e98..5ac29db 100644 --- a/include/configs/guruplug.h +++ b/include/configs/guruplug.h @@ -11,11 +11,6 @@ #define _CONFIG_GURUPLUG_H /* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nMarvell-GuruPlug" - -/* * High Level Configuration Options (easy to change) */ #define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ diff --git a/include/configs/hikey.h b/include/configs/hikey.h index 5e5aa19..39faf80 100644 --- a/include/configs/hikey.h +++ b/include/configs/hikey.h @@ -21,8 +21,6 @@ #define CONFIG_SUPPORT_RAW_INITRD -#define CONFIG_IDENT_STRING "hikey" - #define CONFIG_BOARD_EARLY_INIT_F /* Physical Memory Map */ diff --git a/include/configs/hrcon.h b/include/configs/hrcon.h index c5e6828..99dcb75 100644 --- a/include/configs/hrcon.h +++ b/include/configs/hrcon.h @@ -20,12 +20,6 @@ #define CONFIG_SYS_TEXT_BASE 0xFE000000 -#ifdef CONFIG_HRCON_DH -#define CONFIG_IDENT_STRING " hrcon dh 0.01" -#else -#define CONFIG_IDENT_STRING " hrcon 0.01" -#endif - #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_LAST_STAGE_INIT diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h index ab23607..f686c7f 100644 --- a/include/configs/ib62x0.h +++ b/include/configs/ib62x0.h @@ -10,11 +10,6 @@ #define _CONFIG_IB62x0_H /* - * Version number information - */ -#define CONFIG_IDENT_STRING " RaidSonic ICY BOX IB-NAS62x0" - -/* * High level configuration options */ #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h index f0d4250..802b1a3 100644 --- a/include/configs/iconnect.h +++ b/include/configs/iconnect.h @@ -10,11 +10,6 @@ #define _CONFIG_ICONNECT_H /* - * Version number information - */ -#define CONFIG_IDENT_STRING " Iomega iConnect" - -/* * High level configuration options */ #define CONFIG_FEROCEON_88FR131 /* CPU Core subversion */ diff --git a/include/configs/imgtec_xilfpga.h b/include/configs/imgtec_xilfpga.h new file mode 100644 index 0000000..0a7fe60 --- /dev/null +++ b/include/configs/imgtec_xilfpga.h @@ -0,0 +1,68 @@ +/* + * Copyright (C) 2016, Imagination Technologies Ltd. + * + * Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> + * + * SPDX-License-Identifier: GPL-2.0+ + * + * Imagination Technologies Ltd. MIPSfpga + */ + +#ifndef __XILFPGA_CONFIG_H +#define __XILFPGA_CONFIG_H + +/* BootROM + MIG is pretty smart. DDR and Cache initialized */ +#define CONFIG_SKIP_LOWLEVEL_INIT + +/*-------------------------------------------- + * CPU configuration + */ +/* CPU Timer rate */ +#define CONFIG_SYS_MIPS_TIMER_FREQ 50000000 + +/* Cache Configuration */ +#define CONFIG_SYS_MIPS_CACHE_MODE CONF_CM_CACHABLE_NONCOHERENT + +/*---------------------------------------------------------------------- + * Memory Layout + */ + +/* SDRAM Configuration (for final code, data, stack, heap) */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 Mbytes */ +#define CONFIG_SYS_INIT_SP_ADDR \ + (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE - 0x1000) + +#define CONFIG_SYS_MALLOC_LEN (256 << 10) +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE +#define CONFIG_SYS_LOAD_ADDR 0x80500000 /* default load address */ + +/*---------------------------------------------------------------------- + * Commands + */ +#define CONFIG_SYS_LONGHELP /* undef to save memory */ + +/*------------------------------------------------- + * FLASH configuration + */ +#define CONFIG_SYS_NO_FLASH + +/*------------------------------------------------------------ + * Console Configuration + */ +#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args*/ +#define CONFIG_BAUDRATE 115200 + +/* ------------------------------------------------- + * Environment + */ +#define CONFIG_ENV_IS_NOWHERE 1 +#define CONFIG_ENV_SIZE 0x4000 + +/* --------------------------------------------------------------------- + * Board boot configuration + */ +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ + +#endif /* __XILFPGA_CONFIG_H */ diff --git a/include/configs/intip.h b/include/configs/intip.h index c5af365..5aa8fae 100644 --- a/include/configs/intip.h +++ b/include/configs/intip.h @@ -24,10 +24,8 @@ #define CONFIG_460EX 1 /* Specific PPC460EX */ #ifdef CONFIG_DEVCONCENTER #define CONFIG_HOSTNAME devconcenter -#define CONFIG_IDENT_STRING " devconcenter 0.06" #else #define CONFIG_HOSTNAME intip -#define CONFIG_IDENT_STRING " intip 0.06" #endif #define CONFIG_440 1 diff --git a/include/configs/io.h b/include/configs/io.h index 544d044..8c9ee0e 100644 --- a/include/configs/io.h +++ b/include/configs/io.h @@ -17,7 +17,6 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io -#define CONFIG_IDENT_STRING " io 0.06" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/io64.h b/include/configs/io64.h index 14ffb33..894da84 100644 --- a/include/configs/io64.h +++ b/include/configs/io64.h @@ -36,7 +36,6 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME io64 -#define CONFIG_IDENT_STRING " io64 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/iocon.h b/include/configs/iocon.h index d85a76c..87f56f1 100644 --- a/include/configs/iocon.h +++ b/include/configs/iocon.h @@ -17,7 +17,6 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME iocon -#define CONFIG_IDENT_STRING " iocon 0.06" #include "amcc-common.h" /* Reclaim some space. */ diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h index b377c41..0d78cfa 100644 --- a/include/configs/km_kirkwood.h +++ b/include/configs/km_kirkwood.h @@ -23,14 +23,12 @@ /* KM_KIRKWOOD */ #if defined(CONFIG_KM_KIRKWOOD) -#define CONFIG_IDENT_STRING "\nKeymile Kirkwood" #define CONFIG_HOSTNAME km_kirkwood #define CONFIG_KM_DISABLE_PCIE #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ /* KM_KIRKWOOD_PCI */ #elif defined(CONFIG_KM_KIRKWOOD_PCI) -#define CONFIG_IDENT_STRING "\nKeymile Kirkwood PCI" #define CONFIG_HOSTNAME km_kirkwood_pci #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_FPGA_CONFIG @@ -39,7 +37,6 @@ /* KM_KIRKWOOD_128M16 */ #elif defined(CONFIG_KM_KIRKWOOD_128M16) -#define CONFIG_IDENT_STRING "\nKeymile Kirkwood 128M16" #define CONFIG_HOSTNAME km_kirkwood_128m16 #undef CONFIG_SYS_KWD_CONFIG #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg @@ -51,10 +48,8 @@ #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ # if defined(CONFIG_KM_NUSA) -#define CONFIG_IDENT_STRING "\nKeymile NUSA" #define CONFIG_HOSTNAME kmnusa # elif defined(CONFIG_KM_SUGP1) -#define CONFIG_IDENT_STRING "\nKeymile SUGP1" #define CONFIG_HOSTNAME kmsugp1 #define KM_PCIE_RESET_MPP7 #endif @@ -69,7 +64,6 @@ /* KM_MGCOGE3UN */ #elif defined(CONFIG_KM_MGCOGE3UN) -#define CONFIG_IDENT_STRING "\nKeymile COGE3UN" #define CONFIG_HOSTNAME mgcoge3un #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG @@ -81,7 +75,6 @@ /* KMCOGE5UN */ #elif defined(CONFIG_KM_COGE5UN) -#define CONFIG_IDENT_STRING "\nKeymile COGE5UN" #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #undef CONFIG_SYS_KWD_CONFIG #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg @@ -93,7 +86,6 @@ /* KM_PORTL2 */ #elif defined(CONFIG_KM_PORTL2) -#define CONFIG_IDENT_STRING "\nKeymile Port-L2" #define CONFIG_HOSTNAME portl2 #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ #define CONFIG_KM_PIGGY4_88E6061 @@ -101,7 +93,6 @@ /* KM_SUV31 */ #elif defined(CONFIG_KM_SUV31) #define CONFIG_KM_IVM_BUS 1 /* I2C2 (Mux-Port 1)*/ -#define CONFIG_IDENT_STRING "\nKeymile SUV31" #define CONFIG_HOSTNAME kmsuv31 #undef CONFIG_SYS_KWD_CONFIG #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h index 9b2c575..bd6c83e 100644 --- a/include/configs/lacie_kw.h +++ b/include/configs/lacie_kw.h @@ -12,27 +12,20 @@ */ #if defined(CONFIG_INETSPACE_V2) #define CONFIG_MACH_TYPE MACH_TYPE_INETSPACE_V2 -#define CONFIG_IDENT_STRING " IS v2" #elif defined(CONFIG_NETSPACE_V2) #define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_V2 -#define CONFIG_IDENT_STRING " NS v2" #elif defined(CONFIG_NETSPACE_LITE_V2) #define MACH_TYPE_NETSPACE_LITE_V2 2983 /* missing in mach-types.h */ #define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_LITE_V2 -#define CONFIG_IDENT_STRING " NS v2 Lite" #elif defined(CONFIG_NETSPACE_MINI_V2) #define MACH_TYPE_NETSPACE_MINI_V2 2831 /* missing in mach-types.h */ #define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MINI_V2 -#define CONFIG_IDENT_STRING " NS v2 Mini" #elif defined(CONFIG_NETSPACE_MAX_V2) #define CONFIG_MACH_TYPE MACH_TYPE_NETSPACE_MAX_V2 -#define CONFIG_IDENT_STRING " NS Max v2" #elif defined(CONFIG_D2NET_V2) #define CONFIG_MACH_TYPE MACH_TYPE_D2NET_V2 -#define CONFIG_IDENT_STRING " D2 v2" #elif defined(CONFIG_NET2BIG_V2) #define CONFIG_MACH_TYPE MACH_TYPE_NET2BIG_V2 -#define CONFIG_IDENT_STRING " 2Big v2" #else #error "Unknown board" #endif diff --git a/include/configs/ls2080a_emu.h b/include/configs/ls2080a_emu.h index 16e37bf..cec12ad 100644 --- a/include/configs/ls2080a_emu.h +++ b/include/configs/ls2080a_emu.h @@ -9,8 +9,6 @@ #include "ls2080a_common.h" -#define CONFIG_IDENT_STRING " LS2080A-EMU" - #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 133333333 diff --git a/include/configs/ls2080a_simu.h b/include/configs/ls2080a_simu.h index 7f245b5..1851d41 100644 --- a/include/configs/ls2080a_simu.h +++ b/include/configs/ls2080a_simu.h @@ -9,8 +9,6 @@ #include "ls2080a_common.h" -#define CONFIG_IDENT_STRING " LS2080A-SIMU" - #define CONFIG_SYS_CLK_FREQ 100000000 #define CONFIG_DDR_CLK_FREQ 133333333 diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h index e878cbe..baa35db 100644 --- a/include/configs/lsxl.h +++ b/include/configs/lsxl.h @@ -12,12 +12,10 @@ * Version number information */ #if defined(CONFIG_LSCHLV2) -#define CONFIG_IDENT_STRING " LS-CHLv2" #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg #define CONFIG_MACH_TYPE 3006 #define CONFIG_SYS_TCLK 166666667 /* 166 MHz */ #elif defined(CONFIG_LSXHL) -#define CONFIG_IDENT_STRING " LS-XHL" #define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg #define CONFIG_MACH_TYPE 2663 /* CONFIG_SYS_TCLK is 200000000 by default */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index da63842..7b88ad5 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -12,11 +12,6 @@ #define __CONFIG_H /* - * Liebherr extra version info - */ -#define CONFIG_IDENT_STRING " - v2.0" - -/* * High Level Configuration Options */ #define CONFIG_LWMON5 1 /* Board is lwmon5 */ diff --git a/include/configs/nas220.h b/include/configs/nas220.h index cca2324..55dbc44 100644 --- a/include/configs/nas220.h +++ b/include/configs/nas220.h @@ -17,7 +17,6 @@ */ #define MACH_TYPE_NAS220 MACH_TYPE_RD88F6192_NAS #define CONFIG_MACH_TYPE MACH_TYPE_NAS220 -#define CONFIG_IDENT_STRING "\nNAS 220" /* * High Level Configuration Options (easy to change) diff --git a/include/configs/neo.h b/include/configs/neo.h index 4f244a9..8b6ee92 100644 --- a/include/configs/neo.h +++ b/include/configs/neo.h @@ -17,7 +17,6 @@ * Include common defines/options for all AMCC eval boards */ #define CONFIG_HOSTNAME neo -#define CONFIG_IDENT_STRING " neo 0.02" #include "amcc-common.h" #define CONFIG_BOARD_EARLY_INIT_F diff --git a/include/configs/odroid-c2.h b/include/configs/odroid-c2.h index bf5df9c..1d5b3d5 100644 --- a/include/configs/odroid-c2.h +++ b/include/configs/odroid-c2.h @@ -8,8 +8,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -#define CONFIG_IDENT_STRING " odroid-c2" - /* Serial setup */ #define CONFIG_CONS_INDEX 0 #define CONFIG_BAUDRATE 115200 diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index 5196d58..0b57949 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -12,7 +12,6 @@ #include <configs/exynos5-common.h> #undef CONFIG_ENV_IS_IN_SPI_FLASH -#define CONFIG_IDENT_STRING " for ODROID-XU3" #define CONFIG_BOARD_COMMON diff --git a/include/configs/openrd.h b/include/configs/openrd.h index 4defa7e..908a1af 100644 --- a/include/configs/openrd.h +++ b/include/configs/openrd.h @@ -15,23 +15,6 @@ #define _CONFIG_OPENRD_H /* - * Version number information - */ -#ifdef CONFIG_BOARD_IS_OPENRD_ULTIMATE -# define CONFIG_IDENT_STRING "\nOpenRD-Ultimate" -#else -# ifdef CONFIG_BOARD_IS_OPENRD_CLIENT -# define CONFIG_IDENT_STRING "\nOpenRD-Client" -# else -# ifdef CONFIG_BOARD_IS_OPENRD_BASE -# define CONFIG_IDENT_STRING "\nOpenRD-Base" -# else -# error Unknown OpenRD board specified -# endif -# endif -#endif - -/* * High Level Configuration Options (easy to change) */ #define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */ diff --git a/include/configs/origen.h b/include/configs/origen.h index 1fa2f4d..0f76d32 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -87,8 +87,6 @@ "fi;" \ "load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " -#define CONFIG_IDENT_STRING " for ORIGEN" - #define CONFIG_CLK_1000_400_200 /* MIU (Memory Interleaving Unit) */ diff --git a/include/configs/peach-pi.h b/include/configs/peach-pi.h index 6c42aaa..b01fe4c 100644 --- a/include/configs/peach-pi.h +++ b/include/configs/peach-pi.h @@ -29,8 +29,6 @@ #define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" -#define CONFIG_IDENT_STRING " for Peach-Pi" - /* Display */ #define CONFIG_LCD #ifdef CONFIG_LCD diff --git a/include/configs/peach-pit.h b/include/configs/peach-pit.h index 6c68dd2..c4ae0e2 100644 --- a/include/configs/peach-pit.h +++ b/include/configs/peach-pit.h @@ -29,8 +29,6 @@ #define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" -#define CONFIG_IDENT_STRING " for Peach-Pit" - /* DRAM Memory Banks */ #define CONFIG_NR_DRAM_BANKS 4 #define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */ diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h index 6393ff3..5660cb0 100644 --- a/include/configs/pogo_e02.h +++ b/include/configs/pogo_e02.h @@ -18,7 +18,6 @@ */ #define MACH_TYPE_POGO_E02 3542 #define CONFIG_MACH_TYPE MACH_TYPE_POGO_E02 -#define CONFIG_IDENT_STRING "\nPogo E02" /* * High Level Configuration Options (easy to change) diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h index fa76a25..748a2ea 100644 --- a/include/configs/sheevaplug.h +++ b/include/configs/sheevaplug.h @@ -11,11 +11,6 @@ #define _CONFIG_SHEEVAPLUG_H /* - * Version number information - */ -#define CONFIG_IDENT_STRING "\nMarvell-Sheevaplug" - -/* * High Level Configuration Options (easy to change) */ #define CONFIG_FEROCEON_88FR131 1 /* CPU Core subversion */ diff --git a/include/configs/smdk5250.h b/include/configs/smdk5250.h index 92a0833..5c60887 100644 --- a/include/configs/smdk5250.h +++ b/include/configs/smdk5250.h @@ -20,7 +20,6 @@ #define CONFIG_BOARD_COMMON -#define CONFIG_IDENT_STRING " for SMDK5250" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #endif /* __CONFIG_SMDK_H */ diff --git a/include/configs/smdk5420.h b/include/configs/smdk5420.h index a46ca74..d8d095f 100644 --- a/include/configs/smdk5420.h +++ b/include/configs/smdk5420.h @@ -31,7 +31,6 @@ #define CONFIG_SERIAL3 /* use SERIAL 3 */ #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" -#define CONFIG_IDENT_STRING " for SMDK5420" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" /* USB */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 9d52689..0ad1a27 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -167,7 +167,6 @@ #define CONFIG_SYS_NO_FLASH 1 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* 256 KiB */ -#define CONFIG_IDENT_STRING " for SMDKC100" #if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000) #define CONFIG_ENABLE_MMU diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index efb18ff..ccb8921 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -67,7 +67,6 @@ #define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE /* FLASH and environment organization */ -#define CONFIG_IDENT_STRING " for SMDKC210/V310" #define CONFIG_CLK_1000_400_200 diff --git a/include/configs/snow.h b/include/configs/snow.h index 1d8d8da..01d9db8 100644 --- a/include/configs/snow.h +++ b/include/configs/snow.h @@ -15,7 +15,6 @@ #define CONFIG_BOARD_COMMON -#define CONFIG_IDENT_STRING " for snow" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #endif /* __CONFIG_SNOW_H */ diff --git a/include/configs/spear-common.h b/include/configs/spear-common.h index 7f6cb93..a6973c5 100644 --- a/include/configs/spear-common.h +++ b/include/configs/spear-common.h @@ -182,7 +182,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 #define CONFIG_SYS_MALLOC_LEN (1024*1024) -#define CONFIG_IDENT_STRING "-SPEAr" #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_CBSIZE 256 diff --git a/include/configs/spring.h b/include/configs/spring.h index 8940123..d8c9b4a 100644 --- a/include/configs/spring.h +++ b/include/configs/spring.h @@ -13,7 +13,6 @@ #define CONFIG_BOARD_COMMON -#define CONFIG_IDENT_STRING " for spring" #define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0" #endif /* __CONFIG_SPRING_H */ diff --git a/include/configs/strider.h b/include/configs/strider.h index 5fabbad..5cd37d7 100644 --- a/include/configs/strider.h +++ b/include/configs/strider.h @@ -20,16 +20,6 @@ #define CONFIG_SYS_TEXT_BASE 0xFE000000 -#ifdef CONFIG_STRIDER_CPU_DP -#define CONFIG_IDENT_STRING " strider cpu dp 0.01" -#elif defined(CONFIG_STRIDER_CPU) -#define CONFIG_IDENT_STRING " strider cpu 0.01" -#elif defined(CONFIG_STRIDER_CON_DP) -#define CONFIG_IDENT_STRING " strider con dp 0.01" -#else -#define CONFIG_IDENT_STRING " strider con 0.01" -#endif - #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_BOARD_EARLY_INIT_R #define CONFIG_LAST_STAGE_INIT diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 8de9c2b..deb2e8d 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -178,7 +178,6 @@ #define CONFIG_SYS_NO_FLASH #define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */ -#define CONFIG_IDENT_STRING " Allwinner Technology" #define CONFIG_DISPLAY_BOARDINFO #define CONFIG_ENV_OFFSET (544 << 10) /* (8 + 24 + 512) KiB */ diff --git a/include/configs/thunderx_88xx.h b/include/configs/thunderx_88xx.h index 5c3b3da..4387082 100644 --- a/include/configs/thunderx_88xx.h +++ b/include/configs/thunderx_88xx.h @@ -15,9 +15,6 @@ #define CONFIG_SYS_NO_FLASH -#define CONFIG_IDENT_STRING \ - " for Cavium Thunder CN88XX ARM v8 Multi-Core" - #define MEM_BASE 0x00500000 #define CONFIG_SYS_LOWMEM_BASE MEM_BASE diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h index 71c4a1f..48834c2 100644 --- a/include/configs/vexpress_aemv8a.h +++ b/include/configs/vexpress_aemv8a.h @@ -19,8 +19,6 @@ #define CONFIG_SUPPORT_RAW_INITRD -#define CONFIG_IDENT_STRING " vexpress_aemv8a" - /* Link Definitions */ #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \ defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM) diff --git a/include/configs/x600.h b/include/configs/x600.h index 574f00c..9db4524 100644 --- a/include/configs/x600.h +++ b/include/configs/x600.h @@ -148,7 +148,6 @@ #define CONFIG_SYS_MEMTEST_START 0x00800000 #define CONFIG_SYS_MEMTEST_END 0x04000000 #define CONFIG_SYS_MALLOC_LEN (8 << 20) -#define CONFIG_IDENT_STRING "-SPEAr" #define CONFIG_SYS_LONGHELP #define CONFIG_CMDLINE_EDITING #define CONFIG_AUTO_COMPLETE diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h index aeb65ee..5ed8beb 100644 --- a/include/configs/xilinx_zynqmp.h +++ b/include/configs/xilinx_zynqmp.h @@ -34,10 +34,6 @@ /* Have release address at the end of 256MB for now */ #define CPU_RELEASE_ADDR 0xFFFFFF0 -#if !defined(CONFIG_IDENT_STRING) -# define CONFIG_IDENT_STRING " Xilinx ZynqMP" -#endif - #define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_TEXT_BASE /* Generic Timer Definitions - setup in EL3. Setup by ATF for other cases */ @@ -79,7 +75,9 @@ /* Diff from config_distro_defaults.h */ #define CONFIG_SUPPORT_RAW_INITRD +#if !defined(CONFIG_SPL_BUILD) #define CONFIG_ENV_VARS_UBOOT_CONFIG +#endif #define CONFIG_AUTO_COMPLETE /* PXE */ @@ -112,7 +110,7 @@ #define CONFIG_SYS_LOAD_ADDR 0x8000000 #if defined(CONFIG_ZYNQMP_USB) -#define CONFIG_USB_MAX_CONTROLLER_COUNT 1 +#define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 #define CONFIG_USB_XHCI_ZYNQMP @@ -140,7 +138,6 @@ # define DFU_ALT_INFO #endif - #define CONFIG_BOARD_LATE_INIT /* Do not preserve environment */ @@ -189,7 +186,6 @@ #endif #ifdef CONFIG_SATA_CEVA -#define CONFIG_AHCI #define CONFIG_LIBATA #define CONFIG_SCSI_AHCI #define CONFIG_SCSI_AHCI_PLAT @@ -251,13 +247,24 @@ DFU_ALT_INFO #endif +/* SPL can't handle all huge variables - define just DFU */ +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT) +#undef CONFIG_EXTRA_ENV_SETTINGS +# define CONFIG_EXTRA_ENV_SETTINGS \ + "dfu_alt_info_ram=uboot.bin ram 0x8000000 0x1000000;" \ + "atf-uboot.ub ram 0x10000000 0x1000000;" \ + "Image ram 0x80000 0x3f80000;" \ + "system.dtb ram 0x4000000 0x100000\0" \ + "dfu_bufsiz=0x1000\0" +#endif + #define CONFIG_SPL_TEXT_BASE 0xfffc0000 #define CONFIG_SPL_STACK 0xfffffffc -#define CONFIG_SPL_MAX_SIZE 0x20000 +#define CONFIG_SPL_MAX_SIZE 0x40000 /* Just random location in OCM */ -#define CONFIG_SPL_BSS_START_ADDR 0x1000000 -#define CONFIG_SPL_BSS_MAX_SIZE 0x2000000 +#define CONFIG_SPL_BSS_START_ADDR 0x0 +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT @@ -269,7 +276,7 @@ #define CONFIG_SYS_SPL_ARGS_ADDR 0x8000000 /* ATF is my kernel image */ -#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf.ub" +#define CONFIG_SPL_FS_LOAD_KERNEL_NAME "atf-uboot.ub" /* FIT load address for RAM boot */ #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x10000000 @@ -283,4 +290,18 @@ # define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" #endif +#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_DFU_SUPPORT) +# undef CONFIG_CMD_BOOTD +# define CONFIG_SPL_ENV_SUPPORT +# define CONFIG_SPL_HASH_SUPPORT +# define CONFIG_ENV_MAX_ENTRIES 10 + +# define CONFIG_SYS_SPL_MALLOC_START 0x20000000 +# define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000000 + +#ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE +# error "Disable CONFIG_SPL_SYS_MALLOC_SIMPLE. Full malloc needs to be used" +#endif +#endif + #endif /* __XILINX_ZYNQMP_H */ diff --git a/include/configs/xilinx_zynqmp_ep.h b/include/configs/xilinx_zynqmp_ep.h index 44434aa..8e4b960 100644 --- a/include/configs/xilinx_zynqmp_ep.h +++ b/include/configs/xilinx_zynqmp_ep.h @@ -16,7 +16,6 @@ #define CONFIG_ZYNQ_SDHCI_MAX_FREQ 52000000 #define CONFIG_ZYNQ_SDHCI_MIN_FREQ (CONFIG_ZYNQ_SDHCI_MAX_FREQ << 9) #define CONFIG_ZYNQ_EEPROM -#define CONFIG_AHCI #define CONFIG_SATA_CEVA #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR, \ ZYNQMP_USB1_XHCI_BASEADDR} diff --git a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h index c9f4432..b19a552 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm015_dc1.h @@ -15,8 +15,6 @@ #define CONFIG_AHCI #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} -#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm015 dc1" - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1751_XM015_DC1_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h index 526d0bb..0714d72 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm016_dc2.h @@ -12,8 +12,6 @@ #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB1_XHCI_BASEADDR} -#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm016 dc2" - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1751_XM016_DC2_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h b/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h deleted file mode 100644 index 65277a6..0000000 --- a/include/configs/xilinx_zynqmp_zc1751_xm018_dc4.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Configuration for Xilinx ZynqMP zc1751 XM018 DC4 - * - * (C) Copyright 2015 Xilinx, Inc. - * Michal Simek <michal.simek@xilinx.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H -#define __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H - -#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm018 dc4" - -#include <configs/xilinx_zynqmp.h> - -#endif /* __CONFIG_ZYNQMP_ZC1751_XM018_DC4_H */ diff --git a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h index 76350d9..6a0e397 100644 --- a/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h +++ b/include/configs/xilinx_zynqmp_zc1751_xm019_dc5.h @@ -13,8 +13,6 @@ #define CONFIG_ZYNQ_SDHCI0 -#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZC1751 xm019 dc5" - #include <configs/xilinx_zynqmp.h> #endif /* __CONFIG_ZYNQMP_ZC1751_XM019_DC5_H */ diff --git a/include/configs/xilinx_zynqmp_zcu102.h b/include/configs/xilinx_zynqmp_zcu102.h index 7ceab32..adf2321 100644 --- a/include/configs/xilinx_zynqmp_zcu102.h +++ b/include/configs/xilinx_zynqmp_zcu102.h @@ -45,8 +45,6 @@ #define CONFIG_ZYNQMP_XHCI_LIST {ZYNQMP_USB0_XHCI_BASEADDR} -#define CONFIG_IDENT_STRING " Xilinx ZynqMP ZCU102" - #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 #define CONFIG_CMD_EEPROM #define CONFIG_ZYNQ_EEPROM_BUS 5 diff --git a/include/dt-bindings/clock/boston-clock.h b/include/dt-bindings/clock/boston-clock.h new file mode 100644 index 0000000..25f9cd2 --- /dev/null +++ b/include/dt-bindings/clock/boston-clock.h @@ -0,0 +1,13 @@ +/* + * Copyright (C) 2016 Imagination Technologies + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ +#define __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ + +#define BOSTON_CLK_SYS 0 +#define BOSTON_CLK_CPU 1 + +#endif /* __DT_BINDINGS_CLOCK_BOSTON_CLOCK_H__ */ diff --git a/include/dt-bindings/interrupt-controller/mips-gic.h b/include/dt-bindings/interrupt-controller/mips-gic.h new file mode 100644 index 0000000..cf35a57 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/mips-gic.h @@ -0,0 +1,9 @@ +#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H +#define _DT_BINDINGS_INTERRUPT_CONTROLLER_MIPS_GIC_H + +#include <dt-bindings/interrupt-controller/irq.h> + +#define GIC_SHARED 0 +#define GIC_LOCAL 1 + +#endif diff --git a/include/mmc.h b/include/mmc.h index aa6d5d1..e815eb3 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -11,6 +11,7 @@ #define _MMC_H_ #include <linux/list.h> +#include <linux/sizes.h> #include <linux/compiler.h> #include <part.h> @@ -102,6 +103,7 @@ #define SD_CMD_SWITCH_UHS18V 11 #define SD_CMD_APP_SET_BUS_WIDTH 6 +#define SD_CMD_APP_SD_STATUS 13 #define SD_CMD_ERASE_WR_BLK_START 32 #define SD_CMD_ERASE_WR_BLK_END 33 #define SD_CMD_APP_SEND_OP_COND 41 @@ -392,6 +394,12 @@ struct mmc_config { unsigned char part_type; }; +struct sd_ssr { + unsigned int au; /* In sectors */ + unsigned int erase_timeout; /* In milliseconds */ + unsigned int erase_offset; /* In milliseconds */ +}; + /* * With CONFIG_DM_MMC enabled, struct mmc can be accessed from the MMC device * with mmc_get_mmc_dev(). @@ -426,6 +434,7 @@ struct mmc { uint write_bl_len; uint erase_grp_size; /* in 512-byte sectors */ uint hc_wp_grp_size; /* in 512-byte sectors */ + struct sd_ssr ssr; /* SD status register */ u64 capacity; u64 capacity_user; u64 capacity_boot; diff --git a/include/sdhci.h b/include/sdhci.h index 6844c73..144570f 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -97,6 +97,7 @@ #define SDHCI_DIV_MASK 0xFF #define SDHCI_DIV_MASK_LEN 8 #define SDHCI_DIV_HI_MASK 0x300 +#define SDHCI_PROG_CLOCK_MODE 0x0020 #define SDHCI_CLOCK_CARD_EN 0x0004 #define SDHCI_CLOCK_INT_STABLE 0x0002 #define SDHCI_CLOCK_INT_EN 0x0001 @@ -242,6 +243,7 @@ struct sdhci_host { unsigned int quirks; unsigned int host_caps; unsigned int version; + unsigned int clk_mul; /* Clock Multiplier value */ unsigned int clock; struct mmc *mmc; const struct sdhci_ops *ops; diff --git a/include/version.h b/include/version.h index 777e9f6..0494309 100644 --- a/include/version.h +++ b/include/version.h @@ -14,10 +14,6 @@ #include "generated/version_autogenerated.h" #endif -#ifndef CONFIG_IDENT_STRING -#define CONFIG_IDENT_STRING "" -#endif - #define U_BOOT_VERSION_STRING U_BOOT_VERSION " (" U_BOOT_DATE " - " \ U_BOOT_TIME " " U_BOOT_TZ ")" CONFIG_IDENT_STRING diff --git a/include/xilinx.h b/include/xilinx.h index aebcb3b..d2a2ea7 100644 --- a/include/xilinx.h +++ b/include/xilinx.h @@ -21,6 +21,7 @@ typedef enum { /* typedef xilinx_iface */ master_selectmap, /* master SelectMap (virtex2) */ slave_selectmap, /* slave SelectMap (virtex2) */ devcfg, /* devcfg interface (zynq) */ + csu_dma, /* csu_dma interface (zynqmp) */ max_xilinx_iface_type /* insert all new types before this */ } xilinx_iface; /* end, typedef xilinx_iface */ @@ -31,6 +32,7 @@ typedef enum { /* typedef xilinx_family */ xilinx_virtex2, /* Virtex2 Family */ xilinx_spartan3, /* Spartan-III Family */ xilinx_zynq, /* Zynq Family */ + xilinx_zynqmp, /* ZynqMP Family */ max_xilinx_type /* insert all new types before this */ } xilinx_family; /* end, typedef xilinx_family */ diff --git a/include/zynqmppl.h b/include/zynqmppl.h new file mode 100644 index 0000000..542ace9 --- /dev/null +++ b/include/zynqmppl.h @@ -0,0 +1,24 @@ +/* + * (C) Copyright 2015 Xilinx, Inc, + * Michal Simek <michal.simek@xilinx.com> + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _ZYNQMPPL_H_ +#define _ZYNQMPPL_H_ + +#include <xilinx.h> + +#define ZYNQMP_SIP_SVC_CSU_DMA_CHIPID 0xC2000018 +#define ZYNQMP_SIP_SVC_PM_FPGA_LOAD 0xC2000016 +#define ZYNQMP_FPGA_OP_INIT (1 << 0) +#define ZYNQMP_FPGA_OP_LOAD (1 << 1) +#define ZYNQMP_FPGA_OP_DONE (1 << 2) + +extern struct xilinx_fpga_op zynqmp_op; + +#define XILINX_ZYNQMP_DESC \ +{ xilinx_zynqmp, csu_dma, 1, &zynqmp_op, 0, &zynqmp_op } + +#endif /* _ZYNQMPPL_H_ */ diff --git a/lib/libfdt/libfdt.swig b/lib/libfdt/libfdt.swig index 14f583d..b24c72b 100644 --- a/lib/libfdt/libfdt.swig +++ b/lib/libfdt/libfdt.swig @@ -75,6 +75,14 @@ struct fdt_property { } %} +%typemap(in) (const void *) { + if (!PyByteArray_Check($input)) { + SWIG_exception_fail(SWIG_TypeError, "in method '" "$symname" "', argument " + "$argnum"" of type '" "$type""'"); + } + $1 = (void *) PyByteArray_AsString($input); +} + const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int checklen); int fdt_path_offset(const void *fdt, const char *path); int fdt_first_property_offset(const void *fdt, int nodeoffset); @@ -87,3 +95,19 @@ const char *fdt_get_name(const void *fdt, int nodeoffset, int *OUTPUT); const char *fdt_string(const void *fdt, int stroffset); int fdt_first_subnode(const void *fdt, int offset); int fdt_next_subnode(const void *fdt, int offset); + +%typemap(in) (void *) { + if (!PyByteArray_Check($input)) { + SWIG_exception_fail(SWIG_TypeError, "in method '" "$symname" "', argument " + "$argnum"" of type '" "$type""'"); + } + $1 = PyByteArray_AsString($input); +} + +int fdt_delprop(void *fdt, int nodeoffset, const char *name); + +const char *fdt_strerror(int errval); +int fdt_pack(void *fdt); + +int fdt_totalsize(const void *fdt); +int fdt_off_dt_struct(const void *fdt); diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index 4994fa8..5a7f79c 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -216,8 +216,19 @@ quiet_cmd_cpp_cfg = CFG $@ cmd_cpp_cfg = $(CPP) -Wp,-MD,$(depfile) $(cpp_flags) $(LDPPFLAGS) -ansi \ -DDO_DEPS_ONLY -D__ASSEMBLY__ -x assembler-with-cpp -P -dM -E -o $@ $< +# If .u-boot.cfg.d is still present, then either: +# a) The previous build used a Makefile that used if_changed rather than +# if_changed_dep when building u-boot.cfg, and hence any later builds will +# be unaware of the dependencies for u-boot.cfg. In this case, we must +# delete u-boot.cfg to force it and .u-boot.cfg.cmd to be rebuilt the +# correct way. +# b) The previous build failed or was interrupted while building u-boot.cfg, +# so deleting u-boot.cfg isn't going to cause any additional work. +ifneq ($(wildcard $(obj)/.$(SPL_BIN).d),) + unused := $(shell rm -f $(obj)/$(SPL_BIN).cfg) +endif $(obj)/$(SPL_BIN).cfg: include/config.h FORCE - $(call if_changed,cpp_cfg) + $(call if_changed_dep,cpp_cfg) pythonpath = PYTHONPATH=tools diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 05f663f..cb4516f 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -1728,7 +1728,6 @@ CONFIG_IRAM_STACK CONFIG_IRAM_TOP CONFIG_IRDA_BASE CONFIG_ISO_PARTITION -CONFIG_ISO_STRING CONFIG_ISP1362_USB CONFIG_IS_ CONFIG_IS_BUILTIN @@ -3086,8 +3085,6 @@ CONFIG_MII_DEFAULT_TSEC CONFIG_MII_INIT CONFIG_MII_SUPPRESS_PREAMBLE CONFIG_MINIFAP -CONFIG_MIP405 -CONFIG_MIP405T CONFIG_MIPS_HUGE_TLB_SUPPORT CONFIG_MIPS_MT_FPAFF CONFIG_MIRQ_EN diff --git a/test/py/tests/test_vboot.py b/test/py/tests/test_vboot.py index 021892b..6e62820 100644 --- a/test/py/tests/test_vboot.py +++ b/test/py/tests/test_vboot.py @@ -53,7 +53,7 @@ def test_vboot(u_boot_console): util.run_and_log(cons, 'dtc %s %s%s -O dtb ' '-o %s%s' % (dtc_args, datadir, dts, tmpdir, dtb)) - def run_bootm(sha_algo, test_type, expect_string): + def run_bootm(sha_algo, test_type, expect_string, boots): """Run a 'bootm' command U-Boot. This always starts a fresh U-Boot instance since the device tree may @@ -64,6 +64,8 @@ def test_vboot(u_boot_console): expect_string: A string which is expected in the output. sha_algo: Either 'sha1' or 'sha256', to select the algorithm to use. + boots: A boolean that is True if Linux should boot and False if + we are expected to not boot """ cons.restart_uboot() with cons.log.section('Verified boot %s %s' % (sha_algo, test_type)): @@ -72,6 +74,8 @@ def test_vboot(u_boot_console): 'fdt addr 100', 'bootm 100']) assert(expect_string in ''.join(output)) + if boots: + assert('sandbox: continuing, as we cannot run' in ''.join(output)) def make_fit(its): """Make a new FIT from the .its source file. @@ -117,22 +121,22 @@ def test_vboot(u_boot_console): # Build the FIT, but don't sign anything yet cons.log.action('%s: Test FIT with signed images' % sha_algo) make_fit('sign-images-%s.its' % sha_algo) - run_bootm(sha_algo, 'unsigned images', 'dev-') + run_bootm(sha_algo, 'unsigned images', 'dev-', True) # Sign images with our dev keys sign_fit(sha_algo) - run_bootm(sha_algo, 'signed images', 'dev+') + run_bootm(sha_algo, 'signed images', 'dev+', True) # Create a fresh .dtb without the public keys dtc('sandbox-u-boot.dts') cons.log.action('%s: Test FIT with signed configuration' % sha_algo) make_fit('sign-configs-%s.its' % sha_algo) - run_bootm(sha_algo, 'unsigned config', '%s+ OK' % sha_algo) + run_bootm(sha_algo, 'unsigned config', '%s+ OK' % sha_algo, True) # Sign images with our dev keys sign_fit(sha_algo) - run_bootm(sha_algo, 'signed config', 'dev+') + run_bootm(sha_algo, 'signed config', 'dev+', True) cons.log.action('%s: Check signed config on the host' % sha_algo) @@ -149,7 +153,7 @@ def test_vboot(u_boot_console): util.run_and_log(cons, 'fdtput -t bx %s %s value %s' % (fit, sig_node, sig)) - run_bootm(sha_algo, 'Signed config with bad hash', 'Bad Data Hash') + run_bootm(sha_algo, 'Signed config with bad hash', 'Bad Data Hash', False) cons.log.action('%s: Check bad config on the host' % sha_algo) util.run_and_log_expect_exception(cons, [fit_check_sign, '-f', fit, diff --git a/tools/buildman/control.py b/tools/buildman/control.py index b86d7b3..0b6ab03 100644 --- a/tools/buildman/control.py +++ b/tools/buildman/control.py @@ -237,7 +237,7 @@ def DoBuildman(options, args, toolchains=None, make_func=None, boards=None, options.step = len(series.commits) - 1 gnu_make = command.Output(os.path.join(options.git, - 'scripts/show-gnu-make')).rstrip() + 'scripts/show-gnu-make'), raise_on_error=False).rstrip() if not gnu_make: sys.exit('GNU Make not found') diff --git a/tools/dtoc/dtoc.py b/tools/dtoc/dtoc.py index ec80abe..518aa51 100755 --- a/tools/dtoc/dtoc.py +++ b/tools/dtoc/dtoc.py @@ -9,27 +9,16 @@ import copy from optparse import OptionError, OptionParser import os +import struct import sys -import fdt_util - # Bring in the patman libraries our_path = os.path.dirname(os.path.realpath(__file__)) sys.path.append(os.path.join(our_path, '../patman')) -# Bring in either the normal fdt library (which relies on libfdt) or the -# fallback one (which uses fdtget and is slower). Both provide the same -# interfface for this file to use. -try: - from fdt import Fdt - import fdt - have_libfdt = True -except ImportError: - have_libfdt = False - from fdt_fallback import Fdt - import fdt_fallback as fdt - -import struct +import fdt +import fdt_select +import fdt_util # When we see these properties we ignore them - i.e. do not create a structure member PROP_IGNORE_LIST = [ @@ -45,10 +34,10 @@ PROP_IGNORE_LIST = [ # C type declarations for the tyues we support TYPE_NAMES = { - fdt_util.TYPE_INT: 'fdt32_t', - fdt_util.TYPE_BYTE: 'unsigned char', - fdt_util.TYPE_STRING: 'const char *', - fdt_util.TYPE_BOOL: 'bool', + fdt.TYPE_INT: 'fdt32_t', + fdt.TYPE_BYTE: 'unsigned char', + fdt.TYPE_STRING: 'const char *', + fdt.TYPE_BOOL: 'bool', }; STRUCT_PREFIX = 'dtd_' @@ -150,13 +139,13 @@ class DtbPlatdata: type: Data type (fdt_util) value: Data value, as a string of bytes """ - if type == fdt_util.TYPE_INT: + if type == fdt.TYPE_INT: return '%#x' % fdt_util.fdt32_to_cpu(value) - elif type == fdt_util.TYPE_BYTE: + elif type == fdt.TYPE_BYTE: return '%#x' % ord(value[0]) - elif type == fdt_util.TYPE_STRING: + elif type == fdt.TYPE_STRING: return '"%s"' % value - elif type == fdt_util.TYPE_BOOL: + elif type == fdt.TYPE_BOOL: return 'true' def GetCompatName(self, node): @@ -178,8 +167,7 @@ class DtbPlatdata: Once this is done, self.fdt.GetRoot() can be called to obtain the device tree root node, and progress from there. """ - self.fdt = Fdt(self._dtb_fname) - self.fdt.Scan() + self.fdt = fdt_select.FdtScan(self._dtb_fname) def ScanTree(self): """Scan the device tree for useful information diff --git a/tools/dtoc/fdt.py b/tools/dtoc/fdt.py index 1d913a9..816fdbe 100644 --- a/tools/dtoc/fdt.py +++ b/tools/dtoc/fdt.py @@ -6,17 +6,26 @@ # SPDX-License-Identifier: GPL-2.0+ # -import fdt_util -import libfdt +import struct import sys -# This deals with a device tree, presenting it as a list of Node and Prop -# objects, representing nodes and properties, respectively. -# -# This implementation uses a libfdt Python library to access the device tree, -# so it is fairly efficient. +import fdt_util + +# This deals with a device tree, presenting it as an assortment of Node and +# Prop objects, representing nodes and properties, respectively. This file +# contains the base classes and defines the high-level API. Most of the +# implementation is in the FdtFallback and FdtNormal subclasses. See +# fdt_select.py for how to create an Fdt object. + +# A list of types we support +(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL) = range(4) -class Prop: +def CheckErr(errnum, msg): + if errnum: + raise ValueError('Error %d: %s: %s' % + (errnum, libfdt.fdt_strerror(errnum), msg)) + +class PropBase: """A device tree property Properties: @@ -25,14 +34,11 @@ class Prop: bytes type: Value type """ - def __init__(self, name, bytes): + def __init__(self, node, offset, name): + self._node = node + self._offset = offset self.name = name self.value = None - if not bytes: - self.type = fdt_util.TYPE_BOOL - self.value = True - return - self.type, self.value = fdt_util.BytesToValue(bytes) def GetPhandle(self): """Get a (single) phandle value from a property @@ -71,12 +77,85 @@ class Prop: self.value = [self.value] if type(self.value) == list and len(newprop.value) > len(self.value): - val = fdt_util.GetEmpty(self.type) + val = self.GetEmpty(self.type) while len(self.value) < len(newprop.value): self.value.append(val) + def BytesToValue(self, bytes): + """Converts a string of bytes into a type and value + + Args: + A string containing bytes + + Return: + A tuple: + Type of data + Data, either a single element or a list of elements. Each element + is one of: + TYPE_STRING: string value from the property + TYPE_INT: a byte-swapped integer stored as a 4-byte string + TYPE_BYTE: a byte stored as a single-byte string + """ + size = len(bytes) + strings = bytes.split('\0') + is_string = True + count = len(strings) - 1 + if count > 0 and not strings[-1]: + for string in strings[:-1]: + if not string: + is_string = False + break + for ch in string: + if ch < ' ' or ch > '~': + is_string = False + break + else: + is_string = False + if is_string: + if count == 1: + return TYPE_STRING, strings[0] + else: + return TYPE_STRING, strings[:-1] + if size % 4: + if size == 1: + return TYPE_BYTE, bytes[0] + else: + return TYPE_BYTE, list(bytes) + val = [] + for i in range(0, size, 4): + val.append(bytes[i:i + 4]) + if size == 4: + return TYPE_INT, val[0] + else: + return TYPE_INT, val + + def GetEmpty(self, type): + """Get an empty / zero value of the given type + + Returns: + A single value of the given type + """ + if type == TYPE_BYTE: + return chr(0) + elif type == TYPE_INT: + return struct.pack('<I', 0); + elif type == TYPE_STRING: + return '' + else: + return True + + def GetOffset(self): + """Get the offset of a property + + This can be implemented by subclasses. + + Returns: + The offset of the property (struct fdt_property) within the + file, or None if not known. + """ + return None -class Node: +class NodeBase: """A device tree node Properties: @@ -89,32 +168,42 @@ class Node: Keyed by property name """ def __init__(self, fdt, offset, name, path): - self.offset = offset + self._fdt = fdt + self._offset = offset self.name = name self.path = path - self._fdt = fdt self.subnodes = [] self.props = {} + def _FindNode(self, name): + """Find a node given its name + + Args: + name: Node name to look for + Returns: + Node object if found, else None + """ + for subnode in self.subnodes: + if subnode.name == name: + return subnode + return None + def Scan(self): - """Scan a node's properties and subnodes + """Scan the subnodes of a node - This fills in the props and subnodes properties, recursively - searching into subnodes so that the entire tree is built. + This should be implemented by subclasses """ - self.props = self._fdt.GetProps(self.path) + raise NotImplementedError() - offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self.offset) - while offset >= 0: - sep = '' if self.path[-1] == '/' else '/' - name = libfdt.Name(self._fdt.GetFdt(), offset) - path = self.path + sep + name - node = Node(self._fdt, offset, name, path) - self.subnodes.append(node) + def DeleteProp(self, prop_name): + """Delete a property of a node - node.Scan() - offset = libfdt.fdt_next_subnode(self._fdt.GetFdt(), offset) + This should be implemented by subclasses + Args: + prop_name: Name of the property to delete + """ + raise NotImplementedError() class Fdt: """Provides simple access to a flat device tree blob. @@ -123,26 +212,20 @@ class Fdt: fname: Filename of fdt _root: Root of device tree (a Node object) """ - def __init__(self, fname): - self.fname = fname - with open(fname) as fd: - self._fdt = fd.read() - - def GetFdt(self): - """Get the contents of the FDT + self._fname = fname - Returns: - The FDT contents as a string of bytes - """ - return self._fdt - - def Scan(self): + def Scan(self, root='/'): """Scan a device tree, building up a tree of Node objects This fills in the self._root property + + Args: + root: Ignored + + TODO(sjg@chromium.org): Implement the 'root' parameter """ - self._root = Node(self, 0, '/', '/') + self._root = self.Node(self, 0, '/', '/') self._root.Scan() def GetRoot(self): @@ -153,28 +236,34 @@ class Fdt: """ return self._root - def GetProps(self, node): - """Get all properties from a node. + def GetNode(self, path): + """Look up a node from its path Args: - node: Full path to node name to look in. - + path: Path to look up, e.g. '/microcode/update@0' Returns: - A dictionary containing all the properties, indexed by node name. - The entries are Prop objects. + Node object, or None if not found + """ + node = self._root + for part in path.split('/')[1:]: + node = node._FindNode(part) + if not node: + return None + return node + + def Flush(self): + """Flush device tree changes back to the file + + If the device tree has changed in memory, write it back to the file. + Subclasses can implement this if needed. + """ + pass + + def Pack(self): + """Pack the device tree down to its minimum size - Raises: - ValueError: if the node does not exist. + When nodes and properties shrink or are deleted, wasted space can + build up in the device tree binary. Subclasses can implement this + to remove that spare space. """ - offset = libfdt.fdt_path_offset(self._fdt, node) - if offset < 0: - libfdt.Raise(offset) - props_dict = {} - poffset = libfdt.fdt_first_property_offset(self._fdt, offset) - while poffset >= 0: - dprop, plen = libfdt.fdt_get_property_by_offset(self._fdt, poffset) - prop = Prop(libfdt.String(self._fdt, dprop.nameoff), libfdt.Data(dprop)) - props_dict[prop.name] = prop - - poffset = libfdt.fdt_next_property_offset(self._fdt, poffset) - return props_dict + pass diff --git a/tools/dtoc/fdt_fallback.py b/tools/dtoc/fdt_fallback.py index 9ed11e4..0c0ebbc 100644 --- a/tools/dtoc/fdt_fallback.py +++ b/tools/dtoc/fdt_fallback.py @@ -7,6 +7,8 @@ # import command +import fdt +from fdt import Fdt, NodeBase, PropBase import fdt_util import sys @@ -17,7 +19,7 @@ import sys # is not very efficient for larger trees. The tool is called once for each # node and property in the tree. -class Prop: +class Prop(PropBase): """A device tree property Properties: @@ -26,58 +28,17 @@ class Prop: bytes type: Value type """ - def __init__(self, name, byte_list_str): - self.name = name - self.value = None + def __init__(self, node, name, byte_list_str): + PropBase.__init__(self, node, 0, name) if not byte_list_str.strip(): - self.type = fdt_util.TYPE_BOOL + self.type = fdt.TYPE_BOOL return - bytes = [chr(int(byte, 16)) for byte in byte_list_str.strip().split(' ')] - self.type, self.value = fdt_util.BytesToValue(''.join(bytes)) + self.bytes = [chr(int(byte, 16)) + for byte in byte_list_str.strip().split(' ')] + self.type, self.value = self.BytesToValue(''.join(self.bytes)) - def GetPhandle(self): - """Get a (single) phandle value from a property - Gets the phandle valuie from a property and returns it as an integer - """ - return fdt_util.fdt32_to_cpu(self.value[:4]) - - def Widen(self, newprop): - """Figure out which property type is more general - - Given a current property and a new property, this function returns the - one that is less specific as to type. The less specific property will - be ble to represent the data in the more specific property. This is - used for things like: - - node1 { - compatible = "fred"; - value = <1>; - }; - node1 { - compatible = "fred"; - value = <1 2>; - }; - - He we want to use an int array for 'value'. The first property - suggests that a single int is enough, but the second one shows that - it is not. Calling this function with these two propertes would - update the current property to be like the second, since it is less - specific. - """ - if newprop.type < self.type: - self.type = newprop.type - - if type(newprop.value) == list and type(self.value) != list: - self.value = newprop.value - - if type(self.value) == list and len(newprop.value) > len(self.value): - val = fdt_util.GetEmpty(self.type) - while len(self.value) < len(newprop.value): - self.value.append(val) - - -class Node: +class Node(NodeBase): """A device tree node Properties: @@ -88,12 +49,8 @@ class Node: props: A dict of properties for this node, each a Prop object. Keyed by property name """ - def __init__(self, fdt, name, path): - self.name = name - self.path = path - self._fdt = fdt - self.subnodes = [] - self.props = {} + def __init__(self, fdt, offset, name, path): + NodeBase.__init__(self, fdt, offset, name, path) def Scan(self): """Scan a node's properties and subnodes @@ -102,44 +59,42 @@ class Node: searching into subnodes so that the entire tree is built. """ for name, byte_list_str in self._fdt.GetProps(self.path).iteritems(): - prop = Prop(name, byte_list_str) + prop = Prop(self, name, byte_list_str) self.props[name] = prop for name in self._fdt.GetSubNodes(self.path): sep = '' if self.path[-1] == '/' else '/' path = self.path + sep + name - node = Node(self._fdt, name, path) + node = Node(self._fdt, 0, name, path) self.subnodes.append(node) node.Scan() + def DeleteProp(self, prop_name): + """Delete a property of a node -class Fdt: - """Provides simple access to a flat device tree blob. + The property is deleted using fdtput. + + Args: + prop_name: Name of the property to delete + Raises: + CommandError if the property does not exist + """ + args = [self._fdt._fname, '-d', self.path, prop_name] + command.Output('fdtput', *args) + del self.props[prop_name] + +class FdtFallback(Fdt): + """Provides simple access to a flat device tree blob using fdtget/fdtput Properties: - fname: Filename of fdt - _root: Root of device tree (a Node object) + See superclass """ def __init__(self, fname): - self.fname = fname - - def Scan(self): - """Scan a device tree, building up a tree of Node objects - - This fills in the self._root property - """ - self._root = Node(self, '/', '/') - self._root.Scan() - - def GetRoot(self): - """Get the root Node of the device tree - - Returns: - The root Node object - """ - return self._root + Fdt.__init__(self, fname) + if self._fname: + self._fname = fdt_util.EnsureCompiled(self._fname) def GetSubNodes(self, node): """Returns a list of sub-nodes of a given node @@ -153,15 +108,14 @@ class Fdt: Raises: CmdError: if the node does not exist. """ - out = command.Output('fdtget', self.fname, '-l', node) + out = command.Output('fdtget', self._fname, '-l', node) return out.strip().splitlines() - def GetProps(self, node, convert_dashes=False): + def GetProps(self, node): """Get all properties from a node Args: node: full path to node name to look in - convert_dashes: True to convert - to _ in node names Returns: A dictionary containing all the properties, indexed by node name. @@ -171,13 +125,11 @@ class Fdt: Raises: CmdError: if the node does not exist. """ - out = command.Output('fdtget', self.fname, node, '-p') + out = command.Output('fdtget', self._fname, node, '-p') props = out.strip().splitlines() props_dict = {} for prop in props: name = prop - if convert_dashes: - prop = re.sub('-', '_', prop) props_dict[prop] = self.GetProp(node, name) return props_dict @@ -204,10 +156,26 @@ class Fdt: Raises: CmdError: if the property does not exist and no default is provided. """ - args = [self.fname, node, prop, '-t', 'bx'] + args = [self._fname, node, prop, '-t', 'bx'] if default is not None: args += ['-d', str(default)] if typespec is not None: args += ['-t%s' % typespec] out = command.Output('fdtget', *args) return out.strip() + + @classmethod + def Node(self, fdt, offset, name, path): + """Create a new node + + This is used by Fdt.Scan() to create a new node using the correct + class. + + Args: + fdt: Fdt object + offset: Offset of node + name: Node name + path: Full path to node + """ + node = Node(fdt, offset, name, path) + return node diff --git a/tools/dtoc/fdt_normal.py b/tools/dtoc/fdt_normal.py new file mode 100644 index 0000000..aae258e --- /dev/null +++ b/tools/dtoc/fdt_normal.py @@ -0,0 +1,228 @@ +#!/usr/bin/python +# +# Copyright (C) 2016 Google, Inc +# Written by Simon Glass <sjg@chromium.org> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +import struct +import sys + +import fdt +from fdt import Fdt, NodeBase, PropBase +import fdt_util +import libfdt + +# This deals with a device tree, presenting it as a list of Node and Prop +# objects, representing nodes and properties, respectively. +# +# This implementation uses a libfdt Python library to access the device tree, +# so it is fairly efficient. + +def CheckErr(errnum, msg): + if errnum: + raise ValueError('Error %d: %s: %s' % + (errnum, libfdt.fdt_strerror(errnum), msg)) + +class Prop(PropBase): + """A device tree property + + Properties: + name: Property name (as per the device tree) + value: Property value as a string of bytes, or a list of strings of + bytes + type: Value type + """ + def __init__(self, node, offset, name, bytes): + PropBase.__init__(self, node, offset, name) + self.bytes = bytes + if not bytes: + self.type = fdt.TYPE_BOOL + self.value = True + return + self.type, self.value = self.BytesToValue(bytes) + + def GetOffset(self): + """Get the offset of a property + + Returns: + The offset of the property (struct fdt_property) within the file + """ + return self._node._fdt.GetStructOffset(self._offset) + +class Node(NodeBase): + """A device tree node + + Properties: + offset: Integer offset in the device tree + name: Device tree node tname + path: Full path to node, along with the node name itself + _fdt: Device tree object + subnodes: A list of subnodes for this node, each a Node object + props: A dict of properties for this node, each a Prop object. + Keyed by property name + """ + def __init__(self, fdt, offset, name, path): + NodeBase.__init__(self, fdt, offset, name, path) + + def Offset(self): + """Returns the offset of a node, after checking the cache + + This should be used instead of self._offset directly, to ensure that + the cache does not contain invalid offsets. + """ + self._fdt.CheckCache() + return self._offset + + def Scan(self): + """Scan a node's properties and subnodes + + This fills in the props and subnodes properties, recursively + searching into subnodes so that the entire tree is built. + """ + self.props = self._fdt.GetProps(self, self.path) + + offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self.Offset()) + while offset >= 0: + sep = '' if self.path[-1] == '/' else '/' + name = libfdt.Name(self._fdt.GetFdt(), offset) + path = self.path + sep + name + node = Node(self._fdt, offset, name, path) + self.subnodes.append(node) + + node.Scan() + offset = libfdt.fdt_next_subnode(self._fdt.GetFdt(), offset) + + def Refresh(self, my_offset): + """Fix up the _offset for each node, recursively + + Note: This does not take account of property offsets - these will not + be updated. + """ + if self._offset != my_offset: + #print '%s: %d -> %d\n' % (self.path, self._offset, my_offset) + self._offset = my_offset + offset = libfdt.fdt_first_subnode(self._fdt.GetFdt(), self._offset) + for subnode in self.subnodes: + subnode.Refresh(offset) + offset = libfdt.fdt_next_subnode(self._fdt.GetFdt(), offset) + + def DeleteProp(self, prop_name): + """Delete a property of a node + + The property is deleted and the offset cache is invalidated. + + Args: + prop_name: Name of the property to delete + Raises: + ValueError if the property does not exist + """ + CheckErr(libfdt.fdt_delprop(self._fdt.GetFdt(), self.Offset(), prop_name), + "Node '%s': delete property: '%s'" % (self.path, prop_name)) + del self.props[prop_name] + self._fdt.Invalidate() + +class FdtNormal(Fdt): + """Provides simple access to a flat device tree blob using libfdt. + + Properties: + _fdt: Device tree contents (bytearray) + _cached_offsets: True if all the nodes have a valid _offset property, + False if something has changed to invalidate the offsets + """ + def __init__(self, fname): + Fdt.__init__(self, fname) + self._cached_offsets = False + if self._fname: + self._fname = fdt_util.EnsureCompiled(self._fname) + + with open(self._fname) as fd: + self._fdt = bytearray(fd.read()) + + def GetFdt(self): + """Get the contents of the FDT + + Returns: + The FDT contents as a string of bytes + """ + return self._fdt + + def Flush(self): + """Flush device tree changes back to the file""" + with open(self._fname, 'wb') as fd: + fd.write(self._fdt) + + def Pack(self): + """Pack the device tree down to its minimum size""" + CheckErr(libfdt.fdt_pack(self._fdt), 'pack') + fdt_len = libfdt.fdt_totalsize(self._fdt) + del self._fdt[fdt_len:] + + def GetProps(self, node, path): + """Get all properties from a node. + + Args: + node: Full path to node name to look in. + + Returns: + A dictionary containing all the properties, indexed by node name. + The entries are Prop objects. + + Raises: + ValueError: if the node does not exist. + """ + offset = libfdt.fdt_path_offset(self._fdt, path) + if offset < 0: + libfdt.Raise(offset) + props_dict = {} + poffset = libfdt.fdt_first_property_offset(self._fdt, offset) + while poffset >= 0: + dprop, plen = libfdt.fdt_get_property_by_offset(self._fdt, poffset) + prop = Prop(node, poffset, libfdt.String(self._fdt, dprop.nameoff), + libfdt.Data(dprop)) + props_dict[prop.name] = prop + + poffset = libfdt.fdt_next_property_offset(self._fdt, poffset) + return props_dict + + def Invalidate(self): + """Mark our offset cache as invalid""" + self._cached_offsets = False + + def CheckCache(self): + """Refresh the offset cache if needed""" + if self._cached_offsets: + return + self.Refresh() + self._cached_offsets = True + + def Refresh(self): + """Refresh the offset cache""" + self._root.Refresh(0) + + def GetStructOffset(self, offset): + """Get the file offset of a given struct offset + + Args: + offset: Offset within the 'struct' region of the device tree + Returns: + Position of @offset within the device tree binary + """ + return libfdt.fdt_off_dt_struct(self._fdt) + offset + + @classmethod + def Node(self, fdt, offset, name, path): + """Create a new node + + This is used by Fdt.Scan() to create a new node using the correct + class. + + Args: + fdt: Fdt object + offset: Offset of node + name: Node name + path: Full path to node + """ + node = Node(fdt, offset, name, path) + return node diff --git a/tools/dtoc/fdt_select.py b/tools/dtoc/fdt_select.py new file mode 100644 index 0000000..18a36d8 --- /dev/null +++ b/tools/dtoc/fdt_select.py @@ -0,0 +1,26 @@ +#!/usr/bin/python +# +# Copyright (C) 2016 Google, Inc +# Written by Simon Glass <sjg@chromium.org> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +# Bring in either the normal fdt library (which relies on libfdt) or the +# fallback one (which uses fdtget and is slower). Both provide the same +# interface for this file to use. +try: + import fdt_normal + have_libfdt = True +except ImportError: + have_libfdt = False + import fdt_fallback + +def FdtScan(fname): + """Returns a new Fdt object from the implementation we are using""" + if have_libfdt: + dtb = fdt_normal.FdtNormal(fname) + else: + dtb = fdt_fallback.FdtFallback(fname) + dtb.Scan() + return dtb diff --git a/tools/dtoc/fdt_util.py b/tools/dtoc/fdt_util.py index 929b524..3a10838 100644 --- a/tools/dtoc/fdt_util.py +++ b/tools/dtoc/fdt_util.py @@ -6,81 +6,81 @@ # SPDX-License-Identifier: GPL-2.0+ # +import os import struct +import tempfile -# A list of types we support -(TYPE_BYTE, TYPE_INT, TYPE_STRING, TYPE_BOOL) = range(4) +import command +import tools -def BytesToValue(bytes): - """Converts a string of bytes into a type and value +def fdt32_to_cpu(val): + """Convert a device tree cell to an integer Args: - A string containing bytes + Value to convert (4-character string representing the cell value) Return: - A tuple: - Type of data - Data, either a single element or a list of elements. Each element - is one of: - TYPE_STRING: string value from the property - TYPE_INT: a byte-swapped integer stored as a 4-byte string - TYPE_BYTE: a byte stored as a single-byte string + A native-endian integer value """ - size = len(bytes) - strings = bytes.split('\0') - is_string = True - count = len(strings) - 1 - if count > 0 and not strings[-1]: - for string in strings[:-1]: - if not string: - is_string = False - break - for ch in string: - if ch < ' ' or ch > '~': - is_string = False - break - else: - is_string = False - if is_string: - if count == 1: - return TYPE_STRING, strings[0] - else: - return TYPE_STRING, strings[:-1] - if size % 4: - if size == 1: - return TYPE_BYTE, bytes[0] - else: - return TYPE_BYTE, list(bytes) - val = [] - for i in range(0, size, 4): - val.append(bytes[i:i + 4]) - if size == 4: - return TYPE_INT, val[0] - else: - return TYPE_INT, val + return struct.unpack('>I', val)[0] -def GetEmpty(type): - """Get an empty / zero value of the given type +def EnsureCompiled(fname): + """Compile an fdt .dts source file into a .dtb binary blob if needed. + + Args: + fname: Filename (if .dts it will be compiled). It not it will be + left alone Returns: - A single value of the given type + Filename of resulting .dtb file """ - if type == TYPE_BYTE: - return chr(0) - elif type == TYPE_INT: - return struct.pack('<I', 0); - elif type == TYPE_STRING: - return '' - else: - return True + _, ext = os.path.splitext(fname) + if ext != '.dts': + return fname -def fdt32_to_cpu(val): - """Convert a device tree cell to an integer + dts_input = tools.GetOutputFilename('source.dts') + dtb_output = tools.GetOutputFilename('source.dtb') - Args: - Value to convert (4-character string representing the cell value) + search_paths = [os.path.join(os.getcwd(), 'include')] + root, _ = os.path.splitext(fname) + args = ['-E', '-P', '-x', 'assembler-with-cpp', '-D__ASSEMBLY__'] + args += ['-Ulinux'] + for path in search_paths: + args.extend(['-I', path]) + args += ['-o', dts_input, fname] + command.Run('cc', *args) - Return: - A native-endian integer value - """ - return struct.unpack(">I", val)[0] + # If we don't have a directory, put it in the tools tempdir + search_list = [] + for path in search_paths: + search_list.extend(['-i', path]) + args = ['-I', 'dts', '-o', dtb_output, '-O', 'dtb'] + args.extend(search_list) + args.append(dts_input) + command.Run('dtc', *args) + return dtb_output + +def GetInt(node, propname, default=None): + prop = node.props.get(propname) + if not prop: + return default + value = fdt32_to_cpu(prop.value) + if type(value) == type(list): + raise ValueError("Node '%s' property '%' has list value: expecting" + "a single integer" % (node.name, propname)) + return value + +def GetString(node, propname, default=None): + prop = node.props.get(propname) + if not prop: + return default + value = prop.value + if type(value) == type(list): + raise ValueError("Node '%s' property '%' has list value: expecting" + "a single string" % (node.name, propname)) + return value + +def GetBool(node, propname, default=False): + if propname in node.props: + return True + return default diff --git a/tools/patman/checkpatch.py b/tools/patman/checkpatch.py index 34a3bd2..3eef6de 100644 --- a/tools/patman/checkpatch.py +++ b/tools/patman/checkpatch.py @@ -63,7 +63,8 @@ def CheckPatch(fname, verbose=False): result.problems = [] chk = FindCheckPatch() item = {} - result.stdout = command.Output(chk, '--no-tree', fname) + result.stdout = command.Output(chk, '--no-tree', fname, + raise_on_error=False) #pipe = subprocess.Popen(cmd, stdout=subprocess.PIPE) #stdout, stderr = pipe.communicate() diff --git a/tools/patman/command.py b/tools/patman/command.py index d586f11..d1f0ca5 100644 --- a/tools/patman/command.py +++ b/tools/patman/command.py @@ -104,8 +104,9 @@ def RunPipe(pipe_list, infile=None, outfile=None, raise Exception("Error running '%s'" % user_pipestr) return result -def Output(*cmd): - return RunPipe([cmd], capture=True, raise_on_error=False).stdout +def Output(*cmd, **kwargs): + raise_on_error = kwargs.get('raise_on_error', True) + return RunPipe([cmd], capture=True, raise_on_error=raise_on_error).stdout def OutputOneLine(*cmd, **kwargs): raise_on_error = kwargs.pop('raise_on_error', True) diff --git a/tools/patman/gitutil.py b/tools/patman/gitutil.py index e088bae..bb7c9e0 100644 --- a/tools/patman/gitutil.py +++ b/tools/patman/gitutil.py @@ -391,7 +391,8 @@ def EmailPatches(series, cover_fname, args, dry_run, raise_on_error, cc_fname, """ to = BuildEmailList(series.get('to'), '--to', alias, raise_on_error) if not to: - git_config_to = command.Output('git', 'config', 'sendemail.to') + git_config_to = command.Output('git', 'config', 'sendemail.to', + raise_on_error=False) if not git_config_to: print ("No recipient.\n" "Please add something like this to a commit\n" diff --git a/tools/patman/tools.py b/tools/patman/tools.py new file mode 100644 index 0000000..ba24853 --- /dev/null +++ b/tools/patman/tools.py @@ -0,0 +1,120 @@ +# +# Copyright (c) 2016 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# + +import os +import shutil +import tempfile + +import tout + +outdir = None +indirs = None +preserve_outdir = False + +def PrepareOutputDir(dirname, preserve=False): + """Select an output directory, ensuring it exists. + + This either creates a temporary directory or checks that the one supplied + by the user is valid. For a temporary directory, it makes a note to + remove it later if required. + + Args: + dirname: a string, name of the output directory to use to store + intermediate and output files. If is None - create a temporary + directory. + preserve: a Boolean. If outdir above is None and preserve is False, the + created temporary directory will be destroyed on exit. + + Raises: + OSError: If it cannot create the output directory. + """ + global outdir, preserve_outdir + + preserve_outdir = dirname or preserve + if dirname: + outdir = dirname + if not os.path.isdir(outdir): + try: + os.makedirs(outdir) + except OSError as err: + raise CmdError("Cannot make output directory '%s': '%s'" % + (outdir, err.strerror)) + tout.Debug("Using output directory '%s'" % outdir) + else: + outdir = tempfile.mkdtemp(prefix='binman.') + tout.Debug("Using temporary directory '%s'" % outdir) + +def _RemoveOutputDir(): + global outdir + + shutil.rmtree(outdir) + tout.Debug("Deleted temporary directory '%s'" % outdir) + outdir = None + +def FinaliseOutputDir(): + global outdir, preserve_outdir + + """Tidy up: delete output directory if temporary and not preserved.""" + if outdir and not preserve_outdir: + _RemoveOutputDir() + +def GetOutputFilename(fname): + """Return a filename within the output directory. + + Args: + fname: Filename to use for new file + + Returns: + The full path of the filename, within the output directory + """ + return os.path.join(outdir, fname) + +def _FinaliseForTest(): + """Remove the output directory (for use by tests)""" + global outdir + + if outdir: + _RemoveOutputDir() + +def SetInputDirs(dirname): + """Add a list of input directories, where input files are kept. + + Args: + dirname: a list of paths to input directories to use for obtaining + files needed by binman to place in the image. + """ + global indir + + indir = dirname + tout.Debug("Using input directories %s" % indir) + +def GetInputFilename(fname): + """Return a filename for use as input. + + Args: + fname: Filename to use for new file + + Returns: + The full path of the filename, within the input directory + """ + if not indir: + return fname + for dirname in indir: + pathname = os.path.join(dirname, fname) + if os.path.exists(pathname): + return pathname + + raise ValueError("Filename '%s' not found in input path (%s)" % + (fname, ','.join(indir))) + +def Align(pos, align): + if align: + mask = align - 1 + pos = (pos + mask) & ~mask + return pos + +def NotPowerOfTwo(num): + return num and (num & (num - 1)) diff --git a/tools/patman/tout.py b/tools/patman/tout.py new file mode 100644 index 0000000..c5fbd80 --- /dev/null +++ b/tools/patman/tout.py @@ -0,0 +1,166 @@ +# Copyright (c) 2016 Google, Inc +# +# SPDX-License-Identifier: GPL-2.0+ +# +# Terminal output logging. +# + +import sys + +import terminal + +# Output verbosity levels that we support +ERROR = 0 +WARNING = 1 +NOTICE = 2 +INFO = 3 +DEBUG = 4 + +""" +This class handles output of progress and other useful information +to the user. It provides for simple verbosity level control and can +output nothing but errors at verbosity zero. + +The idea is that modules set up an Output object early in their years and pass +it around to other modules that need it. This keeps the output under control +of a single class. + +Public properties: + verbose: Verbosity level: 0=silent, 1=progress, 3=full, 4=debug +""" +def __enter__(): + return + +def __exit__(unused1, unused2, unused3): + """Clean up and remove any progress message.""" + ClearProgress() + return False + +def UserIsPresent(): + """This returns True if it is likely that a user is present. + + Sometimes we want to prompt the user, but if no one is there then this + is a waste of time, and may lock a script which should otherwise fail. + + Returns: + True if it thinks the user is there, and False otherwise + """ + return stdout_is_tty and verbose > 0 + +def ClearProgress(): + """Clear any active progress message on the terminal.""" + if verbose > 0 and stdout_is_tty: + _stdout.write('\r%s\r' % (" " * len (_progress))) + _stdout.flush() + +def Progress(msg, warning=False, trailer='...'): + """Display progress information. + + Args: + msg: Message to display. + warning: True if this is a warning.""" + ClearProgress() + if verbose > 0: + _progress = msg + trailer + if stdout_is_tty: + col = _color.YELLOW if warning else _color.GREEN + _stdout.write('\r' + _color.Color(col, _progress)) + _stdout.flush() + else: + _stdout.write(_progress + '\n') + +def _Output(level, msg, color=None): + """Output a message to the terminal. + + Args: + level: Verbosity level for this message. It will only be displayed if + this as high as the currently selected level. + msg; Message to display. + error: True if this is an error message, else False. + """ + if verbose >= level: + ClearProgress() + if color: + msg = _color.Color(color, msg) + _stdout.write(msg + '\n') + +def DoOutput(level, msg): + """Output a message to the terminal. + + Args: + level: Verbosity level for this message. It will only be displayed if + this as high as the currently selected level. + msg; Message to display. + """ + _Output(level, msg) + +def Error(msg): + """Display an error message + + Args: + msg; Message to display. + """ + _Output(0, msg, _color.RED) + +def Warning(msg): + """Display a warning message + + Args: + msg; Message to display. + """ + _Output(1, msg, _color.YELLOW) + +def Notice(msg): + """Display an important infomation message + + Args: + msg; Message to display. + """ + _Output(2, msg) + +def Info(msg): + """Display an infomation message + + Args: + msg; Message to display. + """ + _Output(3, msg) + +def Debug(msg): + """Display a debug message + + Args: + msg; Message to display. + """ + _Output(4, msg) + +def UserOutput(msg): + """Display a message regardless of the current output level. + + This is used when the output was specifically requested by the user. + Args: + msg; Message to display. + """ + _Output(0, msg) + +def Init(_verbose=WARNING, stdout=sys.stdout): + """Initialize a new output object. + + Args: + verbose: Verbosity level (0-4). + stdout: File to use for stdout. + """ + global verbose, _progress, _color, _stdout, stdout_is_tty + + verbose = _verbose + _progress = '' # Our last progress message + _color = terminal.Color() + _stdout = stdout + + # TODO(sjg): Move this into Chromite libraries when we have them + stdout_is_tty = hasattr(sys.stdout, 'isatty') and sys.stdout.isatty() + +def Uninit(): + ClearProgress() + +Init() |