diff options
113 files changed, 1560 insertions, 504 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ae75c76..50bcc0b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -57,6 +57,8 @@ dtb-$(CONFIG_ARCH_MVEBU) += \ armada-xp-theadorable.dtb dtb-$(CONFIG_ARCH_UNIPHIER) += \ + uniphier-ph1-ld11-ref.dtb \ + uniphier-ph1-ld20-ref.dtb \ uniphier-ph1-ld4-ref.dtb \ uniphier-ph1-ld6b-ref.dtb \ uniphier-ph1-pro4-ace.dtb \ diff --git a/arch/arm/dts/uniphier-ph1-ld11-ref.dts b/arch/arm/dts/uniphier-ph1-ld11-ref.dts new file mode 100644 index 0000000..a624a49 --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld11-ref.dts @@ -0,0 +1,69 @@ +/* + * Device Tree Source for UniPhier PH1-LD11 Reference Board + * + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +/include/ "uniphier-ph1-ld11.dtsi" +/include/ "uniphier-support-card.dtsi" + +/ { + model = "UniPhier PH1-LD11 Reference Board"; + compatible = "socionext,ph1-ld11-ref", "socionext,ph1-ld11"; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0x40000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + }; +}; + +ðsc { + interrupts = <0 48 4>; +}; + +&serial0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-Boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/uniphier-ph1-ld11.dtsi b/arch/arm/dts/uniphier-ph1-ld11.dtsi new file mode 100644 index 0000000..069cdf2 --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld11.dtsi @@ -0,0 +1,205 @@ +/* + * Device Tree Source for UniPhier PH1-LD11 SoC + * + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/ { + compatible = "socionext,ph1-ld11"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x000>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x001>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + }; + + clocks { + uart_clk: uart_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <58820000>; + }; + + i2c_clk: i2c_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xf01>, + <1 14 0xf01>, + <1 11 0xf01>, + <1 10 0xf01>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + serial0: serial@54006800 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x40>; + interrupts = <0 33 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + clocks = <&uart_clk>; + }; + + serial1: serial@54006900 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x40>; + interrupts = <0 35 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + clocks = <&uart_clk>; + }; + + serial2: serial@54006a00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x40>; + interrupts = <0 37 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + clocks = <&uart_clk>; + }; + + serial3: serial@54006b00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006b00 0x40>; + interrupts = <0 177 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + clocks = <&uart_clk>; + }; + + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58780000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c1: i2c@58781000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58781000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 42 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c2: i2c@58782000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58782000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 43 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + i2c3: i2c@58783000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58783000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 44 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c4: i2c@58784000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58784000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 45 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c5: i2c@58785000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58785000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 25 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + system_bus: system-bus@58c00000 { + compatible = "socionext,uniphier-system-bus"; + status = "disabled"; + reg = <0x58c00000 0x400>; + #address-cells = <2>; + #size-cells = <1>; + }; + + smpctrl@59800000 { + compatible = "socionext,uniphier-smpctrl"; + reg = <0x59801000 0x400>; + }; + + pinctrl: pinctrl@5f801000 { + compatible = "socionext,ph1-ld11-pinctrl", "syscon"; + reg = <0x5f801000 0xe00>; + }; + + gic: interrupt-controller@5fe00000 { + compatible = "arm,gic-v3"; + reg = <0x5fe00000 0x10000>, /* GICD */ + <0x5fe40000 0x80000>; /* GICR */ + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <1 9 4>; + }; + }; +}; + +/include/ "uniphier-pinctrl.dtsi" diff --git a/arch/arm/dts/uniphier-ph1-ld20-ref.dts b/arch/arm/dts/uniphier-ph1-ld20-ref.dts new file mode 100644 index 0000000..108adeb --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld20-ref.dts @@ -0,0 +1,69 @@ +/* + * Device Tree Source for UniPhier PH1-LD20 Reference Board + * + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/dts-v1/; +/include/ "uniphier-ph1-ld20.dtsi" +/include/ "uniphier-support-card.dtsi" + +/ { + model = "UniPhier PH1-LD20 Reference Board"; + compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20"; + + memory { + device_type = "memory"; + reg = <0 0x80000000 0 0xc0000000>; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &serial0; + serial1 = &serial1; + serial2 = &serial2; + serial3 = &serial3; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + }; +}; + +ðsc { + interrupts = <0 48 4>; +}; + +&serial0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +/* for U-Boot only */ +/ { + soc { + u-boot,dm-pre-reloc; + }; +}; + +&serial0 { + u-boot,dm-pre-reloc; +}; + +&pinctrl { + u-boot,dm-pre-reloc; +}; + +&pinctrl_uart0 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/uniphier-ph1-ld20.dtsi b/arch/arm/dts/uniphier-ph1-ld20.dtsi new file mode 100644 index 0000000..1bb45be --- /dev/null +++ b/arch/arm/dts/uniphier-ph1-ld20.dtsi @@ -0,0 +1,241 @@ +/* + * Device Tree Source for UniPhier PH1-LD20 SoC + * + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +/ { + compatible = "socionext,ph1-ld20"; + #address-cells = <2>; + #size-cells = <2>; + interrupt-parent = <&gic>; + + cpus { + #address-cells = <2>; + #size-cells = <0>; + + cpu-map { + cluster0 { + core0 { + cpu = <&cpu0>; + }; + core1 { + cpu = <&cpu1>; + }; + }; + + cluster1 { + core0 { + cpu = <&cpu2>; + }; + core1 { + cpu = <&cpu3>; + }; + }; + }; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0 0x000>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a72", "arm,armv8"; + reg = <0 0x001>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu2: cpu@100 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x100>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + + cpu3: cpu@101 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0 0x101>; + enable-method = "spin-table"; + cpu-release-addr = <0 0x80000100>; + }; + }; + + clocks { + uart_clk: uart_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <58820000>; + }; + + i2c_clk: i2c_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <50000000>; + }; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <1 13 0xf01>, + <1 14 0xf01>, + <1 11 0xf01>, + <1 10 0xf01>; + }; + + soc { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0 0 0xffffffff>; + + serial0: serial@54006800 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006800 0x40>; + interrupts = <0 33 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + clocks = <&uart_clk>; + }; + + serial1: serial@54006900 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006900 0x40>; + interrupts = <0 35 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + clocks = <&uart_clk>; + }; + + serial2: serial@54006a00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006a00 0x40>; + interrupts = <0 37 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + clocks = <&uart_clk>; + }; + + serial3: serial@54006b00 { + compatible = "socionext,uniphier-uart"; + status = "disabled"; + reg = <0x54006b00 0x40>; + interrupts = <0 177 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + clocks = <&uart_clk>; + }; + + i2c0: i2c@58780000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58780000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 41 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c1: i2c@58781000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58781000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 42 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c2: i2c@58782000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58782000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 43 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + i2c3: i2c@58783000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58783000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 44 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c4: i2c@58784000 { + compatible = "socionext,uniphier-fi2c"; + status = "disabled"; + reg = <0x58784000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 45 4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clocks = <&i2c_clk>; + clock-frequency = <100000>; + }; + + i2c5: i2c@58785000 { + compatible = "socionext,uniphier-fi2c"; + reg = <0x58785000 0x80>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <0 25 4>; + clocks = <&i2c_clk>; + clock-frequency = <400000>; + }; + + system_bus: system-bus@58c00000 { + compatible = "socionext,uniphier-system-bus"; + status = "disabled"; + reg = <0x58c00000 0x400>; + #address-cells = <2>; + #size-cells = <1>; + }; + + smpctrl@59800000 { + compatible = "socionext,uniphier-smpctrl"; + reg = <0x59801000 0x400>; + }; + + pinctrl: pinctrl@5f801000 { + compatible = "socionext,ph1-ld20-pinctrl", "syscon"; + reg = <0x5f801000 0xe00>; + }; + + gic: interrupt-controller@5fe00000 { + compatible = "arm,gic-v3"; + reg = <0x5fe00000 0x10000>, /* GICD */ + <0x5fe80000 0x80000>; /* GICR */ + interrupt-controller; + #interrupt-cells = <3>; + interrupts = <1 9 4>; + }; + }; +}; + +/include/ "uniphier-pinctrl.dtsi" diff --git a/arch/arm/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/dts/uniphier-ph1-ld4-ref.dts index d7b0007..6cae452 100644 --- a/arch/arm/dts/uniphier-ph1-ld4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld4-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-ld4.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-LD4 Reference Board"; @@ -35,6 +36,10 @@ }; }; +ðsc { + interrupts = <0 49 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts index 13a29fd..e2a2a8c 100644 --- a/arch/arm/dts/uniphier-ph1-ld6b-ref.dts +++ b/arch/arm/dts/uniphier-ph1-ld6b-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-ld6b.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-LD6b Reference Board"; @@ -37,6 +38,10 @@ }; }; +ðsc { + interrupts = <0 52 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/dts/uniphier-ph1-pro4-ref.dts index 07a9783..5be76e2 100644 --- a/arch/arm/dts/uniphier-ph1-pro4-ref.dts +++ b/arch/arm/dts/uniphier-ph1-pro4-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-pro4.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-Pro4 Reference Board"; @@ -38,6 +39,10 @@ }; }; +ðsc { + interrupts = <0 50 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/dts/uniphier-ph1-sld3-ref.dts index c7213c9..c4601cf 100644 --- a/arch/arm/dts/uniphier-ph1-sld3-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld3-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-sld3.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-sLD3 Reference Board"; @@ -36,6 +37,10 @@ }; }; +ðsc { + interrupts = <0 49 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/dts/uniphier-ph1-sld8-ref.dts index ec5c5bd..8ceb93e 100644 --- a/arch/arm/dts/uniphier-ph1-sld8-ref.dts +++ b/arch/arm/dts/uniphier-ph1-sld8-ref.dts @@ -9,6 +9,7 @@ /dts-v1/; /include/ "uniphier-ph1-sld8.dtsi" /include/ "uniphier-ref-daughter.dtsi" +/include/ "uniphier-support-card.dtsi" / { model = "UniPhier PH1-sLD8 Reference Board"; @@ -35,6 +36,10 @@ }; }; +ðsc { + interrupts = <0 48 4>; +}; + &serial0 { status = "okay"; }; diff --git a/arch/arm/dts/uniphier-pinctrl.dtsi b/arch/arm/dts/uniphier-pinctrl.dtsi index 494139a..988e60a 100644 --- a/arch/arm/dts/uniphier-pinctrl.dtsi +++ b/arch/arm/dts/uniphier-pinctrl.dtsi @@ -37,6 +37,11 @@ function = "i2c3"; }; + pinctrl_i2c4: i2c4_grp { + groups = "i2c4"; + function = "i2c4"; + }; + pinctrl_sd: sd_grp { groups = "sd"; function = "sd"; diff --git a/arch/arm/dts/uniphier-support-card.dtsi b/arch/arm/dts/uniphier-support-card.dtsi new file mode 100644 index 0000000..be0f1d6 --- /dev/null +++ b/arch/arm/dts/uniphier-support-card.dtsi @@ -0,0 +1,33 @@ +/* + * Device Tree Source for UniPhier Support Card (Expansion Board) + * + * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ X11 + */ + +&system_bus { + status = "okay"; + ranges = <1 0x00000000 0x42000000 0x02000000>; + + support_card: support_card { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 1 0x01f00000 0x00100000>; + + ethsc: ethernet@00000000 { + compatible = "smsc,lan9118", "smsc,lan9115"; + reg = <0x00000000 0x1000>; + phy-mode = "mii"; + reg-io-width = <4>; + }; + + serialsc: uart@000b0000 { + compatible = "ns16550a"; + reg = <0x000b0000 0x20>; + clock-frequency = <12288000>; + reg-shift = <1>; + }; + }; +}; diff --git a/arch/arm/mach-uniphier/Kconfig b/arch/arm/mach-uniphier/Kconfig index 660f83c..4724af5 100644 --- a/arch/arm/mach-uniphier/Kconfig +++ b/arch/arm/mach-uniphier/Kconfig @@ -5,9 +5,9 @@ config SYS_CONFIG_NAME choice prompt "UniPhier SoC select" - default ARCH_UNIPHIER_PH1_PRO4 + default ARCH_UNIPHIER_PRO4 -config ARCH_UNIPHIER_PH1_SLD3 +config ARCH_UNIPHIER_SLD3 bool "UniPhier PH1-sLD3 SoC" select CPU_V7 @@ -15,7 +15,7 @@ config ARCH_UNIPHIER_LD4_SLD8 bool "UniPhier PH1-LD4/PH1-sLD8 SoC" select CPU_V7 -config ARCH_UNIPHIER_PH1_PRO4 +config ARCH_UNIPHIER_PRO4 bool "UniPhier PH1-Pro4 SoC" select CPU_V7 @@ -25,27 +25,27 @@ config ARCH_UNIPHIER_PRO5_PXS2_LD6B endchoice -config ARCH_UNIPHIER_PH1_LD4 +config ARCH_UNIPHIER_LD4 bool "Enable UniPhier PH1-LD4 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y -config ARCH_UNIPHIER_PH1_SLD8 +config ARCH_UNIPHIER_SLD8 bool "Enable UniPhier PH1-sLD8 SoC support" depends on ARCH_UNIPHIER_LD4_SLD8 default y -config ARCH_UNIPHIER_PH1_PRO5 +config ARCH_UNIPHIER_PRO5 bool "Enable UniPhier PH1-Pro5 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y -config ARCH_UNIPHIER_PROXSTREAM2 +config ARCH_UNIPHIER_PXS2 bool "Enable UniPhier ProXstream2 SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y -config ARCH_UNIPHIER_PH1_LD6B +config ARCH_UNIPHIER_LD6B bool "Enable UniPhier PH1-LD6b SoC support" depends on ARCH_UNIPHIER_PRO5_PXS2_LD6B default y @@ -68,15 +68,16 @@ config CMD_PINMON config CMD_DDRPHY_DUMP bool "Enable dump command of DDR PHY parameters" - depends on ARCH_UNIPHIER_PH1_LD4 || ARCH_UNIPHIER_PH1_PRO4 || \ - ARCH_UNIPHIER_PH1_SLD8 + depends on ARCH_UNIPHIER_LD4 || ARCH_UNIPHIER_PRO4 || ARCH_UNIPHIER_SLD8 + default y help The command "ddrphy" shows the resulting parameters of DDR PHY training; it is useful for the evaluation of DDR PHY training. config CMD_DDRMPHY_DUMP bool "Enable dump command of DDR Multi PHY parameters" - depends on ARCH_UNIPHIER_PROXSTREAM2 || ARCH_UNIPHIER_PH1_LD6B + depends on ARCH_UNIPHIER_PXS2 || ARCH_UNIPHIER_LD6B + default y help The command "ddrmphy" shows the resulting parameters of DDR Multi PHY training; it is useful for the evaluation of DDR Multi PHY training. diff --git a/arch/arm/mach-uniphier/Makefile b/arch/arm/mach-uniphier/Makefile index 1a8c649..35edca1 100644 --- a/arch/arm/mach-uniphier/Makefile +++ b/arch/arm/mach-uniphier/Makefile @@ -28,5 +28,6 @@ obj-y += boot-mode/ obj-y += dram/ obj-$(CONFIG_MICRO_SUPPORT_CARD) += micro-support-card.o +obj-$(CONFIG_DEBUG_UART_UNIPHIER) += debug-uart/ obj-$(CONFIG_CPU_V7) += arm32/ diff --git a/arch/arm/mach-uniphier/arm32/debug_ll.S b/arch/arm/mach-uniphier/arm32/debug_ll.S index 8e4943c..5db7427 100644 --- a/arch/arm/mach-uniphier/arm32/debug_ll.S +++ b/arch/arm/mach-uniphier/arm32/debug_ll.S @@ -26,8 +26,8 @@ ENTRY(debug_ll_init) and r1, r1, #SG_REVISION_TYPE_MASK mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) -#define PH1_SLD3_UART_CLK 36864000 +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) +#define UNIPHIER_SLD3_UART_CLK 36864000 cmp r1, #0x25 bne ph1_sld3_end @@ -42,13 +42,13 @@ ENTRY(debug_ll_init) orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_SLD3_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_SLD3_UART_CLK, 16 * BAUDRATE) b init_uart ph1_sld3_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) -#define PH1_LD4_UART_CLK 36864000 +#if defined(CONFIG_ARCH_UNIPHIER_LD4) +#define UNIPHIER_LD4_UART_CLK 36864000 cmp r1, #0x26 bne ph1_ld4_end @@ -59,13 +59,13 @@ ph1_sld3_end: sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0 - ldr r3, =DIV_ROUND(PH1_LD4_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_LD4_UART_CLK, 16 * BAUDRATE) b init_uart ph1_ld4_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) -#define PH1_PRO4_UART_CLK 73728000 +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) +#define UNIPHIER_PRO4_UART_CLK 73728000 cmp r1, #0x28 bne ph1_pro4_end @@ -80,13 +80,13 @@ ph1_ld4_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_PRO4_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_PRO4_UART_CLK, 16 * BAUDRATE) b init_uart ph1_pro4_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) -#define PH1_SLD8_UART_CLK 80000000 +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) +#define UNIPHIER_SLD8_UART_CLK 80000000 cmp r1, #0x29 bne ph1_sld8_end @@ -97,13 +97,13 @@ ph1_pro4_end: sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0 - ldr r3, =DIV_ROUND(PH1_SLD8_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_SLD8_UART_CLK, 16 * BAUDRATE) b init_uart ph1_sld8_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) -#define PH1_PRO5_UART_CLK 73728000 +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) +#define UNIPHIER_PRO5_UART_CLK 73728000 cmp r1, #0x2A bne ph1_pro5_end @@ -121,13 +121,13 @@ ph1_sld8_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_PRO5_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_PRO5_UART_CLK, 16 * BAUDRATE) b init_uart ph1_pro5_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) -#define PROXSTREAM2_UART_CLK 88900000 +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) +#define UNIPHIER_PXS2_UART_CLK 88900000 cmp r1, #0x2E bne proxstream2_end @@ -146,13 +146,13 @@ ph1_pro5_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PROXSTREAM2_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_PXS2_UART_CLK, 16 * BAUDRATE) b init_uart proxstream2_end: #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) -#define PH1_LD6B_UART_CLK 88900000 +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) +#define UNIPHIER_LD6B_UART_CLK 88900000 cmp r1, #0x2F bne ph1_ld6b_end @@ -170,7 +170,7 @@ proxstream2_end: orr r1, r1, #SC_CLKCTRL_CEN_PERI str r1, [r0] - ldr r3, =DIV_ROUND(PH1_LD6B_UART_CLK, 16 * BAUDRATE) + ldr r3, =DIV_ROUND(UNIPHIER_LD6B_UART_CLK, 16 * BAUDRATE) b init_uart ph1_ld6b_end: diff --git a/arch/arm/mach-uniphier/bcu/Makefile b/arch/arm/mach-uniphier/bcu/Makefile index b8b0323..02107b3 100644 --- a/arch/arm/mach-uniphier/bcu/Makefile +++ b/arch/arm/mach-uniphier/bcu/Makefile @@ -2,6 +2,6 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += bcu-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += bcu-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += bcu-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += bcu-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += bcu-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += bcu-ld4.o diff --git a/arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c b/arch/arm/mach-uniphier/bcu/bcu-ld4.c index bbe8a74..bbe8a74 100644 --- a/arch/arm/mach-uniphier/bcu/bcu-ph1-ld4.c +++ b/arch/arm/mach-uniphier/bcu/bcu-ld4.c diff --git a/arch/arm/mach-uniphier/bcu/bcu-ph1-sld3.c b/arch/arm/mach-uniphier/bcu/bcu-sld3.c index b7497e9..b7497e9 100644 --- a/arch/arm/mach-uniphier/bcu/bcu-ph1-sld3.c +++ b/arch/arm/mach-uniphier/bcu/bcu-sld3.c diff --git a/arch/arm/mach-uniphier/board_early_init_f.c b/arch/arm/mach-uniphier/board_early_init_f.c index 824da25..8e568ee 100644 --- a/arch/arm/mach-uniphier/board_early_init_f.c +++ b/arch/arm/mach-uniphier/board_early_init_f.c @@ -13,50 +13,50 @@ int board_early_init_f(void) led_puts("U0"); switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: ph1_sld3_pin_init(); led_puts("U1"); ph1_ld4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) - case SOC_UNIPHIER_PH1_LD4: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + case SOC_UNIPHIER_LD4: ph1_ld4_pin_init(); led_puts("U1"); ph1_ld4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) - case SOC_UNIPHIER_PH1_PRO4: +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + case SOC_UNIPHIER_PRO4: ph1_pro4_pin_init(); led_puts("U1"); ph1_pro4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_SLD8: ph1_sld8_pin_init(); led_puts("U1"); ph1_ld4_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: ph1_pro5_pin_init(); led_puts("U1"); ph1_pro5_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) - case SOC_UNIPHIER_PROXSTREAM2: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + case SOC_UNIPHIER_PXS2: proxstream2_pin_init(); led_puts("U1"); proxstream2_clk_init(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_LD6B: ph1_ld6b_pin_init(); led_puts("U1"); proxstream2_clk_init(); diff --git a/arch/arm/mach-uniphier/boards.c b/arch/arm/mach-uniphier/boards.c index 408aff0..5e98c3f 100644 --- a/arch/arm/mach-uniphier/boards.c +++ b/arch/arm/mach-uniphier/boards.c @@ -12,7 +12,7 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) static const struct uniphier_board_data ph1_sld3_data = { .dram_freq = 1600, .dram_nr_ch = 3, @@ -34,7 +34,7 @@ static const struct uniphier_board_data ph1_sld3_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) +#if defined(CONFIG_ARCH_UNIPHIER_LD4) static const struct uniphier_board_data ph1_ld4_data = { .dram_freq = 1600, .dram_nr_ch = 2, @@ -52,7 +52,7 @@ static const struct uniphier_board_data ph1_ld4_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) /* 1GB RAM board */ static const struct uniphier_board_data ph1_pro4_data = { .dram_freq = 1600, @@ -86,7 +86,7 @@ static const struct uniphier_board_data ph1_pro4_2g_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) static const struct uniphier_board_data ph1_sld8_data = { .dram_freq = 1333, .dram_nr_ch = 2, @@ -104,7 +104,7 @@ static const struct uniphier_board_data ph1_sld8_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) static const struct uniphier_board_data ph1_pro5_data = { .dram_freq = 1866, .dram_nr_ch = 2, @@ -121,7 +121,7 @@ static const struct uniphier_board_data ph1_pro5_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) static const struct uniphier_board_data proxstream2_data = { .dram_freq = 2133, .dram_nr_ch = 3, @@ -143,7 +143,7 @@ static const struct uniphier_board_data proxstream2_data = { }; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) static const struct uniphier_board_data ph1_ld6b_data = { .dram_freq = 1866, .dram_nr_ch = 3, @@ -171,27 +171,27 @@ struct uniphier_board_id { }; static const struct uniphier_board_id uniphier_boards[] = { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) { "socionext,ph1-sld3", &ph1_sld3_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) +#if defined(CONFIG_ARCH_UNIPHIER_LD4) { "socionext,ph1-ld4", &ph1_ld4_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) { "socionext,ph1-pro4-ace", &ph1_pro4_2g_data, }, { "socionext,ph1-pro4-sanji", &ph1_pro4_2g_data, }, { "socionext,ph1-pro4", &ph1_pro4_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) { "socionext,ph1-sld8", &ph1_sld8_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) { "socionext,ph1-pro5", &ph1_pro5_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) { "socionext,proxstream2", &proxstream2_data, }, #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) { "socionext,ph1-ld6b", &ph1_ld6b_data, }, #endif }; diff --git a/arch/arm/mach-uniphier/boot-mode/Makefile b/arch/arm/mach-uniphier/boot-mode/Makefile index be0de8f..278df64 100644 --- a/arch/arm/mach-uniphier/boot-mode/Makefile +++ b/arch/arm/mach-uniphier/boot-mode/Makefile @@ -4,12 +4,12 @@ obj-y += boot-mode.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += boot-mode-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += boot-mode-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += boot-mode-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += boot-mode-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += boot-mode-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += boot-mode-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += boot-mode-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += boot-mode-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += boot-mode-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += boot-mode-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += boot-mode-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += boot-mode-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += boot-mode-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += boot-mode-pxs2.o obj-$(CONFIG_CMD_PINMON) += cmd_pinmon.o diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c index 8334373..ef52d69 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-ld4.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-ld4.c @@ -43,7 +43,7 @@ struct boot_device_info boot_device_table[] = { {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, - {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NOR, "NOR Boot"}, }; static int get_boot_mode_sel(void) diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c index 0ec6a08..0ec6a08 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-pro5.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pro5.c diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c index 1b0c183..1b0c183 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-proxstream2.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-pxs2.c diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c index b0f3f9a..0258fae 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode-ph1-sld3.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode-sld3.c @@ -12,7 +12,7 @@ #include "boot-device.h" static struct boot_device_info boot_device_table[] = { - {BOOT_DEVICE_NONE, "Reserved"}, + {BOOT_DEVICE_NOR, "NOR boot"}, {BOOT_DEVICE_NONE, "External Master"}, {BOOT_DEVICE_NONE, "Reserved"}, {BOOT_DEVICE_NONE, "Reserved"}, diff --git a/arch/arm/mach-uniphier/boot-mode/boot-mode.c b/arch/arm/mach-uniphier/boot-mode/boot-mode.c index cf39bf5..317a4f1 100644 --- a/arch/arm/mach-uniphier/boot-mode/boot-mode.c +++ b/arch/arm/mach-uniphier/boot-mode/boot-mode.c @@ -19,26 +19,24 @@ u32 spl_boot_device_raw(void) return BOOT_DEVICE_NOR; switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: return ph1_sld3_boot_device(); #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_LD4: - case SOC_UNIPHIER_PH1_PRO4: - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ + defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_LD4: + case SOC_UNIPHIER_PRO4: + case SOC_UNIPHIER_SLD8: return ph1_ld4_boot_device(); #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: return ph1_pro5_boot_device(); #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PROXSTREAM2: - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_PXS2: + case SOC_UNIPHIER_LD6B: return proxstream2_boot_device(); #endif default: diff --git a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c index 3ff756b..3a66e2b 100644 --- a/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c +++ b/arch/arm/mach-uniphier/boot-mode/cmd_pinmon.c @@ -15,29 +15,27 @@ static int do_pinmon(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf("Boot Swap: %s\n\n", boot_is_swapped() ? "ON" : "OFF"); switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: ph1_sld3_boot_mode_show(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_LD4: - case SOC_UNIPHIER_PH1_PRO4: - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) || defined(CONFIG_ARCH_UNIPHIER_PRO4) || \ + defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_LD4: + case SOC_UNIPHIER_PRO4: + case SOC_UNIPHIER_SLD8: ph1_ld4_boot_mode_show(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: ph1_pro5_boot_mode_show(); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PROXSTREAM2: - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_PXS2: + case SOC_UNIPHIER_LD6B: proxstream2_boot_mode_show(); break; #endif diff --git a/arch/arm/mach-uniphier/clk/Makefile b/arch/arm/mach-uniphier/clk/Makefile index bc0f27c..1d736a5 100644 --- a/arch/arm/mach-uniphier/clk/Makefile +++ b/arch/arm/mach-uniphier/clk/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += clk-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += clk-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += clk-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += clk-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += clk-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += clk-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += clk-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += clk-pxs2.o diff --git a/arch/arm/mach-uniphier/clk/clk-ph1-ld4.c b/arch/arm/mach-uniphier/clk/clk-ld4.c index 7a34bee..7a34bee 100644 --- a/arch/arm/mach-uniphier/clk/clk-ph1-ld4.c +++ b/arch/arm/mach-uniphier/clk/clk-ld4.c diff --git a/arch/arm/mach-uniphier/clk/clk-ph1-pro4.c b/arch/arm/mach-uniphier/clk/clk-pro4.c index c784c31..c784c31 100644 --- a/arch/arm/mach-uniphier/clk/clk-ph1-pro4.c +++ b/arch/arm/mach-uniphier/clk/clk-pro4.c diff --git a/arch/arm/mach-uniphier/clk/clk-ph1-pro5.c b/arch/arm/mach-uniphier/clk/clk-pro5.c index 039da73..039da73 100644 --- a/arch/arm/mach-uniphier/clk/clk-ph1-pro5.c +++ b/arch/arm/mach-uniphier/clk/clk-pro5.c diff --git a/arch/arm/mach-uniphier/clk/clk-proxstream2.c b/arch/arm/mach-uniphier/clk/clk-pxs2.c index a528f04..a528f04 100644 --- a/arch/arm/mach-uniphier/clk/clk-proxstream2.c +++ b/arch/arm/mach-uniphier/clk/clk-pxs2.c diff --git a/arch/arm/mach-uniphier/debug-uart/Makefile b/arch/arm/mach-uniphier/debug-uart/Makefile new file mode 100644 index 0000000..0bad718 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/Makefile @@ -0,0 +1,17 @@ +# +# SPDX-License-Identifier: GPL-2.0+ +# + +ifdef CONFIG_SPL_BUILD +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += debug-uart-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += debug-uart-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += debug-uart-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += debug-uart-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += debug-uart-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += debug-uart-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += debug-uart-ld6b.o +obj-$(CONFIG_ARCH_UNIPHIER_LD11) += debug-uart-ld20.o +obj-$(CONFIG_ARCH_UNIPHIER_LD20) += debug-uart-ld20.o +endif + +obj-y += debug-uart.o diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c new file mode 100644 index 0000000..2dc2bf8 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld20.c @@ -0,0 +1,35 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc64-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_LD20_UART_CLK 58820000 + +unsigned int uniphier_ld20_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(54); /* TXD0 */ + sg_set_iectrl(58); /* TXD1 */ + sg_set_iectrl(90); /* TXD2 */ + sg_set_iectrl(94); /* TXD3 */ + sg_set_pinsel(54, 0, 8, 4); /* TXD0 -> TXD0 */ + sg_set_pinsel(58, 1, 8, 4); /* SPITXD1 -> TXD1 */ + sg_set_pinsel(90, 1, 8, 4); /* PC0WE -> TXD2 */ + sg_set_pinsel(94, 1, 8, 4); /* PCD00 -> TXD3 */ + + tmp = readl(SC_CLKCTRL4); + tmp |= SC_CLKCTRL4_PERI; + writel(tmp, SC_CLKCTRL4); + + return DIV_ROUND_CLOSEST(UNIPHIER_LD20_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c new file mode 100644 index 0000000..d5f1234 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld4.c @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> + +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_LD4_UART_CLK 36864000 + +unsigned int uniphier_ld4_debug_uart_init(void) +{ + sg_set_iectrl(0); + sg_set_pinsel(88, 1, 8, 4); /* HSDOUT6 -> TXD0 */ + + return DIV_ROUND_CLOSEST(UNIPHIER_LD4_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c new file mode 100644 index 0000000..50879f5 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-ld6b.c @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_LD6B_UART_CLK 88888888 + +unsigned int uniphier_ld6b_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(135, 3, 8, 4); /* PORT10 -> TXD0 */ + sg_set_pinsel(115, 0, 8, 4); /* TXD1 -> TXD1 */ + sg_set_pinsel(113, 2, 8, 4); /* SBO0 -> TXD2 */ + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_LD6B_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c new file mode 100644 index 0000000..91998ec --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro4.c @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_PRO4_UART_CLK 73728000 + +unsigned int uniphier_pro4_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(128, 0, 4, 8); /* TXD0 -> TXD0 */ + + writel(1, SG_LOADPINCTRL); + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_PRO4_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c new file mode 100644 index 0000000..5390396 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pro5.c @@ -0,0 +1,34 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_PRO5_UART_CLK 73728000 + +unsigned int uniphier_pro5_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(47, 0, 4, 8); /* TXD0 -> TXD0 */ + sg_set_pinsel(49, 0, 4, 8); /* TXD1 -> TXD1 */ + sg_set_pinsel(51, 0, 4, 8); /* TXD2 -> TXD2 */ + sg_set_pinsel(53, 0, 4, 8); /* TXD3 -> TXD3 */ + + writel(1, SG_LOADPINCTRL); + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_PRO5_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c new file mode 100644 index 0000000..22a200a --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-pxs2.c @@ -0,0 +1,32 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_PXS2_UART_CLK 88888888 + +unsigned int uniphier_pxs2_debug_uart_init(void) +{ + u32 tmp; + + sg_set_iectrl(0); + sg_set_pinsel(217, 8, 8, 4); /* TXD0 -> TXD0 */ + sg_set_pinsel(115, 8, 8, 4); /* TXD1 -> TXD1 */ + sg_set_pinsel(113, 8, 8, 4); /* TXD2 -> TXD2 */ + sg_set_pinsel(219, 8, 8, 4); /* TXD3 -> TXD3 */ + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_PXS2_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c new file mode 100644 index 0000000..508318a --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld3.c @@ -0,0 +1,31 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> +#include <linux/io.h> + +#include "../bcu/bcu-regs.h" +#include "../sc-regs.h" +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_SLD3_UART_CLK 36864000 + +unsigned int uniphier_sld3_debug_uart_init(void) +{ + u32 tmp; + + sg_set_pinsel(64, 1, 4, 4); /* TXD0 -> TXD0 */ + + writel(0x24440000, BCSCR5); + + tmp = readl(SC_CLKCTRL); + tmp |= SC_CLKCTRL_CEN_PERI; + writel(tmp, SC_CLKCTRL); + + return DIV_ROUND_CLOSEST(UNIPHIER_SLD3_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c new file mode 100644 index 0000000..68d390c --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart-sld8.c @@ -0,0 +1,21 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <config.h> +#include <linux/kernel.h> + +#include "../sg-regs.h" +#include "debug-uart.h" + +#define UNIPHIER_SLD8_UART_CLK 80000000 + +unsigned int uniphier_sld8_debug_uart_init(void) +{ + sg_set_iectrl(0); + sg_set_pinsel(70, 3, 8, 4); /* HSDOUT6 -> TXD0 */ + + return DIV_ROUND_CLOSEST(UNIPHIER_SLD8_UART_CLK, 16 * CONFIG_BAUDRATE); +} diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.c b/arch/arm/mach-uniphier/debug-uart/debug-uart.c new file mode 100644 index 0000000..d884785 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#include <debug_uart.h> +#include <linux/io.h> +#include <linux/serial_reg.h> + +#include "../soc-info.h" +#include "debug-uart.h" + +#define UNIPHIER_UART_TX 0x00 +#define UNIPHIER_UART_LCR_MCR 0x10 +#define UNIPHIER_UART_LSR 0x14 +#define UNIPHIER_UART_LDR 0x24 + +static void _debug_uart_putc(int c) +{ + void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + + while (!(readl(base + UNIPHIER_UART_LSR) & UART_LSR_THRE)) + ; + + writel(c, base + UNIPHIER_UART_TX); +} + +void _debug_uart_init(void) +{ + void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; + unsigned int divisor; + + switch (uniphier_get_soc_type()) { +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: + divisor = uniphier_sld3_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + case SOC_UNIPHIER_LD4: + divisor = uniphier_ld4_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + case SOC_UNIPHIER_PRO4: + divisor = uniphier_pro4_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_SLD8: + divisor = uniphier_sld8_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: + divisor = uniphier_pro5_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + case SOC_UNIPHIER_PXS2: + divisor = uniphier_pxs2_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_LD6B: + divisor = uniphier_ld6b_debug_uart_init(); + break; +#endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) || defined(CONFIG_ARCH_UNIPHIER_LD20) + case SOC_UNIPHIER_LD11: + case SOC_UNIPHIER_LD20: + divisor = uniphier_ld20_debug_uart_init(); + break; +#endif + default: + return; + } + + writel(UART_LCR_WLEN8 << 8, base + UNIPHIER_UART_LCR_MCR); + + writel(divisor, base + UNIPHIER_UART_LDR); +} +DEBUG_UART_FUNCS diff --git a/arch/arm/mach-uniphier/debug-uart/debug-uart.h b/arch/arm/mach-uniphier/debug-uart/debug-uart.h new file mode 100644 index 0000000..8de9124 --- /dev/null +++ b/arch/arm/mach-uniphier/debug-uart/debug-uart.h @@ -0,0 +1,20 @@ +/* + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef _MACH_DEBUG_UART_H +#define _MACH_DEBUG_UART_H + +unsigned int uniphier_sld3_debug_uart_init(void); +unsigned int uniphier_ld4_debug_uart_init(void); +unsigned int uniphier_pro4_debug_uart_init(void); +unsigned int uniphier_sld8_debug_uart_init(void); +unsigned int uniphier_pro5_debug_uart_init(void); +unsigned int uniphier_pxs2_debug_uart_init(void); +unsigned int uniphier_ld6b_debug_uart_init(void); +unsigned int uniphier_ld11_debug_uart_init(void); +unsigned int uniphier_ld20_debug_uart_init(void); + +#endif /* _MACH_DEBUG_UART_H */ diff --git a/arch/arm/mach-uniphier/dram/Makefile b/arch/arm/mach-uniphier/dram/Makefile index 3d1553c..615ba2c 100644 --- a/arch/arm/mach-uniphier/dram/Makefile +++ b/arch/arm/mach-uniphier/dram/Makefile @@ -4,14 +4,14 @@ ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += umc-ph1-ld4.o \ - ddrphy-training.o ddrphy-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += umc-ph1-pro4.o \ - ddrphy-training.o ddrphy-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += umc-ph1-sld8.o \ - ddrphy-training.o ddrphy-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += umc-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += umc-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += umc-ld4.o \ + ddrphy-training.o ddrphy-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += umc-pro4.o \ + ddrphy-training.o ddrphy-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += umc-sld8.o \ + ddrphy-training.o ddrphy-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += umc-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += umc-pxs2.o else diff --git a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c index 078eb6f..7a9f76c 100644 --- a/arch/arm/mach-uniphier/dram/cmd_ddrphy.c +++ b/arch/arm/mach-uniphier/dram/cmd_ddrphy.c @@ -5,8 +5,11 @@ */ #include <common.h> +#include <mapmem.h> #include <linux/io.h> +#include <linux/sizes.h> +#include "../soc-info.h" #include "ddrphy-regs.h" /* Select either decimal or hexadecimal */ @@ -18,26 +21,45 @@ /* field separator */ #define FS " " +static unsigned long uniphier_ld4_base[] = { + 0x5bc01000, + 0x5be01000, + 0 /* sentinel */ +}; + +static unsigned long uniphier_pro4_base[] = { + 0x5bc01000, + 0x5be01000, + 0 /* sentinel */ +}; + +static unsigned long uniphier_sld8_base[] = { + 0x5bc01000, + 0x5be01000, + 0 /* sentinel */ +}; + static u32 read_bdl(struct ddrphy_datx8 __iomem *dx, int index) { return (readl(&dx->bdlr[index / 5]) >> (index % 5 * 6)) & 0x3f; } -static void dump_loop(void (*callback)(struct ddrphy_datx8 __iomem *)) +static void dump_loop(unsigned long *base, + void (*callback)(struct ddrphy_datx8 __iomem *)) { - int ch, p, dx; struct ddrphy __iomem *phy; + int p, dx; - for (ch = 0; ch < NR_DDRCH; ch++) { - for (p = 0; p < NR_DDRPHY_PER_CH; p++) { - phy = (struct ddrphy __iomem *)DDRPHY_BASE(ch, p); + for (p = 0; *base; base++, p++) { + phy = map_sysmem(*base, SZ_4K); - for (dx = 0; dx < NR_DATX8_PER_DDRPHY; dx++) { - printf("CH%dP%dDX%d:", ch, p, dx); - (*callback)(&phy->dx[dx]); - printf("\n"); - } + for (dx = 0; dx < NR_DATX8_PER_DDRPHY; dx++) { + printf("PHY%dDX%d:", p, dx); + (*callback)(&phy->dx[dx]); + printf("\n"); } + + unmap_sysmem(phy); } } @@ -51,12 +73,12 @@ static void __wbdl_dump(struct ddrphy_datx8 __iomem *dx) printf(FS "(+" PRINTF_FORMAT ")", readl(&dx->lcdlr[1]) & 0xff); } -static void wbdl_dump(void) +static void wbdl_dump(unsigned long *base) { printf("\n--- Write Bit Delay Line ---\n"); printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM DQS (WDQD)\n"); - dump_loop(&__wbdl_dump); + dump_loop(base, &__wbdl_dump); } static void __rbdl_dump(struct ddrphy_datx8 __iomem *dx) @@ -69,12 +91,12 @@ static void __rbdl_dump(struct ddrphy_datx8 __iomem *dx) printf(FS "(+" PRINTF_FORMAT ")", (readl(&dx->lcdlr[1]) >> 8) & 0xff); } -static void rbdl_dump(void) +static void rbdl_dump(unsigned long *base) { printf("\n--- Read Bit Delay Line ---\n"); printf(" DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DM (RDQSD)\n"); - dump_loop(&__rbdl_dump); + dump_loop(base, &__rbdl_dump); } static void __wld_dump(struct ddrphy_datx8 __iomem *dx) @@ -92,12 +114,12 @@ static void __wld_dump(struct ddrphy_datx8 __iomem *dx) } } -static void wld_dump(void) +static void wld_dump(unsigned long *base) { printf("\n--- Write Leveling Delay ---\n"); printf(" Rank0 Rank1 Rank2 Rank3\n"); - dump_loop(&__wld_dump); + dump_loop(base, &__wld_dump); } static void __dqsgd_dump(struct ddrphy_datx8 __iomem *dx) @@ -114,12 +136,12 @@ static void __dqsgd_dump(struct ddrphy_datx8 __iomem *dx) } } -static void dqsgd_dump(void) +static void dqsgd_dump(unsigned long *base) { printf("\n--- DQS Gating Delay ---\n"); printf(" Rank0 Rank1 Rank2 Rank3\n"); - dump_loop(&__dqsgd_dump); + dump_loop(base, &__dqsgd_dump); } static void __mdl_dump(struct ddrphy_datx8 __iomem *dx) @@ -130,90 +152,106 @@ static void __mdl_dump(struct ddrphy_datx8 __iomem *dx) printf(FS PRINTF_FORMAT, (mdl >> (8 * i)) & 0xff); } -static void mdl_dump(void) +static void mdl_dump(unsigned long *base) { printf("\n--- Master Delay Line ---\n"); printf(" IPRD TPRD MDLD\n"); - dump_loop(&__mdl_dump); + dump_loop(base, &__mdl_dump); } #define REG_DUMP(x) \ { u32 __iomem *p = &phy->x; printf("%3d: %-10s: %p : %08x\n", \ p - (u32 *)phy, #x, p, readl(p)); } -static void reg_dump(void) +static void reg_dump(unsigned long *base) { - int ch, p; struct ddrphy __iomem *phy; + int p; printf("\n--- DDR PHY registers ---\n"); - for (ch = 0; ch < NR_DDRCH; ch++) { - for (p = 0; p < NR_DDRPHY_PER_CH; p++) { - printf("== Ch%d, PHY%d ==\n", ch, p); - printf(" No: Name : Address : Data\n"); - - phy = (struct ddrphy __iomem *)DDRPHY_BASE(ch, p); - - REG_DUMP(ridr); - REG_DUMP(pir); - REG_DUMP(pgcr[0]); - REG_DUMP(pgcr[1]); - REG_DUMP(pgsr[0]); - REG_DUMP(pgsr[1]); - REG_DUMP(pllcr); - REG_DUMP(ptr[0]); - REG_DUMP(ptr[1]); - REG_DUMP(ptr[2]); - REG_DUMP(ptr[3]); - REG_DUMP(ptr[4]); - REG_DUMP(acmdlr); - REG_DUMP(acbdlr); - REG_DUMP(dxccr); - REG_DUMP(dsgcr); - REG_DUMP(dcr); - REG_DUMP(dtpr[0]); - REG_DUMP(dtpr[1]); - REG_DUMP(dtpr[2]); - REG_DUMP(mr0); - REG_DUMP(mr1); - REG_DUMP(mr2); - REG_DUMP(mr3); - REG_DUMP(dx[0].gcr); - REG_DUMP(dx[0].gtr); - REG_DUMP(dx[1].gcr); - REG_DUMP(dx[1].gtr); - } + for (p = 0; *base; base++, p++) { + phy = map_sysmem(*base, SZ_4K); + + printf("== PHY%d (base: %p) ==\n", p, phy); + printf(" No: Name : Address : Data\n"); + + REG_DUMP(ridr); + REG_DUMP(pir); + REG_DUMP(pgcr[0]); + REG_DUMP(pgcr[1]); + REG_DUMP(pgsr[0]); + REG_DUMP(pgsr[1]); + REG_DUMP(pllcr); + REG_DUMP(ptr[0]); + REG_DUMP(ptr[1]); + REG_DUMP(ptr[2]); + REG_DUMP(ptr[3]); + REG_DUMP(ptr[4]); + REG_DUMP(acmdlr); + REG_DUMP(acbdlr); + REG_DUMP(dxccr); + REG_DUMP(dsgcr); + REG_DUMP(dcr); + REG_DUMP(dtpr[0]); + REG_DUMP(dtpr[1]); + REG_DUMP(dtpr[2]); + REG_DUMP(mr0); + REG_DUMP(mr1); + REG_DUMP(mr2); + REG_DUMP(mr3); + REG_DUMP(dx[0].gcr); + REG_DUMP(dx[0].gtr); + REG_DUMP(dx[1].gcr); + REG_DUMP(dx[1].gtr); + + unmap_sysmem(phy); } } static int do_ddr(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { char *cmd = argv[1]; + unsigned long *base; + + switch (uniphier_get_soc_type()) { + case SOC_UNIPHIER_LD4: + base = uniphier_ld4_base; + break; + case SOC_UNIPHIER_PRO4: + base = uniphier_pro4_base; + break; + case SOC_UNIPHIER_SLD8: + base = uniphier_sld8_base; + break; + default: + printf("unsupported SoC\n"); + return CMD_RET_FAILURE; + } if (argc == 1) cmd = "all"; if (!strcmp(cmd, "wbdl") || !strcmp(cmd, "all")) - wbdl_dump(); + wbdl_dump(base); if (!strcmp(cmd, "rbdl") || !strcmp(cmd, "all")) - rbdl_dump(); + rbdl_dump(base); if (!strcmp(cmd, "wld") || !strcmp(cmd, "all")) - wld_dump(); + wld_dump(base); if (!strcmp(cmd, "dqsgd") || !strcmp(cmd, "all")) - dqsgd_dump(); + dqsgd_dump(base); if (!strcmp(cmd, "mdl") || !strcmp(cmd, "all")) - mdl_dump(); + mdl_dump(base); if (!strcmp(cmd, "reg") || !strcmp(cmd, "all")) - reg_dump(); + reg_dump(base); - return 0; + return CMD_RET_SUCCESS; } U_BOOT_CMD( diff --git a/arch/arm/mach-uniphier/dram/ddrphy-ph1-ld4.c b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c index eb9bf24..eb9bf24 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-ph1-ld4.c +++ b/arch/arm/mach-uniphier/dram/ddrphy-ld4.c diff --git a/arch/arm/mach-uniphier/dram/ddrphy-regs.h b/arch/arm/mach-uniphier/dram/ddrphy-regs.h index 87f6d0d..a1d51ce 100644 --- a/arch/arm/mach-uniphier/dram/ddrphy-regs.h +++ b/arch/arm/mach-uniphier/dram/ddrphy-regs.h @@ -158,17 +158,6 @@ struct ddrphy { /* SoC-specific parameters */ #define NR_DATX8_PER_DDRPHY 2 -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) -#define NR_DDRPHY_PER_CH 1 -#else -#define NR_DDRPHY_PER_CH 2 -#endif - -#define NR_DDRCH 2 - -#define DDRPHY_BASE(ch, phy) (0x5bc01000 + 0x200000 * (ch) + 0x1000 * (phy)) - #ifndef __ASSEMBLY__ int ph1_ld4_ddrphy_init(struct ddrphy __iomem *phy, int freq, bool ddr3plus); void ddrphy_prepare_training(struct ddrphy __iomem *phy, int rank); diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c b/arch/arm/mach-uniphier/dram/umc-ld4.c index 72447cc..72447cc 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-ld4.c +++ b/arch/arm/mach-uniphier/dram/umc-ld4.c diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c b/arch/arm/mach-uniphier/dram/umc-pro4.c index 23fb7b9..23fb7b9 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-pro4.c +++ b/arch/arm/mach-uniphier/dram/umc-pro4.c diff --git a/arch/arm/mach-uniphier/dram/umc-proxstream2.c b/arch/arm/mach-uniphier/dram/umc-pxs2.c index 50c0238..50c0238 100644 --- a/arch/arm/mach-uniphier/dram/umc-proxstream2.c +++ b/arch/arm/mach-uniphier/dram/umc-pxs2.c diff --git a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c b/arch/arm/mach-uniphier/dram/umc-sld8.c index 6cacd25..6cacd25 100644 --- a/arch/arm/mach-uniphier/dram/umc-ph1-sld8.c +++ b/arch/arm/mach-uniphier/dram/umc-sld8.c diff --git a/arch/arm/mach-uniphier/early-clk/Makefile b/arch/arm/mach-uniphier/early-clk/Makefile index 3e1e1b2..59058cd 100644 --- a/arch/arm/mach-uniphier/early-clk/Makefile +++ b/arch/arm/mach-uniphier/early-clk/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += early-clk-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += early-clk-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += early-clk-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += early-clk-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += early-clk-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += early-clk-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += early-clk-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += early-clk-pxs2.o diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-ld4.c b/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c index 6574767..6574767 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-ld4.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-ld4.c diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c b/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c index d986358..d986358 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-ph1-pro5.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-pro5.c diff --git a/arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c b/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c index a573a96..a573a96 100644 --- a/arch/arm/mach-uniphier/early-clk/early-clk-proxstream2.c +++ b/arch/arm/mach-uniphier/early-clk/early-clk-pxs2.c diff --git a/arch/arm/mach-uniphier/early-pinctrl/Makefile b/arch/arm/mach-uniphier/early-pinctrl/Makefile index 3be71fb..dc4064c 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/Makefile +++ b/arch/arm/mach-uniphier/early-pinctrl/Makefile @@ -2,4 +2,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += early-pinctrl-ph1-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += early-pinctrl-sld3.o diff --git a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c index 7923644..7923644 100644 --- a/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-ph1-sld3.c +++ b/arch/arm/mach-uniphier/early-pinctrl/early-pinctrl-sld3.c diff --git a/arch/arm/mach-uniphier/init.h b/arch/arm/mach-uniphier/init.h index e969fd0..cef9d62 100644 --- a/arch/arm/mach-uniphier/init.h +++ b/arch/arm/mach-uniphier/init.h @@ -34,27 +34,33 @@ int ph1_pro5_init(const struct uniphier_board_data *bd); int proxstream2_init(const struct uniphier_board_data *bd); #if defined(CONFIG_MICRO_SUPPORT_CARD) -int ph1_sld3_sbc_init(const struct uniphier_board_data *bd); -int ph1_ld4_sbc_init(const struct uniphier_board_data *bd); -int ph1_pro4_sbc_init(const struct uniphier_board_data *bd); -int proxstream2_sbc_init(const struct uniphier_board_data *bd); +int sbc_admulti_init(const struct uniphier_board_data *bd); +int sbc_savepin_init(const struct uniphier_board_data *bd); +int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd); +int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd); +int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd); #else -static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) +static inline int sbc_admulti_init(const struct uniphier_board_data *bd) { return 0; } -static inline int ph1_ld4_sbc_init(const struct uniphier_board_data *bd) +static inline int sbc_savepin_init(const struct uniphier_board_data *bd) { return 0; } -static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd) +static inline int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd) { return 0; } -static inline int proxstream2_sbc_init(const struct uniphier_board_data *bd) +static inline int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd) +{ + return 0; +} + +static inline int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd) { return 0; } diff --git a/arch/arm/mach-uniphier/init/Makefile b/arch/arm/mach-uniphier/init/Makefile index ef80953..34b15e3 100644 --- a/arch/arm/mach-uniphier/init/Makefile +++ b/arch/arm/mach-uniphier/init/Makefile @@ -4,10 +4,10 @@ obj-y += init.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += init-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += init-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += init-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += init-ph1-sld8.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += init-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += init-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += init-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += init-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += init-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += init-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += init-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += init-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += init-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += init-pxs2.o diff --git a/arch/arm/mach-uniphier/init/init-ph1-ld4.c b/arch/arm/mach-uniphier/init/init-ld4.c index a9c6d72..5295cd0 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-ld4.c +++ b/arch/arm/mach-uniphier/init/init-ld4.c @@ -14,7 +14,8 @@ int ph1_ld4_init(const struct uniphier_board_data *bd) { ph1_ld4_bcu_init(bd); - ph1_ld4_sbc_init(bd); + sbc_savepin_init(bd); + uniphier_ld4_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-pro4.c b/arch/arm/mach-uniphier/init/init-pro4.c index 6fcd8b6..456fb48 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-pro4.c +++ b/arch/arm/mach-uniphier/init/init-pro4.c @@ -12,7 +12,7 @@ int ph1_pro4_init(const struct uniphier_board_data *bd) { - ph1_pro4_sbc_init(bd); + sbc_savepin_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-pro5.c b/arch/arm/mach-uniphier/init/init-pro5.c index 45c65cf..c2c6803 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-pro5.c +++ b/arch/arm/mach-uniphier/init/init-pro5.c @@ -12,7 +12,7 @@ int ph1_pro5_init(const struct uniphier_board_data *bd) { - ph1_pro4_sbc_init(bd); + sbc_savepin_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-proxstream2.c b/arch/arm/mach-uniphier/init/init-pxs2.c index 029c544..2d4b6fb 100644 --- a/arch/arm/mach-uniphier/init/init-proxstream2.c +++ b/arch/arm/mach-uniphier/init/init-pxs2.c @@ -14,7 +14,8 @@ int proxstream2_init(const struct uniphier_board_data *bd) { int ret; - proxstream2_sbc_init(bd); + sbc_savepin_init(bd); + uniphier_pxs2_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-sld3.c b/arch/arm/mach-uniphier/init/init-sld3.c index 7827ec0..c48126f 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-sld3.c +++ b/arch/arm/mach-uniphier/init/init-sld3.c @@ -14,7 +14,8 @@ int ph1_sld3_init(const struct uniphier_board_data *bd) { ph1_sld3_bcu_init(bd); - ph1_sld3_sbc_init(bd); + sbc_admulti_init(bd); + uniphier_sld3_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init-ph1-sld8.c b/arch/arm/mach-uniphier/init/init-sld8.c index 6c96aed..1f31ca6 100644 --- a/arch/arm/mach-uniphier/init/init-ph1-sld8.c +++ b/arch/arm/mach-uniphier/init/init-sld8.c @@ -14,7 +14,8 @@ int ph1_sld8_init(const struct uniphier_board_data *bd) { ph1_ld4_bcu_init(bd); - ph1_ld4_sbc_init(bd); + sbc_savepin_init(bd); + uniphier_ld4_sbc_init(bd); support_card_reset(); diff --git a/arch/arm/mach-uniphier/init/init.c b/arch/arm/mach-uniphier/init/init.c index b30f3bd..7316d51 100644 --- a/arch/arm/mach-uniphier/init/init.c +++ b/arch/arm/mach-uniphier/init/init.c @@ -5,6 +5,7 @@ */ #include <common.h> +#include <debug_uart.h> #include <spl.h> #include "../init.h" @@ -14,40 +15,43 @@ void spl_board_init(void) { const struct uniphier_board_data *param; +#ifdef CONFIG_DEBUG_UART + debug_uart_init(); +#endif + param = uniphier_get_board_param(); if (!param) hang(); switch (uniphier_get_soc_type()) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - case SOC_UNIPHIER_PH1_SLD3: +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + case SOC_UNIPHIER_SLD3: ph1_sld3_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) - case SOC_UNIPHIER_PH1_LD4: +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + case SOC_UNIPHIER_LD4: ph1_ld4_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) - case SOC_UNIPHIER_PH1_PRO4: +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + case SOC_UNIPHIER_PRO4: ph1_pro4_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - case SOC_UNIPHIER_PH1_SLD8: +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + case SOC_UNIPHIER_SLD8: ph1_sld8_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - case SOC_UNIPHIER_PH1_PRO5: +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + case SOC_UNIPHIER_PRO5: ph1_pro5_init(param); break; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - case SOC_UNIPHIER_PROXSTREAM2: - case SOC_UNIPHIER_PH1_LD6B: +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) || defined(CONFIG_ARCH_UNIPHIER_LD6B) + case SOC_UNIPHIER_PXS2: + case SOC_UNIPHIER_LD6B: proxstream2_init(param); break; #endif diff --git a/arch/arm/mach-uniphier/memconf/Makefile b/arch/arm/mach-uniphier/memconf/Makefile index a152f61..78bb677 100644 --- a/arch/arm/mach-uniphier/memconf/Makefile +++ b/arch/arm/mach-uniphier/memconf/Makefile @@ -3,6 +3,6 @@ # obj-y += memconf.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += memconf-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += memconf-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += memconf-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += memconf-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += memconf-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += memconf-pxs2.o diff --git a/arch/arm/mach-uniphier/memconf/memconf-proxstream2.c b/arch/arm/mach-uniphier/memconf/memconf-pxs2.c index c47fe0a..c47fe0a 100644 --- a/arch/arm/mach-uniphier/memconf/memconf-proxstream2.c +++ b/arch/arm/mach-uniphier/memconf/memconf-pxs2.c diff --git a/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c b/arch/arm/mach-uniphier/memconf/memconf-sld3.c index 6fdf910..6fdf910 100644 --- a/arch/arm/mach-uniphier/memconf/memconf-ph1-sld3.c +++ b/arch/arm/mach-uniphier/memconf/memconf-sld3.c diff --git a/arch/arm/mach-uniphier/micro-support-card.c b/arch/arm/mach-uniphier/micro-support-card.c index f7a37e3..eeb515a 100644 --- a/arch/arm/mach-uniphier/micro-support-card.c +++ b/arch/arm/mach-uniphier/micro-support-card.c @@ -25,12 +25,12 @@ */ void support_card_reset_deassert(void) { - writel(0, MICRO_SUPPORT_CARD_RESET); + writel(0x00010000, MICRO_SUPPORT_CARD_RESET); } void support_card_reset(void) { - writel(3, MICRO_SUPPORT_CARD_RESET); + writel(0x00020003, MICRO_SUPPORT_CARD_RESET); } static int support_card_show_revision(void) diff --git a/arch/arm/mach-uniphier/pinctrl/Makefile b/arch/arm/mach-uniphier/pinctrl/Makefile index 80a9cda..5504c24 100644 --- a/arch/arm/mach-uniphier/pinctrl/Makefile +++ b/arch/arm/mach-uniphier/pinctrl/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pinctrl-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += pinctrl-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pinctrl-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += pinctrl-pro4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pinctrl-sld8.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += pinctrl-pro5.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += pinctrl-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += pinctrl-ld6b.o diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c index 2fe2c7f..2fe2c7f 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld4.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld4.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c index 4faeaf5..4faeaf5 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-ld6b.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-ld6b.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c index b08ca1e..b08ca1e 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro4.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro4.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c index 79160d6..79160d6 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-pro5.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-pro5.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c index a662db8..a662db8 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-proxstream2.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-pxs2.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c index 367d9f3..367d9f3 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld3.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld3.c diff --git a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c index f3fae1d..f3fae1d 100644 --- a/arch/arm/mach-uniphier/pinctrl/pinctrl-ph1-sld8.c +++ b/arch/arm/mach-uniphier/pinctrl/pinctrl-sld8.c diff --git a/arch/arm/mach-uniphier/pll/Makefile b/arch/arm/mach-uniphier/pll/Makefile index ca88521..63f169c 100644 --- a/arch/arm/mach-uniphier/pll/Makefile +++ b/arch/arm/mach-uniphier/pll/Makefile @@ -2,11 +2,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += pll-init-ph1-sld3.o \ - pll-spectrum-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += pll-init-ph1-ld4.o \ - pll-spectrum-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += pll-init-ph1-pro4.o \ - pll-spectrum-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += pll-init-ph1-sld8.o \ - pll-spectrum-ph1-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += pll-init-sld3.o pll-spectrum-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += pll-init-ld4.o pll-spectrum-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += pll-init-pro4.o pll-spectrum-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += pll-init-sld8.o pll-spectrum-ld4.o diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-ld4.c b/arch/arm/mach-uniphier/pll/pll-init-ld4.c index b2de9e8..b2de9e8 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-ld4.c +++ b/arch/arm/mach-uniphier/pll/pll-init-ld4.c diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-pro4.c b/arch/arm/mach-uniphier/pll/pll-init-pro4.c index 69d518d..69d518d 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-pro4.c +++ b/arch/arm/mach-uniphier/pll/pll-init-pro4.c diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld3.c b/arch/arm/mach-uniphier/pll/pll-init-sld3.c index b93806c..b93806c 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld3.c +++ b/arch/arm/mach-uniphier/pll/pll-init-sld3.c diff --git a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld8.c b/arch/arm/mach-uniphier/pll/pll-init-sld8.c index 3c75504..3c75504 100644 --- a/arch/arm/mach-uniphier/pll/pll-init-ph1-sld8.c +++ b/arch/arm/mach-uniphier/pll/pll-init-sld8.c diff --git a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-ld4.c b/arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c index a1c8089..a1c8089 100644 --- a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-ld4.c +++ b/arch/arm/mach-uniphier/pll/pll-spectrum-ld4.c diff --git a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-sld3.c b/arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c index 94654ee..94654ee 100644 --- a/arch/arm/mach-uniphier/pll/pll-spectrum-ph1-sld3.c +++ b/arch/arm/mach-uniphier/pll/pll-spectrum-sld3.c diff --git a/arch/arm/mach-uniphier/sbc/Makefile b/arch/arm/mach-uniphier/sbc/Makefile index 57eb44b..e515af9 100644 --- a/arch/arm/mach-uniphier/sbc/Makefile +++ b/arch/arm/mach-uniphier/sbc/Makefile @@ -2,10 +2,10 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD3) += sbc-ph1-sld3.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD4) += sbc-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO4) += sbc-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_SLD8) += sbc-ph1-ld4.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_PRO5) += sbc-ph1-pro4.o -obj-$(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) += sbc-proxstream2.o -obj-$(CONFIG_ARCH_UNIPHIER_PH1_LD6B) += sbc-proxstream2.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD3) += sbc-admulti.o sbc-sld3.o +obj-$(CONFIG_ARCH_UNIPHIER_LD4) += sbc-savepin.o sbc-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO4) += sbc-savepin.o +obj-$(CONFIG_ARCH_UNIPHIER_SLD8) += sbc-savepin.o sbc-ld4.o +obj-$(CONFIG_ARCH_UNIPHIER_PRO5) += sbc-savepin.o +obj-$(CONFIG_ARCH_UNIPHIER_PXS2) += sbc-savepin.o sbc-pxs2.o +obj-$(CONFIG_ARCH_UNIPHIER_LD6B) += sbc-savepin.o sbc-pxs2.o diff --git a/arch/arm/mach-uniphier/sbc/sbc-ph1-sld3.c b/arch/arm/mach-uniphier/sbc/sbc-admulti.c index c03c284..8e9f8eb 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-ph1-sld3.c +++ b/arch/arm/mach-uniphier/sbc/sbc-admulti.c @@ -11,10 +11,16 @@ #include "../sg-regs.h" #include "sbc-regs.h" -int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) -{ - /* only address/data multiplex mode is supported */ +#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000 +#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500 +#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020 + +#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000 +#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500 +#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010 +int sbc_admulti_init(const struct uniphier_board_data *bd) +{ /* * Only CS1 is connected to support card. * BKSZ[1:0] should be set to "01". @@ -43,7 +49,5 @@ int ph1_sld3_sbc_init(const struct uniphier_board_data *bd) writel(0x0200be01, SBBASE1); } - sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ - return 0; } diff --git a/arch/arm/mach-uniphier/sbc/sbc-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-ld4.c new file mode 100644 index 0000000..12bee79 --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-ld4.c @@ -0,0 +1,22 @@ +/* + * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "sbc-regs.h" + +int uniphier_ld4_sbc_init(const struct uniphier_board_data *bd) +{ + u32 tmp; + + /* system bus output enable */ + tmp = readl(PC0CTRL); + tmp &= 0xfffffcff; + writel(tmp, PC0CTRL); + + return 0; +} diff --git a/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c b/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c deleted file mode 100644 index 8313c5a..0000000 --- a/arch/arm/mach-uniphier/sbc/sbc-ph1-pro4.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <common.h> -#include <linux/io.h> - -#include "../init.h" -#include "../sg-regs.h" -#include "sbc-regs.h" - -int ph1_pro4_sbc_init(const struct uniphier_board_data *bd) -{ - /* - * Only CS1 is connected to support card. - * BKSZ[1:0] should be set to "01". - */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); - - if (boot_is_swapped()) { - /* - * Boot Swap On: boot from external NOR/SRAM - * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. - * - * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank - * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals - */ - writel(0x0000bc01, SBBASE0); - } else { - /* - * Boot Swap Off: boot from mask ROM - * 0x40000000-0x41ffffff: mask ROM - * 0x42000000-0x43efffff: memory bank (31MB) - * 0x43f00000-0x43ffffff: peripherals (1MB) - */ - writel(0x0000be01, SBBASE0); /* dummy */ - writel(0x0200be01, SBBASE1); - } - - return 0; -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c b/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c deleted file mode 100644 index 0d9ffe1..0000000 --- a/arch/arm/mach-uniphier/sbc/sbc-proxstream2.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#include <linux/io.h> - -#include "../init.h" -#include "../sg-regs.h" -#include "sbc-regs.h" - -int proxstream2_sbc_init(const struct uniphier_board_data *bd) -{ - /* necessary for ROM boot ?? */ - /* system bus output enable */ - writel(0x17, PC0CTRL); - - /* - * Only CS1 is connected to support card. - * BKSZ[1:0] should be set to "01". - */ - writel(SBCTRL0_SAVEPIN_PERI_VALUE, SBCTRL10); - writel(SBCTRL1_SAVEPIN_PERI_VALUE, SBCTRL11); - writel(SBCTRL2_SAVEPIN_PERI_VALUE, SBCTRL12); - writel(SBCTRL4_SAVEPIN_PERI_VALUE, SBCTRL14); - - if (boot_is_swapped()) { - /* - * Boot Swap On: boot from external NOR/SRAM - * 0x42000000-0x43ffffff is a mirror of 0x40000000-0x41ffffff. - * - * 0x40000000-0x41efffff, 0x42000000-0x43efffff: memory bank - * 0x41f00000-0x41ffffff, 0x43f00000-0x43ffffff: peripherals - */ - writel(0x0000bc01, SBBASE0); - } else { - /* - * Boot Swap Off: boot from mask ROM - * 0x40000000-0x41ffffff: mask ROM - * 0x42000000-0x43efffff: memory bank (31MB) - * 0x43f00000-0x43ffffff: peripherals (1MB) - */ - writel(0x0000be01, SBBASE0); /* dummy */ - writel(0x0200be01, SBBASE1); - } - - return 0; -} diff --git a/arch/arm/mach-uniphier/sbc/sbc-pxs2.c b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c new file mode 100644 index 0000000..acbf4c5 --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-pxs2.c @@ -0,0 +1,19 @@ +/* + * Copyright (C) 2015-2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "sbc-regs.h" + +int uniphier_pxs2_sbc_init(const struct uniphier_board_data *bd) +{ + /* necessary for ROM boot ?? */ + /* system bus output enable */ + writel(0x17, PC0CTRL); + + return 0; +} diff --git a/arch/arm/mach-uniphier/sbc/sbc-regs.h b/arch/arm/mach-uniphier/sbc/sbc-regs.h index 493363b..a5dca74 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-regs.h +++ b/arch/arm/mach-uniphier/sbc/sbc-regs.h @@ -74,27 +74,6 @@ #define SBCTRL73 SBCTRL(7, 3) #define SBCTRL74 (SBCTRL_BASE + 0x170) -/* slower but LED works */ -#define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000 -#define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00 -#define SBCTRL2_SAVEPIN_PERI_VALUE 0x34000009 -#define SBCTRL4_SAVEPIN_PERI_VALUE 0x02110110 - -/* faster but LED does not work */ -#define SBCTRL0_SAVEPIN_MEM_VALUE 0x55450000 -#define SBCTRL1_SAVEPIN_MEM_VALUE 0x06057700 -/* NOR flash needs more wait counts than SRAM */ -#define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009 -#define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210 - -#define SBCTRL0_ADMULTIPLX_PERI_VALUE 0x33120000 -#define SBCTRL1_ADMULTIPLX_PERI_VALUE 0x03005500 -#define SBCTRL2_ADMULTIPLX_PERI_VALUE 0x14000020 - -#define SBCTRL0_ADMULTIPLX_MEM_VALUE 0x33120000 -#define SBCTRL1_ADMULTIPLX_MEM_VALUE 0x03005500 -#define SBCTRL2_ADMULTIPLX_MEM_VALUE 0x14000010 - #define PC0CTRL 0x598000c0 #define ROM_BOOT_ROMRSV2 0x59801208 diff --git a/arch/arm/mach-uniphier/sbc/sbc-ph1-ld4.c b/arch/arm/mach-uniphier/sbc/sbc-savepin.c index fcce43c..e3e3daa 100644 --- a/arch/arm/mach-uniphier/sbc/sbc-ph1-ld4.c +++ b/arch/arm/mach-uniphier/sbc/sbc-savepin.c @@ -1,25 +1,29 @@ /* - * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * Copyright (C) 2011-2016 Masahiro Yamada <yamada.masahiro@socionext.com> * * SPDX-License-Identifier: GPL-2.0+ */ -#include <common.h> #include <linux/io.h> #include "../init.h" -#include "../sg-regs.h" #include "sbc-regs.h" -int ph1_ld4_sbc_init(const struct uniphier_board_data *bd) -{ - u32 tmp; +/* slower but LED works */ +#define SBCTRL0_SAVEPIN_PERI_VALUE 0x55450000 +#define SBCTRL1_SAVEPIN_PERI_VALUE 0x07168d00 +#define SBCTRL2_SAVEPIN_PERI_VALUE 0x34000009 +#define SBCTRL4_SAVEPIN_PERI_VALUE 0x02110110 - /* system bus output enable */ - tmp = readl(PC0CTRL); - tmp &= 0xfffffcff; - writel(tmp, PC0CTRL); +/* faster but LED does not work */ +#define SBCTRL0_SAVEPIN_MEM_VALUE 0x55450000 +#define SBCTRL1_SAVEPIN_MEM_VALUE 0x06057700 +/* NOR flash needs more wait counts than SRAM */ +#define SBCTRL2_SAVEPIN_MEM_VALUE 0x34000009 +#define SBCTRL4_SAVEPIN_MEM_VALUE 0x02110210 +int sbc_savepin_init(const struct uniphier_board_data *bd) +{ /* * Only CS1 is connected to support card. * BKSZ[1:0] should be set to "01". diff --git a/arch/arm/mach-uniphier/sbc/sbc-sld3.c b/arch/arm/mach-uniphier/sbc/sbc-sld3.c new file mode 100644 index 0000000..ac9d030 --- /dev/null +++ b/arch/arm/mach-uniphier/sbc/sbc-sld3.c @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <linux/io.h> + +#include "../init.h" +#include "../sg-regs.h" + +int uniphier_sld3_sbc_init(const struct uniphier_board_data *bd) +{ + sg_set_pinsel(99, 1, 4, 4); /* GPIO26 -> EA24 */ + + return 0; +} diff --git a/arch/arm/mach-uniphier/sc-regs.h b/arch/arm/mach-uniphier/sc-regs.h index 474b82d..a095589 100644 --- a/arch/arm/mach-uniphier/sc-regs.h +++ b/arch/arm/mach-uniphier/sc-regs.h @@ -9,7 +9,7 @@ #ifndef ARCH_SC_REGS_H #define ARCH_SC_REGS_H -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) #define SC_BASE_ADDR 0xf1840000 #else #define SC_BASE_ADDR 0x61840000 diff --git a/arch/arm/mach-uniphier/sc64-regs.h b/arch/arm/mach-uniphier/sc64-regs.h new file mode 100644 index 0000000..ef02830 --- /dev/null +++ b/arch/arm/mach-uniphier/sc64-regs.h @@ -0,0 +1,44 @@ +/* + * UniPhier SC (System Control) block registers for ARMv8 SoCs + * + * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef SC64_REGS_H +#define SC64_REGS_H + +#define SC_BASE_ADDR 0x61840000 + +#define SC_RSTCTRL (SC_BASE_ADDR | 0x2000) +#define SC_RSTCTRL3 (SC_BASE_ADDR | 0x2008) +#define SC_RSTCTRL4 (SC_BASE_ADDR | 0x200c) +#define SC_RSTCTRL4_ETHER (1 << 6) +#define SC_RSTCTRL4_NAND (1 << 0) +#define SC_RSTCTRL5 (SC_BASE_ADDR | 0x2010) +#define SC_RSTCTRL6 (SC_BASE_ADDR | 0x2014) +#define SC_RSTCTRL7 (SC_BASE_ADDR | 0x2018) +#define SC_RSTCTRL7_UMCSB (1 << 16) +#define SC_RSTCTRL7_UMCA2 (1 << 10) +#define SC_RSTCTRL7_UMCA1 (1 << 9) +#define SC_RSTCTRL7_UMCA0 (1 << 8) +#define SC_RSTCTRL7_UMC32 (1 << 2) +#define SC_RSTCTRL7_UMC31 (1 << 1) +#define SC_RSTCTRL7_UMC30 (1 << 0) + +#define SC_CLKCTRL (SC_BASE_ADDR | 0x2100) +#define SC_CLKCTRL3 (SC_BASE_ADDR | 0x2108) +#define SC_CLKCTRL4 (SC_BASE_ADDR | 0x210c) +#define SC_CLKCTRL4_PERI (1 << 7) +#define SC_CLKCTRL4_ETHER (1 << 6) +#define SC_CLKCTRL4_NAND (1 << 0) +#define SC_CLKCTRL5 (SC_BASE_ADDR | 0x2110) +#define SC_CLKCTRL6 (SC_BASE_ADDR | 0x2114) +#define SC_CLKCTRL7 (SC_BASE_ADDR | 0x2118) +#define SC_CLKCTRL7_UMCSB (1 << 16) +#define SC_CLKCTRL7_UMC32 (1 << 2) +#define SC_CLKCTRL7_UMC31 (1 << 1) +#define SC_CLKCTRL7_UMC30 (1 << 0) + +#endif /* SC64_REGS_H */ diff --git a/arch/arm/mach-uniphier/sg-regs.h b/arch/arm/mach-uniphier/sg-regs.h index 3a535c7..2cdc2db 100644 --- a/arch/arm/mach-uniphier/sg-regs.h +++ b/arch/arm/mach-uniphier/sg-regs.h @@ -115,6 +115,17 @@ static inline void sg_set_pinsel(unsigned pin, unsigned muxval, writel(tmp, reg); } +static inline void sg_set_iectrl(unsigned pin) +{ + unsigned bit = pin % 32; + unsigned long reg = SG_IECTRL + pin / 32 * 4; + u32 tmp; + + tmp = readl(reg); + tmp |= 1 << bit; + writel(tmp, reg); +} + #endif /* __ASSEMBLY__ */ #endif /* ARCH_SG_REGS_H */ diff --git a/arch/arm/mach-uniphier/soc-info.h b/arch/arm/mach-uniphier/soc-info.h index 606094c..d9b38b3 100644 --- a/arch/arm/mach-uniphier/soc-info.h +++ b/arch/arm/mach-uniphier/soc-info.h @@ -8,28 +8,28 @@ #define __MACH_SOC_INFO_H__ enum uniphier_soc_id { - SOC_UNIPHIER_PH1_SLD3, - SOC_UNIPHIER_PH1_LD4, - SOC_UNIPHIER_PH1_PRO4, - SOC_UNIPHIER_PH1_SLD8, - SOC_UNIPHIER_PH1_PRO5, - SOC_UNIPHIER_PROXSTREAM2, - SOC_UNIPHIER_PH1_LD6B, - SOC_UNIPHIER_PH1_LD11, - SOC_UNIPHIER_PH1_LD20, + SOC_UNIPHIER_SLD3, + SOC_UNIPHIER_LD4, + SOC_UNIPHIER_PRO4, + SOC_UNIPHIER_SLD8, + SOC_UNIPHIER_PRO5, + SOC_UNIPHIER_PXS2, + SOC_UNIPHIER_LD6B, + SOC_UNIPHIER_LD11, + SOC_UNIPHIER_LD20, SOC_UNIPHIER_UNKNOWN, }; #define UNIPHIER_NR_ENABLED_SOCS \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD3) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD4) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO4) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_SLD8) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_PRO5) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD6B) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD11) + \ - IS_ENABLED(CONFIG_ARCH_UNIPHIER_PH1_LD20) + IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD3) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD4) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO4) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_SLD8) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PRO5) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_PXS2) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD6B) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD11) + \ + IS_ENABLED(CONFIG_ARCH_UNIPHIER_LD20) #define UNIPHIER_MULTI_SOC ((UNIPHIER_NR_ENABLED_SOCS) > 1) @@ -38,32 +38,32 @@ enum uniphier_soc_id uniphier_get_soc_type(void); #else static inline enum uniphier_soc_id uniphier_get_soc_type(void) { -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) - return SOC_UNIPHIER_PH1_SLD3; +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) + return SOC_UNIPHIER_SLD3; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) - return SOC_UNIPHIER_PH1_LD4; +#if defined(CONFIG_ARCH_UNIPHIER_LD4) + return SOC_UNIPHIER_LD4; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO4) - return SOC_UNIPHIER_PH1_PRO4; +#if defined(CONFIG_ARCH_UNIPHIER_PRO4) + return SOC_UNIPHIER_PRO4; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) - return SOC_UNIPHIER_PH1_SLD8; +#if defined(CONFIG_ARCH_UNIPHIER_SLD8) + return SOC_UNIPHIER_SLD8; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_PRO5) - return SOC_UNIPHIER_PH1_PRO5; +#if defined(CONFIG_ARCH_UNIPHIER_PRO5) + return SOC_UNIPHIER_PRO5; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PROXSTREAM2) - return SOC_UNIPHIER_PROXSTREAM2; +#if defined(CONFIG_ARCH_UNIPHIER_PXS2) + return SOC_UNIPHIER_PXS2; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD6B) - return SOC_UNIPHIER_PH1_LD6B; +#if defined(CONFIG_ARCH_UNIPHIER_LD6B) + return SOC_UNIPHIER_LD6B; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD11) - return SOC_UNIPHIER_PH1_LD11; +#if defined(CONFIG_ARCH_UNIPHIER_LD11) + return SOC_UNIPHIER_LD11; #endif -#if defined(CONFIG_ARCH_UNIPHIER_PH1_LD20) - return SOC_UNIPHIER_PH1_LD20; +#if defined(CONFIG_ARCH_UNIPHIER_LD20) + return SOC_UNIPHIER_LD20; #endif return SOC_UNIPHIER_UNKNOWN; diff --git a/arch/arm/mach-uniphier/soc_info.c b/arch/arm/mach-uniphier/soc_info.c index 3cfc183..046104b 100644 --- a/arch/arm/mach-uniphier/soc_info.c +++ b/arch/arm/mach-uniphier/soc_info.c @@ -17,49 +17,49 @@ enum uniphier_soc_id uniphier_get_soc_type(void) enum uniphier_soc_id ret; switch ((revision & SG_REVISION_TYPE_MASK) >> SG_REVISION_TYPE_SHIFT) { -#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3 +#ifdef CONFIG_ARCH_UNIPHIER_SLD3 case 0x25: - ret = SOC_UNIPHIER_PH1_SLD3; + ret = SOC_UNIPHIER_SLD3; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD4 +#ifdef CONFIG_ARCH_UNIPHIER_LD4 case 0x26: - ret = SOC_UNIPHIER_PH1_LD4; + ret = SOC_UNIPHIER_LD4; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_PRO4 +#ifdef CONFIG_ARCH_UNIPHIER_PRO4 case 0x28: - ret = SOC_UNIPHIER_PH1_PRO4; + ret = SOC_UNIPHIER_PRO4; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD8 +#ifdef CONFIG_ARCH_UNIPHIER_SLD8 case 0x29: - ret = SOC_UNIPHIER_PH1_SLD8; + ret = SOC_UNIPHIER_SLD8; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_PRO5 +#ifdef CONFIG_ARCH_UNIPHIER_PRO5 case 0x2A: - ret = SOC_UNIPHIER_PH1_PRO5; + ret = SOC_UNIPHIER_PRO5; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PROXSTREAM2 +#ifdef CONFIG_ARCH_UNIPHIER_PXS2 case 0x2E: - ret = SOC_UNIPHIER_PROXSTREAM2; + ret = SOC_UNIPHIER_PXS2; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD6B +#ifdef CONFIG_ARCH_UNIPHIER_LD6B case 0x2F: - ret = SOC_UNIPHIER_PH1_LD6B; + ret = SOC_UNIPHIER_LD6B; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD11 +#ifdef CONFIG_ARCH_UNIPHIER_LD11 case 0x31: - ret = SOC_UNIPHIER_PH1_LD11; + ret = SOC_UNIPHIER_LD11; break; #endif -#ifdef CONFIG_ARCH_UNIPHIER_PH1_LD20 +#ifdef CONFIG_ARCH_UNIPHIER_LD20 case 0x32: - ret = SOC_UNIPHIER_PH1_LD20; + ret = SOC_UNIPHIER_LD20; break; #endif default: diff --git a/common/spl/spl_mmc.c b/common/spl/spl_mmc.c index c0e76be..7d3bfc6 100644 --- a/common/spl/spl_mmc.c +++ b/common/spl/spl_mmc.c @@ -41,7 +41,6 @@ static int mmc_load_legacy(struct mmc *mmc, ulong sector, return 0; } -#ifdef CONFIG_SPL_LOAD_FIT static ulong h_spl_load_read(struct spl_load_info *load, ulong sector, ulong count, void *buf) { @@ -49,7 +48,6 @@ static ulong h_spl_load_read(struct spl_load_info *load, ulong sector, return mmc->block_dev.block_read(&mmc->block_dev, sector, count, buf); } -#endif static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector) { @@ -68,12 +66,8 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector) goto end; } - switch (image_get_magic(header)) { - case IH_MAGIC: - ret = mmc_load_legacy(mmc, sector, header); - break; -#ifdef CONFIG_SPL_LOAD_FIT - case FDT_MAGIC: { + if (IS_ENABLED(CONFIG_SPL_LOAD_FIT) && + image_get_magic(header) == FDT_MAGIC) { struct spl_load_info load; debug("Found FIT\n"); @@ -82,12 +76,8 @@ static int mmc_load_image_raw_sector(struct mmc *mmc, unsigned long sector) load.bl_len = mmc->read_bl_len; load.read = h_spl_load_read; ret = spl_load_simple_fit(&load, sector, header); - break; - } -#endif - default: - puts("bad magic\n"); - return -1; + } else { + ret = mmc_load_legacy(mmc, sector, header); } end: diff --git a/configs/uniphier_sld3_defconfig b/configs/uniphier_sld3_defconfig index 5f0d678..f779ded 100644 --- a/configs/uniphier_sld3_defconfig +++ b/configs/uniphier_sld3_defconfig @@ -1,6 +1,6 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y -CONFIG_ARCH_UNIPHIER_PH1_SLD3=y +CONFIG_ARCH_UNIPHIER_SLD3=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_TEXT_BASE=0x84000000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ph1-sld3-ref" diff --git a/doc/README.uniphier b/doc/README.uniphier index 8d043be..49045a0 100644 --- a/doc/README.uniphier +++ b/doc/README.uniphier @@ -75,13 +75,18 @@ to use your favorite compiler. Burn U-Boot images to NAND -------------------------- -Write two files to the NAND device as follows: +Write the following to the NAND device: + - spl/u-boot-spl.bin at the offset address 0x00000000 - - u-boot.img at the offset address 0x00010000 + - u-boot.bin at the offset address 0x00010000 + +or + + - u-boot-with-spl.bin at the offset address 0x00000000 If a TFTP server is available, the images can be easily updated. -Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public -directory, and then run the following command at the U-Boot command line: +Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, +and then run the following command at the U-Boot command line: => run nandupdate @@ -89,13 +94,18 @@ directory, and then run the following command at the U-Boot command line: Burn U-Boot images to eMMC -------------------------- -Write two files to the Boot partition 1 of the eMMC device as follows: +Write the following to the Boot partition 1 of the eMMC device: + - spl/u-boot-spl.bin at the offset address 0x00000000 - - u-boot.img at the offset address 0x00010000 + - u-boot.bin at the offset address 0x00010000 + +or + + - u-boot-with-spl.bin at the offset address 0x00000000 If a TFTP server is available, the images can be easily updated. -Just copy the u-boot-spl-dtb.bin and u-boot-dtb.img to the TFTP public -directory, and then run the following command at the U-Boot command line: +Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, +and then run the following command at the U-Boot command line: => run emmcupdate diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 192be7d..018d14f 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -741,7 +741,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op) { uint32_t mode; const int page_count = 1; - uint32_t addr = (uint32_t)denali->buf.dma_buf; + uint64_t addr = (unsigned long)denali->buf.dma_buf; flush_dcache_range(addr, addr + sizeof(denali->buf.dma_buf)); @@ -759,7 +759,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op) index_addr(denali, mode, addr); /* 3. set memory high address bits 64:32 */ - index_addr(denali, mode, 0); + index_addr(denali, mode, addr >> 32); #else mode = MODE_10 | BANK(denali->flash_bank); @@ -769,7 +769,7 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op) index_addr(denali, mode | denali->page, 0x2000 | op | page_count); /* 2. set memory high address bits 23:8 */ - index_addr(denali, mode | ((addr >> 16) << 8), 0x2200); + index_addr(denali, mode | (((addr >> 16) & 0xffff) << 8), 0x2200); /* 3. set memory low address bits 23:8 */ index_addr(denali, mode | ((addr & 0xffff) << 8), 0x2300); diff --git a/drivers/pinctrl/uniphier/Kconfig b/drivers/pinctrl/uniphier/Kconfig index 33d6763..d22d485 100644 --- a/drivers/pinctrl/uniphier/Kconfig +++ b/drivers/pinctrl/uniphier/Kconfig @@ -3,39 +3,39 @@ if ARCH_UNIPHIER config PINCTRL_UNIPHIER bool -config PINCTRL_UNIPHIER_PH1_LD4 +config PINCTRL_UNIPHIER_LD4 bool "UniPhier PH1-LD4 SoC pinctrl driver" - depends on ARCH_UNIPHIER_PH1_LD4 + depends on ARCH_UNIPHIER_LD4 default y select PINCTRL_UNIPHIER -config PINCTRL_UNIPHIER_PH1_PRO4 +config PINCTRL_UNIPHIER_PRO4 bool "UniPhier PH1-Pro4 SoC pinctrl driver" - depends on ARCH_UNIPHIER_PH1_PRO4 + depends on ARCH_UNIPHIER_PRO4 default y select PINCTRL_UNIPHIER -config PINCTRL_UNIPHIER_PH1_SLD8 +config PINCTRL_UNIPHIER_SLD8 bool "UniPhier PH1-sLD8 SoC pinctrl driver" - depends on ARCH_UNIPHIER_PH1_SLD8 + depends on ARCH_UNIPHIER_SLD8 default y select PINCTRL_UNIPHIER -config PINCTRL_UNIPHIER_PH1_PRO5 +config PINCTRL_UNIPHIER_PRO5 bool "UniPhier PH1-Pro5 SoC pinctrl driver" - depends on ARCH_UNIPHIER_PH1_PRO5 + depends on ARCH_UNIPHIER_PRO5 default y select PINCTRL_UNIPHIER -config PINCTRL_UNIPHIER_PROXSTREAM2 +config PINCTRL_UNIPHIER_PXS2 bool "UniPhier ProXstream2 SoC pinctrl driver" - depends on ARCH_UNIPHIER_PROXSTREAM2 + depends on ARCH_UNIPHIER_PXS2 default y select PINCTRL_UNIPHIER -config PINCTRL_UNIPHIER_PH1_LD6B +config PINCTRL_UNIPHIER_LD6B bool "UniPhier PH1-LD6b SoC pinctrl driver" - depends on ARCH_UNIPHIER_PH1_LD6B + depends on ARCH_UNIPHIER_LD6B default y select PINCTRL_UNIPHIER diff --git a/drivers/pinctrl/uniphier/Makefile b/drivers/pinctrl/uniphier/Makefile index 3667bd3..c6cc13d 100644 --- a/drivers/pinctrl/uniphier/Makefile +++ b/drivers/pinctrl/uniphier/Makefile @@ -2,11 +2,11 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += pinctrl-uniphier-core.o +obj-y += pinctrl-uniphier-core.o -obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD4) += pinctrl-ph1-ld4.o -obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO4) += pinctrl-ph1-pro4.o -obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_SLD8) += pinctrl-ph1-sld8.o -obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_PRO5) += pinctrl-ph1-pro5.o -obj-$(CONFIG_PINCTRL_UNIPHIER_PROXSTREAM2) += pinctrl-proxstream2.o -obj-$(CONFIG_PINCTRL_UNIPHIER_PH1_LD6B) += pinctrl-ph1-ld6b.o +obj-$(CONFIG_PINCTRL_UNIPHIER_LD4) += pinctrl-uniphier-ld4.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PRO4) += pinctrl-uniphier-pro4.o +obj-$(CONFIG_PINCTRL_UNIPHIER_SLD8) += pinctrl-uniphier-sld8.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PRO5) += pinctrl-uniphier-pro5.o +obj-$(CONFIG_PINCTRL_UNIPHIER_PXS2) += pinctrl-uniphier-pxs2.o +obj-$(CONFIG_PINCTRL_UNIPHIER_LD6B) += pinctrl-uniphier-ld6b.o diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c index b3d47f0..b3d47f0 100644 --- a/drivers/pinctrl/uniphier/pinctrl-ph1-ld4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld4.c diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c index 8703a21..8703a21 100644 --- a/drivers/pinctrl/uniphier/pinctrl-ph1-ld6b.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-ld6b.c diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c index b3eaf13..b3eaf13 100644 --- a/drivers/pinctrl/uniphier/pinctrl-ph1-pro4.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro4.c diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c index 3749250..3749250 100644 --- a/drivers/pinctrl/uniphier/pinctrl-ph1-pro5.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pro5.c diff --git a/drivers/pinctrl/uniphier/pinctrl-proxstream2.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c index 2cca69d..2cca69d 100644 --- a/drivers/pinctrl/uniphier/pinctrl-proxstream2.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-pxs2.c diff --git a/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c index 5fafdb6..5fafdb6 100644 --- a/drivers/pinctrl/uniphier/pinctrl-ph1-sld8.c +++ b/drivers/pinctrl/uniphier/pinctrl-uniphier-sld8.c diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 92d4212..2a770a1 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig @@ -169,6 +169,15 @@ config DEBUG_UART_PIC32 will need to provide parameters to make this work. The driver will be available until the real driver model serial is running. +config DEBUG_UART_UNIPHIER + bool "UniPhier on-chip UART" + depends on ARCH_UNIPHIER + help + Select this to enable a debug UART using the UniPhier on-chip UART. + You will need to provide DEBUG_UART_BASE to make this work. The + driver will be available until the real driver-model serial is + running. + endchoice config DEBUG_UART_BASE diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index 1a74489..5f3d6b8 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -18,11 +18,6 @@ #define CONFIG_SYS_NS16550_REG_SIZE -2 #endif -/* TODO: move to Kconfig and device tree */ -#if 0 -#define CONFIG_SYS_NS16550_SERIAL -#endif - #define CONFIG_SMC911X /* dummy: referenced by examples/standalone/smc911x_eeprom.c */ @@ -39,7 +34,7 @@ #define CONFIG_SYS_CACHELINE_SIZE 32 -/* Comment out the following to enable L2 cache */ +/* Comment out the following to disable L2 cache */ #define CONFIG_UNIPHIER_L2CACHE_ON #define CONFIG_DISPLAY_CPUINFO @@ -66,6 +61,7 @@ #define CONFIG_SYS_MAX_FLASH_SECT 256 #define CONFIG_SYS_MONITOR_BASE 0 +#define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */ #define CONFIG_SYS_FLASH_BASE 0 /* @@ -126,7 +122,7 @@ #define CONFIG_NAND_DENALI_ECC_SIZE 1024 -#ifdef CONFIG_ARCH_UNIPHIER_PH1_SLD3 +#ifdef CONFIG_ARCH_UNIPHIER_SLD3 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000 #else @@ -238,12 +234,12 @@ "mmc erase 0 800 &&" \ "tftpboot u-boot-spl.bin &&" \ "mmc write $loadaddr 0 80 &&" \ - "tftpboot u-boot.img &&" \ + "tftpboot u-boot.bin &&" \ "mmc write $loadaddr 80 780\0" \ "nandupdate=nand erase 0 0x00100000 &&" \ "tftpboot u-boot-spl.bin &&" \ "nand write $loadaddr 0 0x00010000 &&" \ - "tftpboot u-boot.img &&" \ + "tftpboot u-boot.bin &&" \ "nand write $loadaddr 0x00010000 0x000f0000\0" \ LINUXBOOT_ENV_SETTINGS @@ -252,9 +248,8 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 2 -#if defined(CONFIG_ARCH_UNIPHIER_PH1_SLD3) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_LD4) || \ - defined(CONFIG_ARCH_UNIPHIER_PH1_SLD8) +#if defined(CONFIG_ARCH_UNIPHIER_SLD3) || defined(CONFIG_ARCH_UNIPHIER_LD4) || \ + defined(CONFIG_ARCH_UNIPHIER_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 #else #define CONFIG_SPL_TEXT_BASE 0x00100000 @@ -267,6 +262,7 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_SERIAL_SUPPORT +#define CONFIG_SPL_NOR_SUPPORT #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_MMC_SUPPORT @@ -276,8 +272,12 @@ #define CONFIG_SPL_BOARD_INIT #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000 + +/* subtract sizeof(struct image_header) */ +#define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40) #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80 +#define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ |