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-rw-r--r--board/isee/igep0020/igep0020.c2
-rw-r--r--board/isee/igep0030/igep0030.c2
-rw-r--r--boards.cfg4
-rw-r--r--include/configs/igep0030.h261
-rw-r--r--include/configs/igep00x0.h (renamed from include/configs/igep0020.h)15
5 files changed, 11 insertions, 273 deletions
diff --git a/board/isee/igep0020/igep0020.c b/board/isee/igep0020/igep0020.c
index 1919085..971e31b 100644
--- a/board/isee/igep0020/igep0020.c
+++ b/board/isee/igep0020/igep0020.c
@@ -52,8 +52,6 @@ static const u32 gpmc_lan_config[] = {
int board_init(void)
{
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
- /* board id for Linux */
- gd->bd->bi_arch_number = MACH_TYPE_IGEP0020;
/* boot param addr */
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
diff --git a/board/isee/igep0030/igep0030.c b/board/isee/igep0030/igep0030.c
index 492d9d4..653c1b5 100644
--- a/board/isee/igep0030/igep0030.c
+++ b/board/isee/igep0030/igep0030.c
@@ -39,8 +39,6 @@ DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
- /* board id for Linux */
- gd->bd->bi_arch_number = MACH_TYPE_IGEP0030;
/* boot param addr */
gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
diff --git a/boards.cfg b/boards.cfg
index 4e94197..4d839d2 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -199,8 +199,8 @@ cm_t35 arm armv7 cm_t35 -
omap3_overo arm armv7 overo - omap3
omap3_pandora arm armv7 pandora - omap3
dig297 arm armv7 dig297 comelit omap3
-igep0020 arm armv7 igep0020 isee omap3
-igep0030 arm armv7 igep0030 isee omap3
+igep0020 arm armv7 igep0020 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0020
+igep0030 arm armv7 igep0030 isee omap3 igep00x0:MACH_TYPE=MACH_TYPE_IGEP0030
am3517_evm arm armv7 am3517evm logicpd omap3
mt_ventoux arm armv7 mt_ventoux teejet omap3
omap3_zoom1 arm armv7 zoom1 logicpd omap3
diff --git a/include/configs/igep0030.h b/include/configs/igep0030.h
deleted file mode 100644
index bf39ba5..0000000
--- a/include/configs/igep0030.h
+++ /dev/null
@@ -1,261 +0,0 @@
-/*
- * (C) Copyright 2010
- * ISEE 2007 SL, <www.iseebcn.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-#include <asm/sizes.h>
-
-/*
- * High Level Configuration Options
- */
-#define CONFIG_OMAP 1 /* in a TI OMAP core */
-#define CONFIG_OMAP34XX 1 /* which is a 34XX */
-#define CONFIG_OMAP3_IGEP0030 1 /* working with IGEP0030 */
-
-#define CONFIG_SDRC /* The chip has SDRC controller */
-
-#include <asm/arch/cpu.h>
-#include <asm/arch/omap3.h>
-
-/*
- * Display CPU and Board information
- */
-#define CONFIG_DISPLAY_CPUINFO 1
-#define CONFIG_DISPLAY_BOARDINFO 1
-
-/* Clock Defines */
-#define V_OSCK 26000000 /* Clock output from T2 */
-#define V_SCLK (V_OSCK >> 1)
-
-#define CONFIG_MISC_INIT_R
-
-#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
-#define CONFIG_SETUP_MEMORY_TAGS 1
-#define CONFIG_INITRD_TAG 1
-#define CONFIG_REVISION_TAG 1
-
-#define CONFIG_OF_LIBFDT 1
-
-/*
- * NS16550 Configuration
- */
-
-#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
-
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE (-4)
-#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
-
-/* select serial console configuration */
-#define CONFIG_CONS_INDEX 3
-#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
-#define CONFIG_SERIAL3 3
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
-#define CONFIG_GENERIC_MMC 1
-#define CONFIG_MMC 1
-#define CONFIG_OMAP_HSMMC 1
-#define CONFIG_DOS_PARTITION 1
-
-/* USB */
-#define CONFIG_MUSB_UDC 1
-#define CONFIG_USB_OMAP3 1
-#define CONFIG_TWL4030_USB 1
-
-/* USB device configuration */
-#define CONFIG_USB_DEVICE 1
-#define CONFIG_USB_TTY 1
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
-
-/* Change these to suit your needs */
-#define CONFIG_USBD_VENDORID 0x0451
-#define CONFIG_USBD_PRODUCTID 0x5678
-#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
-#define CONFIG_USBD_PRODUCT_NAME "IGEP"
-
-/* commands to include */
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_EXT2 /* EXT2 Support */
-#define CONFIG_CMD_FAT /* FAT support */
-#define CONFIG_CMD_I2C /* I2C serial bus support */
-#define CONFIG_CMD_MMC /* MMC support */
-#define CONFIG_CMD_ONENAND /* ONENAND support */
-#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
-#define CONFIG_MTD_DEVICE
-
-#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
-#undef CONFIG_CMD_NFS /* nfs */
-#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
-#undef CONFIG_CMD_IMLS /* List all found images */
-
-#define CONFIG_SYS_NO_FLASH
-#define CONFIG_HARD_I2C 1
-#define CONFIG_SYS_I2C_SPEED 100000
-#define CONFIG_SYS_I2C_SLAVE 1
-#define CONFIG_SYS_I2C_BUS 0
-#define CONFIG_SYS_I2C_BUS_SELECT 1
-#define CONFIG_DRIVER_OMAP34XX_I2C 1
-
-/*
- * TWL4030
- */
-#define CONFIG_TWL4030_POWER 1
-
-#define CONFIG_BOOTDELAY 3
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "usbtty=cdc_acm\0" \
- "loadaddr=0x82000000\0" \
- "usbtty=cdc_acm\0" \
- "console=ttyS2,115200n8\0" \
- "mpurate=500\0" \
- "vram=12M\0" \
- "dvimode=1024x768MR-16@60\0" \
- "defaultdisplay=dvi\0" \
- "mmcdev=0\0" \
- "mmcroot=/dev/mmcblk0p2 rw\0" \
- "mmcrootfstype=ext3 rootwait\0" \
- "nandroot=/dev/mtdblock4 rw\0" \
- "nandrootfstype=jffs2\0" \
- "mmcargs=setenv bootargs console=${console} " \
- "mpurate=${mpurate} " \
- "vram=${vram} " \
- "omapfb.mode=dvi:${dvimode} " \
- "omapfb.debug=y " \
- "omapdss.def_disp=${defaultdisplay} " \
- "root=${mmcroot} " \
- "rootfstype=${mmcrootfstype}\0" \
- "nandargs=setenv bootargs console=${console} " \
- "mpurate=${mpurate} " \
- "vram=${vram} " \
- "omapfb.mode=dvi:${dvimode} " \
- "omapfb.debug=y " \
- "omapdss.def_disp=${defaultdisplay} " \
- "root=${nandroot} " \
- "rootfstype=${nandrootfstype}\0" \
- "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
- "bootscript=echo Running bootscript from mmc ...; " \
- "source ${loadaddr}\0" \
- "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
- "mmcboot=echo Booting from mmc ...; " \
- "run mmcargs; " \
- "bootm ${loadaddr}\0" \
- "nandboot=echo Booting from onenand ...; " \
- "run nandargs; " \
- "onenand read ${loadaddr} 280000 400000; " \
- "bootm ${loadaddr}\0" \
-
-#define CONFIG_BOOTCOMMAND \
- "if mmc rescan ${mmcdev}; then " \
- "if run loadbootscript; then " \
- "run bootscript; " \
- "else " \
- "if run loaduimage; then " \
- "run mmcboot; " \
- "else run nandboot; " \
- "fi; " \
- "fi; " \
- "else run nandboot; fi"
-
-#define CONFIG_AUTO_COMPLETE 1
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
-#define CONFIG_SYS_PROMPT "U-Boot # "
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-/* Print Buffer Size */
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
- sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-/* Boot Argument Buffer Size */
-#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
-
-#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
- /* works on */
-#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
- 0x01F00000) /* 31MB */
-
-#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
- /* load address */
-
-#define CONFIG_SYS_MONITOR_LEN (256 << 10)
-
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
-#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
-#define CONFIG_SYS_HZ 1000
-
-/*
- * Stack sizes
- *
- * The stack sizes are set up in start.S using the settings below
- */
-#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
-
-/*
- * Physical Memory Map
- *
- */
-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
-#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 meg */
-#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
-
-/*
- * FLASH and environment organization
- */
-
-#define PISMO1_ONEN_SIZE GPMC_SIZE_128M /* Configure the PISMO */
-
-#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
-
-#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
-
-#define CONFIG_ENV_IS_IN_ONENAND 1
-#define CONFIG_ENV_SIZE (512 << 10) /* Total Size Environment */
-#define CONFIG_ENV_ADDR ONENAND_ENV_OFFSET
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
-
-#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE 0x800
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - \
- GENERATED_GBL_DATA_SIZE)
-
-#endif /* __CONFIG_H */
diff --git a/include/configs/igep0020.h b/include/configs/igep00x0.h
index c2fcdff..d2b4b84 100644
--- a/include/configs/igep0020.h
+++ b/include/configs/igep00x0.h
@@ -1,5 +1,7 @@
/*
- * (C) Copyright 2010
+ * Common configuration settings for IGEP technology based boards
+ *
+ * (C) Copyright 2012
* ISEE 2007 SL, <www.iseebcn.com>
*
* This program is free software; you can redistribute it and/or
@@ -18,8 +20,9 @@
* MA 02111-1307 USA
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __IGEP00X0_H
+#define __IGEP00X0_H
+
#include <asm/sizes.h>
/*
@@ -27,7 +30,6 @@
*/
#define CONFIG_OMAP 1 /* in a TI OMAP core */
#define CONFIG_OMAP34XX 1 /* which is a 34XX */
-#define CONFIG_OMAP3_IGEP0020 1 /* working with IGEP0020 */
#define CONFIG_SDRC /* The chip has SDRC controller */
@@ -72,7 +74,8 @@
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
+#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
+ 115200}
#define CONFIG_GENERIC_MMC 1
#define CONFIG_MMC 1
#define CONFIG_OMAP_HSMMC 1
@@ -269,4 +272,4 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
-#endif /* __CONFIG_H */
+#endif /* __IGEP00X0_H */