diff options
71 files changed, 918 insertions, 194 deletions
@@ -827,7 +827,6 @@ The following options need to be configured: CONFIG_CMD_BOOTI * ARM64 Linux kernel Image support CONFIG_CMD_CACHE * icache, dcache CONFIG_CMD_CONSOLE coninfo - CONFIG_CMD_CRC32 * crc32 CONFIG_CMD_DHCP * DHCP support CONFIG_CMD_DIAG * Diagnostics CONFIG_CMD_ECHO echo arguments @@ -889,8 +888,6 @@ The following options need to be configured: CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) CONFIG_CMD_SF * Read/write/erase SPI NOR flash - CONFIG_CMD_SHA1SUM * print sha1 memory digest - (requires CONFIG_CMD_MEMORY) CONFIG_CMD_SOFTSWITCH * Soft switch setting command for BF60x CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support @@ -2679,15 +2676,6 @@ The following options need to be configured: A better solution is to properly configure the firewall, but sometimes that is not allowed. -- Hashing support: - CONFIG_HASH_VERIFY - - Enable the hash verify command (hash -v). This adds to code - size a little. - - Note: There is also a sha1sum command, which should perhaps - be deprecated in favour of 'hash sha1'. - - bootcount support: CONFIG_BOOTCOUNT_LIMIT diff --git a/arch/Kconfig b/arch/Kconfig index 02e887a..e0e4e84 100644 --- a/arch/Kconfig +++ b/arch/Kconfig @@ -70,12 +70,14 @@ config SANDBOX select DM_SPI select DM_GPIO select DM_MMC + imply CRC32_VERIFY imply CMD_GETTIME imply CMD_HASH imply CMD_IO imply CMD_IOTRACE imply LZMA imply CMD_LZMADEC + imply HASH_VERIFY config SH bool "SuperH architecture" diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 91f50b0..a8118ce 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -495,15 +495,19 @@ config TARGET_VEXPRESS_CA9X4 config TARGET_BCM23550_W1D bool "Support bcm23550_w1d" select CPU_V7 + imply CRC32_VERIFY config TARGET_BCM28155_AP bool "Support bcm28155_ap" select CPU_V7 + imply CRC32_VERIFY config TARGET_BCMCYGNUS bool "Support bcmcygnus" select CPU_V7 + imply CRC32_VERIFY imply CMD_HASH + imply HASH_VERIFY config TARGET_BCMNSP bool "Support bcmnsp" @@ -629,6 +633,7 @@ config ARCH_SOCFPGA select ARCH_MISC_INIT select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION select SYS_THUMB_BUILD + imply CRC32_VERIFY config ARCH_SUNXI bool "Support sunxi (Allwinner) SoCs" diff --git a/arch/arm/dts/armada-3720-db.dts b/arch/arm/dts/armada-3720-db.dts index 85761af..5f06252 100644 --- a/arch/arm/dts/armada-3720-db.dts +++ b/arch/arm/dts/armada-3720-db.dts @@ -81,11 +81,15 @@ }; ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; status = "okay"; phy-mode = "rgmii"; }; &i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; status = "okay"; }; @@ -117,6 +121,8 @@ &spi0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_quad_pins>; spi-flash@0 { #address-cells = <1>; @@ -130,6 +136,8 @@ /* Exported on the micro USB connector CON32 through an FTDI */ &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; status = "okay"; }; diff --git a/arch/arm/dts/armada-37xx.dtsi b/arch/arm/dts/armada-37xx.dtsi index 5bea63b..6902342 100644 --- a/arch/arm/dts/armada-37xx.dtsi +++ b/arch/arm/dts/armada-37xx.dtsi @@ -106,6 +106,79 @@ status = "disabled"; }; + pinctrl_nb: pinctrl-nb@13800 { + compatible = "marvell,armada3710-nb-pinctrl", + "syscon", "simple-mfd"; + reg = <0x13800 0x100>, <0x13C00 0x20>; + gpionb: gpionb { + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_nb 0 0 36>; + gpio-controller; + interrupts = + <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; + + }; + + spi_quad_pins: spi-quad-pins { + groups = "spi_quad"; + function = "spi"; + }; + + i2c1_pins: i2c1-pins { + groups = "i2c1"; + function = "i2c"; + }; + + i2c2_pins: i2c2-pins { + groups = "i2c2"; + function = "i2c"; + }; + + uart1_pins: uart1-pins { + groups = "uart1"; + function = "uart"; + }; + + uart2_pins: uart2-pins { + groups = "uart2"; + function = "uart"; + }; + }; + + pinctrl_sb: pinctrl-sb@18800 { + compatible = "marvell,armada3710-sb-pinctrl", + "syscon", "simple-mfd"; + reg = <0x18800 0x100>, <0x18C00 0x20>; + gpiosb: gpiosb { + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_sb 0 0 29>; + gpio-controller; + interrupts = + <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; + }; + + rgmii_pins: mii-pins { + groups = "rgmii"; + function = "mii"; + }; + + }; + usb3: usb@58000 { compatible = "marvell,armada3700-xhci", "generic-xhci"; diff --git a/arch/arm/dts/armada-7040-db.dts b/arch/arm/dts/armada-7040-db.dts index b140b34..cfd2b4b 100644 --- a/arch/arm/dts/armada-7040-db.dts +++ b/arch/arm/dts/armada-7040-db.dts @@ -169,8 +169,7 @@ }; phy2 { - phy-type = <PHY_TYPE_SGMII0>; - phy-speed = <PHY_SPEED_1_25G>; + phy-type = <PHY_TYPE_SFI>; }; phy3 { @@ -224,6 +223,11 @@ status = "okay"; }; +&cpm_eth0 { + status = "okay"; + phy-mode = "sfi"; /* lane-2 */ +}; + &cpm_eth1 { status = "okay"; phy = <&phy0>; diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 5b6c5ea..c57935e 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -18,7 +18,9 @@ config ARCH_EXYNOS5 select CPU_V7 select BOARD_EARLY_INIT_F select SHA_HW_ACCEL + imply CRC32_VERIFY imply CMD_HASH + imply HASH_VERIFY help Samsung Exynos5 SoC family are based on ARM Cortex-A15 CPU (and Cortex-A7 CPU in big.LITTLE configuration). There are multiple SoCs diff --git a/arch/arm/mach-mvebu/arm64-common.c b/arch/arm/mach-mvebu/arm64-common.c index c2c176e..69cb21d 100644 --- a/arch/arm/mach-mvebu/arm64-common.c +++ b/arch/arm/mach-mvebu/arm64-common.c @@ -46,76 +46,18 @@ const struct mbus_dram_target_info *mvebu_mbus_dram_info(void) /* DRAM init code ... */ -static const void *get_memory_reg_prop(const void *fdt, int *lenp) +int dram_init_banksize(void) { - int offset; - - offset = fdt_path_offset(fdt, "/memory"); - if (offset < 0) - return NULL; + fdtdec_setup_memory_banksize(); - return fdt_getprop(fdt, offset, "reg", lenp); + return 0; } int dram_init(void) { - const void *fdt = gd->fdt_blob; - const fdt32_t *val; - int ac, sc, len; - - ac = fdt_address_cells(fdt, 0); - sc = fdt_size_cells(fdt, 0); - if (ac < 0 || sc < 1 || sc > 2) { - printf("invalid address/size cells\n"); - return -EINVAL; - } - - val = get_memory_reg_prop(fdt, &len); - if (len / sizeof(*val) < ac + sc) + if (fdtdec_setup_memory_size() != 0) return -EINVAL; - val += ac; - - gd->ram_size = fdtdec_get_number(val, sc); - - debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size); - - return 0; -} - -int dram_init_banksize(void) -{ - const void *fdt = gd->fdt_blob; - const fdt32_t *val; - int ac, sc, cells, len, i; - - val = get_memory_reg_prop(fdt, &len); - if (len < 0) - return -ENXIO; - - ac = fdt_address_cells(fdt, 0); - sc = fdt_size_cells(fdt, 0); - if (ac < 1 || ac > 2 || sc < 1 || sc > 2) { - printf("invalid address/size cells\n"); - return -ENXIO; - } - - cells = ac + sc; - - len /= sizeof(*val); - - for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells; - i++, len -= cells) { - gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac); - val += ac; - gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc); - val += sc; - - debug("DRAM bank %d: start = %08lx, size = %08lx\n", - i, (unsigned long)gd->bd->bi_dram[i].start, - (unsigned long)gd->bd->bi_dram[i].size); - } - return 0; } diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 940257b..89d2a49 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -38,6 +38,7 @@ config TEGRA_COMMON select OF_CONTROL select VIDCONSOLE_AS_LCD if DM_VIDEO select BOARD_EARLY_INIT_F + imply CRC32_VERIFY config TEGRA_NO_BPMP bool "Tegra common options for SoCs without BPMP" diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c index 2773f59..3a8257c 100644 --- a/board/solidrun/clearfog/clearfog.c +++ b/board/solidrun/clearfog/clearfog.c @@ -131,8 +131,12 @@ int board_init(void) /* Toggle GPIO41 to reset onboard switch and phy */ clrbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); clrbits_le32(MVEBU_GPIO1_BASE + 0x4, BIT(9)); + /* GPIO 19 on ClearFog rev 2.1 controls the uSOM onboard phy reset */ + clrbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); + clrbits_le32(MVEBU_GPIO0_BASE + 0x4, BIT(19)); mdelay(1); setbits_le32(MVEBU_GPIO1_BASE + 0x0, BIT(9)); + setbits_le32(MVEBU_GPIO0_BASE + 0x0, BIT(19)); mdelay(10); /* Init I2C IO expanders */ diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index 1187cf5..e35afa0 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -18,6 +18,7 @@ config TI_COMMON_CMD_OPTIONS bool "Enable cmd options on TI platforms" imply CMD_ASKENV imply CMD_BOOTZ + imply CRC32_VERIFY if ARCH_KEYSTONE imply CMD_DFU if USB_GADGET_DOWNLOAD imply CMD_DHCP imply CMD_EEPROM diff --git a/cmd/Kconfig b/cmd/Kconfig index 5ee52f6..6f75b86 100644 --- a/cmd/Kconfig +++ b/cmd/Kconfig @@ -355,6 +355,12 @@ config CMD_CRC32 help Compute CRC32. +config CRC32_VERIFY + bool "crc32 -v" + depends on CMD_CRC32 + help + Add -v option to verify data against a crc32 checksum. + config CMD_EEPROM bool "eeprom - EEPROM subsystem" help @@ -410,13 +416,25 @@ config CMD_MD5SUM help Compute MD5 checksum. -config MD5SUM_VERFIY +config MD5SUM_VERIFY bool "md5sum -v" default n depends on CMD_MD5SUM help Add -v option to verify data against an MD5 checksum. +config CMD_SHA1SUM + bool "sha1sum" + select SHA1 + help + Compute SHA1 checksum. + +config SHA1SUM_VERIFY + bool "sha1sum -v" + depends on CMD_SHA1SUM + help + Add -v option to verify data against a SHA1 checksum. + config LOOPW bool "loopw" help @@ -1068,6 +1086,12 @@ config CMD_HASH saved to memory or to an environment variable. It is also possible to verify a hash against data in memory. +config HASH_VERIFY + bool "hash -v" + depends on CMD_HASH + help + Add -v option to verify data against a hash. + config CMD_TPM bool "Enable the 'tpm' command" depends on TPM @@ -1160,7 +1160,7 @@ static int do_mem_crc(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) av = argv + 1; ac = argc - 1; -#ifdef CONFIG_HASH_VERIFY +#ifdef CONFIG_CRC32_VERIFY if (strcmp(*av, "-v") == 0) { flags |= HASH_FLAG_VERIFY | HASH_FLAG_ENV; av++; @@ -1238,7 +1238,7 @@ U_BOOT_CMD( #ifdef CONFIG_CMD_CRC32 -#ifndef CONFIG_HASH_VERIFY +#ifndef CONFIG_CRC32_VERIFY U_BOOT_CMD( crc32, 4, 1, do_mem_crc, @@ -1246,7 +1246,7 @@ U_BOOT_CMD( "address count [addr]\n - compute CRC32 checksum [save at addr]" ); -#else /* CONFIG_HASH_VERIFY */ +#else /* CONFIG_CRC32_VERIFY */ U_BOOT_CMD( crc32, 5, 1, do_mem_crc, @@ -1255,7 +1255,7 @@ U_BOOT_CMD( "-v address count crc\n - verify crc of memory area" ); -#endif /* CONFIG_HASH_VERIFY */ +#endif /* CONFIG_CRC32_VERIFY */ #endif diff --git a/common/hash.c b/common/hash.c index a0eded9..771d8fa 100644 --- a/common/hash.c +++ b/common/hash.c @@ -178,16 +178,9 @@ static struct hash_algo hash_algo[] = { }, }; -#if defined(CONFIG_SHA256) || defined(CONFIG_CMD_SHA1SUM) -#define MULTI_HASH -#endif - -#if defined(CONFIG_HASH_VERIFY) || defined(CONFIG_CMD_HASH) -#define MULTI_HASH -#endif - /* Try to minimize code size for boards that don't want much hashing */ -#ifdef MULTI_HASH +#if defined(CONFIG_SHA256) || defined(CONFIG_CMD_SHA1SUM) || \ + defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_CMD_HASH) #define multi_hash() 1 #else #define multi_hash() 0 @@ -424,7 +417,8 @@ int hash_command(const char *algo_name, int flags, cmd_tbl_t *cmdtp, int flag, unmap_sysmem(buf); /* Try to avoid code bloat when verify is not needed */ -#ifdef CONFIG_HASH_VERIFY +#if defined(CONFIG_CRC32_VERIFY) || defined(CONFIG_SHA1SUM_VERIFY) || \ + defined(CONFIG_HASH_VERIFY) if (flags & HASH_FLAG_VERIFY) { #else if (0) { diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig index f586773..c712cf9 100644 --- a/configs/apalis_imx6_defconfig +++ b/configs/apalis_imx6_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/apalis_imx6_nospl_com_defconfig b/configs/apalis_imx6_nospl_com_defconfig index 42abbbd..f5f4e3d 100644 --- a/configs/apalis_imx6_nospl_com_defconfig +++ b/configs/apalis_imx6_nospl_com_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/apalis_imx6_nospl_it_defconfig b/configs/apalis_imx6_nospl_it_defconfig index 18f0d02..0de47fe 100644 --- a/configs/apalis_imx6_nospl_it_defconfig +++ b/configs/apalis_imx6_nospl_it_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/bcm958622hr_defconfig b/configs/bcm958622hr_defconfig index c2713c6..67e18b6 100644 --- a/configs/bcm958622hr_defconfig +++ b/configs/bcm958622hr_defconfig @@ -13,7 +13,9 @@ CONFIG_CMD_ASKENV=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_HASH=y +CONFIG_HASH_VERIFY=y CONFIG_CMD_FAT=y # CONFIG_MMC is not set CONFIG_SYS_NS16550=y diff --git a/configs/calimain_defconfig b/configs/calimain_defconfig index 489d85f..48422dd 100644 --- a/configs/calimain_defconfig +++ b/configs/calimain_defconfig @@ -10,6 +10,7 @@ CONFIG_SYS_PROMPT="Calimain > " CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_STOP_STR="\x0b" CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index 1264871..0975068 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -8,14 +8,13 @@ CONFIG_SPL_MMC_SUPPORT=y CONFIG_SPL_SERIAL_SUPPORT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" +CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=3 CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_SPL=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x141 CONFIG_SPL_I2C_SUPPORT=y -CONFIG_HUSH_PARSER=y -CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y @@ -25,15 +24,8 @@ CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y -CONFIG_CMD_DHCP=y -CONFIG_CMD_MII=y -CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y -CONFIG_CMD_EXT2=y -CONFIG_CMD_EXT4=y -CONFIG_CMD_FAT=y -CONFIG_CMD_FS_GENERIC=y CONFIG_EFI_PARTITION=y # CONFIG_PARTITION_UUIDS is not set # CONFIG_SPL_PARTITION_UUIDS is not set diff --git a/configs/colibri_imx6_defconfig b/configs/colibri_imx6_defconfig index 6c10576..fcb7c53 100644 --- a/configs/colibri_imx6_defconfig +++ b/configs/colibri_imx6_defconfig @@ -24,6 +24,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/colibri_imx6_nospl_defconfig b/configs/colibri_imx6_nospl_defconfig index bd2ac24..fbf9306 100644 --- a/configs/colibri_imx6_nospl_defconfig +++ b/configs/colibri_imx6_nospl_defconfig @@ -17,6 +17,7 @@ CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_XIMG is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/da850_am18xxevm_defconfig b/configs/da850_am18xxevm_defconfig index bb92c43..74b3f03 100644 --- a/configs/da850_am18xxevm_defconfig +++ b/configs/da850_am18xxevm_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 1120182..3745b85 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_BOOTZ=y # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 1e17ce7..99543d3 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -10,6 +10,7 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_SF=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/ea20_defconfig b/configs/ea20_defconfig index be48626..4ee7d5a 100644 --- a/configs/ea20_defconfig +++ b/configs/ea20_defconfig @@ -15,6 +15,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="ea20 > " # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_SF=y CONFIG_CMD_SPI=y diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index b6b1b4b..851dba2 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -21,6 +21,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6qdl_icore_rqs_mmc_defconfig b/configs/imx6qdl_icore_rqs_mmc_defconfig index 08e6784..b6a43ae 100644 --- a/configs/imx6qdl_icore_rqs_mmc_defconfig +++ b/configs/imx6qdl_icore_rqs_mmc_defconfig @@ -20,6 +20,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="icorem6qdl-rqs> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6ul_geam_mmc_defconfig b/configs/imx6ul_geam_mmc_defconfig index 8751a36..acaed60 100644 --- a/configs/imx6ul_geam_mmc_defconfig +++ b/configs/imx6ul_geam_mmc_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6ul_geam_nand_defconfig b/configs/imx6ul_geam_nand_defconfig index 704c0c0..baf1a73 100644 --- a/configs/imx6ul_geam_nand_defconfig +++ b/configs/imx6ul_geam_nand_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="geam6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/imx6ul_isiot_emmc_defconfig b/configs/imx6ul_isiot_emmc_defconfig index 1f501cb..4b429c2 100644 --- a/configs/imx6ul_isiot_emmc_defconfig +++ b/configs/imx6ul_isiot_emmc_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_GPIO=y diff --git a/configs/imx6ul_isiot_mmc_defconfig b/configs/imx6ul_isiot_mmc_defconfig index 5214479..424089c 100644 --- a/configs/imx6ul_isiot_mmc_defconfig +++ b/configs/imx6ul_isiot_mmc_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_EXT_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_I2C=y diff --git a/configs/imx6ul_isiot_nand_defconfig b/configs/imx6ul_isiot_nand_defconfig index 1b28336..fb2bef9 100644 --- a/configs/imx6ul_isiot_nand_defconfig +++ b/configs/imx6ul_isiot_nand_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_DMA_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="isiotmx6ul> " # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y CONFIG_CMD_MEMTEST=y CONFIG_CMD_MMC=y CONFIG_CMD_NAND=y diff --git a/configs/ipam390_defconfig b/configs/ipam390_defconfig index 705236e..3c32a6b 100644 --- a/configs/ipam390_defconfig +++ b/configs/ipam390_defconfig @@ -17,6 +17,7 @@ CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot > " # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_DHCP=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 86ff6a1..589e8cf 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -12,6 +12,7 @@ CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds - press 'l' to stop...\n" CONFIG_AUTOBOOT_STOP_STR="l" # CONFIG_CMD_IMLS is not set CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y CONFIG_CMD_SF=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 4ea142c..349c2ce 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -19,6 +19,7 @@ CONFIG_CMD_SPI=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y # CONFIG_CMD_FPGA is not set +CONFIG_CMD_GPIO=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y CONFIG_CMD_DHCP=y @@ -35,6 +36,8 @@ CONFIG_MAC_PARTITION=y CONFIG_ISO_PARTITION=y CONFIG_EFI_PARTITION=y CONFIG_BLOCK_CACHE=y +CONFIG_DM_GPIO=y +# CONFIG_MVEBU_GPIO is not set CONFIG_DM_I2C=y CONFIG_MISC=y CONFIG_DM_MMC=y @@ -47,6 +50,8 @@ CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_PHYLIB=y CONFIG_MVEBU_COMPHY_SUPPORT=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_37XX=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_UART=y CONFIG_DEBUG_MVEBU_A3700_UART=y diff --git a/configs/mvebu_db-88f7040-nand_defconfig b/configs/mvebu_db-88f7040-nand_defconfig index d86c18e..8d48cb6 100644 --- a/configs/mvebu_db-88f7040-nand_defconfig +++ b/configs/mvebu_db-88f7040-nand_defconfig @@ -7,7 +7,6 @@ CONFIG_SMBIOS_PRODUCT_NAME="" CONFIG_AHCI=y # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y -CONFIG_BOARD_LATE_INIT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_ARCH_EARLY_INIT_R=y @@ -16,12 +15,12 @@ CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set # CONFIG_CMD_FLASH is not set CONFIG_CMD_MMC=y +CONFIG_CMD_NAND=y CONFIG_CMD_PART=y CONFIG_CMD_SF=y CONFIG_CMD_SPI=y CONFIG_CMD_I2C=y CONFIG_CMD_USB=y -CONFIG_CMD_NAND=y # CONFIG_CMD_FPGA is not set # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TFTPPUT=y @@ -31,6 +30,7 @@ CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y CONFIG_CMD_TIME=y CONFIG_CMD_MVEBU_BUBT=y +CONFIG_MVEBU_NAND_BOOT=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y CONFIG_CMD_FAT=y @@ -45,18 +45,18 @@ CONFIG_MISC=y CONFIG_DM_MMC=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_XENON=y +CONFIG_NAND_PXA3XX=y CONFIG_SPI_FLASH=y CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_STMICRO=y -CONFIG_MVEBU_NAND_BOOT=y -CONFIG_NAND_PXA3XX=y CONFIG_PHYLIB=y CONFIG_PCI=y CONFIG_DM_PCI=y CONFIG_PCIE_DW_MVEBU=y CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_8K=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xf0512000 diff --git a/configs/mvebu_db-88f7040_defconfig b/configs/mvebu_db-88f7040_defconfig index 797eabb..9f7b2c4 100644 --- a/configs/mvebu_db-88f7040_defconfig +++ b/configs/mvebu_db-88f7040_defconfig @@ -54,6 +54,7 @@ CONFIG_DM_PCI=y CONFIG_PCIE_DW_MVEBU=y CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_8K=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xf0512000 diff --git a/configs/mvebu_db-88f8040_defconfig b/configs/mvebu_db-88f8040_defconfig index 046da09..c21c977 100644 --- a/configs/mvebu_db-88f8040_defconfig +++ b/configs/mvebu_db-88f8040_defconfig @@ -54,6 +54,7 @@ CONFIG_DM_PCI=y CONFIG_PCIE_DW_MVEBU=y CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_8K=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_UART=y CONFIG_DEBUG_UART_BASE=0xf0512000 diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index 7254920..4a7c592 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -57,6 +57,7 @@ CONFIG_DM_PCI=y CONFIG_PCIE_DW_MVEBU=y CONFIG_MVEBU_COMPHY_SUPPORT=y CONFIG_PINCTRL=y +CONFIG_PINCTRL_ARMADA_8K=y CONFIG_DM_REGULATOR_FIXED=y # CONFIG_SPL_SERIAL_PRESENT is not set CONFIG_DEBUG_UART=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index ff5e06d..354438e 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xb5 CONFIG_HUSH_PARSER=y # CONFIG_CMD_IMLS is not set +CONFIG_CRC32_VERIFY=y # CONFIG_CMD_EEPROM is not set # CONFIG_CMD_FLASH is not set # CONFIG_CMD_GPIO is not set diff --git a/configs/xtfpga_defconfig b/configs/xtfpga_defconfig index c797c25..9f85d63 100644 --- a/configs/xtfpga_defconfig +++ b/configs/xtfpga_defconfig @@ -8,6 +8,7 @@ CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press <SPACE> to stop\n" CONFIG_AUTOBOOT_STOP_STR=" " CONFIG_CMD_ASKENV=y +CONFIG_CRC32_VERIFY=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_DIAG=y diff --git a/drivers/pinctrl/Makefile b/drivers/pinctrl/Makefile index 1e5c425..64da7c6 100644 --- a/drivers/pinctrl/Makefile +++ b/drivers/pinctrl/Makefile @@ -17,7 +17,7 @@ obj-$(CONFIG_PINCTRL_UNIPHIER) += uniphier/ obj-$(CONFIG_PINCTRL_PIC32) += pinctrl_pic32.o obj-$(CONFIG_PINCTRL_EXYNOS) += exynos/ obj-$(CONFIG_PINCTRL_MESON) += meson/ -obj-$(CONFIG_PINCTRL_MVEBU) += mvebu/ +obj-$(CONFIG_ARCH_MVEBU) += mvebu/ obj-$(CONFIG_PINCTRL_SINGLE) += pinctrl-single.o obj-$(CONFIG_PINCTRL_STI) += pinctrl-sti.o obj-$(CONFIG_PINCTRL_STM32) += pinctrl_stm32.o diff --git a/drivers/pinctrl/mvebu/Kconfig b/drivers/pinctrl/mvebu/Kconfig index cf9c299..a9388ff 100644 --- a/drivers/pinctrl/mvebu/Kconfig +++ b/drivers/pinctrl/mvebu/Kconfig @@ -1,7 +1,17 @@ -config PINCTRL_MVEBU - depends on ARCH_MVEBU - bool - default y +if ARCH_MVEBU + +config PINCTRL_ARMADA_37XX + depends on ARMADA_3700 + bool "Armada 37xx pin control driver" + help + Support pin multiplexing and pin configuration control on + Marvell's Armada-37xx SoC. + +config PINCTRL_ARMADA_8K + depends on ARMADA_8K + bool "Armada 7k/8k pin control driver" help Support pin multiplexing and pin configuration control on Marvell's Armada-8K SoC. + +endif diff --git a/drivers/pinctrl/mvebu/Makefile b/drivers/pinctrl/mvebu/Makefile index f4f7864..13a38d5 100644 --- a/drivers/pinctrl/mvebu/Makefile +++ b/drivers/pinctrl/mvebu/Makefile @@ -4,4 +4,5 @@ # SPDX-License-Identifier: GPL-2.0 # https://spdx.org/licenses -obj-$(CONFIG_PINCTRL_MVEBU) += pinctrl-mvebu.o +obj-$(CONFIG_PINCTRL_ARMADA_37XX) += pinctrl-armada-37xx.o +obj-$(CONFIG_PINCTRL_ARMADA_8K) += pinctrl-mvebu.o diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c new file mode 100644 index 0000000..630cedf --- /dev/null +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -0,0 +1,631 @@ +/* + * U-Boot Marvell 37xx SoC pinctrl driver + * + * Copyright (C) 2017 Stefan Roese <sr@denx.de> + * + * This driver is based on the Linux driver version, which is: + * Copyright (C) 2017 Marvell + * Gregory CLEMENT <gregory.clement@free-electrons.com> + * + * Additionally parts are derived from the Meson U-Boot pinctrl driver, + * which is: + * (C) Copyright 2016 - Beniamino Galvani <b.galvani@gmail.com> + * Based on code from Linux kernel: + * Copyright (C) 2016 Endless Mobile, Inc. + * + * SPDX-License-Identifier: GPL-2.0+ + * https://spdx.org/licenses + */ + +#include <common.h> +#include <config.h> +#include <dm.h> +#include <dm/device-internal.h> +#include <dm/lists.h> +#include <dm/pinctrl.h> +#include <dm/root.h> +#include <errno.h> +#include <fdtdec.h> +#include <regmap.h> +#include <asm/gpio.h> +#include <asm/system.h> +#include <asm/io.h> + +DECLARE_GLOBAL_DATA_PTR; + +#define OUTPUT_EN 0x0 +#define INPUT_VAL 0x10 +#define OUTPUT_VAL 0x18 +#define OUTPUT_CTL 0x20 +#define SELECTION 0x30 + +#define IRQ_EN 0x0 +#define IRQ_POL 0x08 +#define IRQ_STATUS 0x10 +#define IRQ_WKUP 0x18 + +#define NB_FUNCS 2 +#define GPIO_PER_REG 32 + +/** + * struct armada_37xx_pin_group: represents group of pins of a pinmux function. + * The pins of a pinmux groups are composed of one or two groups of contiguous + * pins. + * @name: Name of the pin group, used to lookup the group. + * @start_pins: Index of the first pin of the main range of pins belonging to + * the group + * @npins: Number of pins included in the first range + * @reg_mask: Bit mask matching the group in the selection register + * @extra_pins: Index of the first pin of the optional second range of pins + * belonging to the group + * @npins: Number of pins included in the second optional range + * @funcs: A list of pinmux functions that can be selected for this group. + * @pins: List of the pins included in the group + */ +struct armada_37xx_pin_group { + const char *name; + unsigned int start_pin; + unsigned int npins; + u32 reg_mask; + u32 val[NB_FUNCS]; + unsigned int extra_pin; + unsigned int extra_npins; + const char *funcs[NB_FUNCS]; + unsigned int *pins; +}; + +struct armada_37xx_pin_data { + u8 nr_pins; + char *name; + struct armada_37xx_pin_group *groups; + int ngroups; +}; + +struct armada_37xx_pmx_func { + const char *name; + const char **groups; + unsigned int ngroups; +}; + +struct armada_37xx_pinctrl { + void __iomem *base; + const struct armada_37xx_pin_data *data; + struct udevice *dev; + struct pinctrl_dev *pctl_dev; + struct armada_37xx_pin_group *groups; + unsigned int ngroups; + struct armada_37xx_pmx_func *funcs; + unsigned int nfuncs; +}; + +#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2) \ + { \ + .name = _name, \ + .start_pin = _start, \ + .npins = _nr, \ + .reg_mask = _mask, \ + .val = {0, _mask}, \ + .funcs = {_func1, _func2} \ + } + +#define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1) \ + { \ + .name = _name, \ + .start_pin = _start, \ + .npins = _nr, \ + .reg_mask = _mask, \ + .val = {0, _mask}, \ + .funcs = {_func1, "gpio"} \ + } + +#define PIN_GRP_GPIO_2(_name, _start, _nr, _mask, _val1, _val2, _func1) \ + { \ + .name = _name, \ + .start_pin = _start, \ + .npins = _nr, \ + .reg_mask = _mask, \ + .val = {_val1, _val2}, \ + .funcs = {_func1, "gpio"} \ + } + +#define PIN_GRP_EXTRA(_name, _start, _nr, _mask, _v1, _v2, _start2, _nr2, \ + _f1, _f2) \ + { \ + .name = _name, \ + .start_pin = _start, \ + .npins = _nr, \ + .reg_mask = _mask, \ + .val = {_v1, _v2}, \ + .extra_pin = _start2, \ + .extra_npins = _nr2, \ + .funcs = {_f1, _f2} \ + } + +static struct armada_37xx_pin_group armada_37xx_nb_groups[] = { + PIN_GRP_GPIO("jtag", 20, 5, BIT(0), "jtag"), + PIN_GRP_GPIO("sdio0", 8, 3, BIT(1), "sdio"), + PIN_GRP_GPIO("emmc_nb", 27, 9, BIT(2), "emmc"), + PIN_GRP_GPIO("pwm0", 11, 1, BIT(3), "pwm"), + PIN_GRP_GPIO("pwm1", 12, 1, BIT(4), "pwm"), + PIN_GRP_GPIO("pwm2", 13, 1, BIT(5), "pwm"), + PIN_GRP_GPIO("pwm3", 14, 1, BIT(6), "pwm"), + PIN_GRP_GPIO("pmic1", 17, 1, BIT(7), "pmic"), + PIN_GRP_GPIO("pmic0", 16, 1, BIT(8), "pmic"), + PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"), + PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"), + PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"), + PIN_GRP_GPIO_2("spi_cs2", 18, 1, BIT(13) | BIT(19), 0, BIT(13), "spi"), + PIN_GRP_GPIO_2("spi_cs3", 19, 1, BIT(14) | BIT(19), 0, BIT(14), "spi"), + PIN_GRP_GPIO("onewire", 4, 1, BIT(16), "onewire"), + PIN_GRP_GPIO("uart1", 25, 2, BIT(17), "uart"), + PIN_GRP_GPIO("spi_quad", 15, 2, BIT(18), "spi"), + PIN_GRP_EXTRA("uart2", 9, 2, BIT(13) | BIT(14) | BIT(19), + BIT(13) | BIT(14), BIT(19), 18, 2, "gpio", "uart"), + PIN_GRP_GPIO("led0_od", 11, 1, BIT(20), "led"), + PIN_GRP_GPIO("led1_od", 12, 1, BIT(21), "led"), + PIN_GRP_GPIO("led2_od", 13, 1, BIT(22), "led"), + PIN_GRP_GPIO("led3_od", 14, 1, BIT(23), "led"), + +}; + +static struct armada_37xx_pin_group armada_37xx_sb_groups[] = { + PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"), + PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"), + PIN_GRP_GPIO("sdio_sb", 24, 5, BIT(2), "sdio"), + PIN_GRP_EXTRA("rgmii", 6, 14, BIT(3), 0, BIT(3), 23, 1, "mii", "gpio"), + PIN_GRP_GPIO("pcie1", 3, 2, BIT(4), "pcie"), + PIN_GRP_GPIO("ptp", 20, 3, BIT(5), "ptp"), + PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"), + PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"), + PIN_GRP("mii_col", 23, 1, BIT(8), "mii", "mii_err"), +}; + +const struct armada_37xx_pin_data armada_37xx_pin_nb = { + .nr_pins = 36, + .name = "GPIO1", + .groups = armada_37xx_nb_groups, + .ngroups = ARRAY_SIZE(armada_37xx_nb_groups), +}; + +const struct armada_37xx_pin_data armada_37xx_pin_sb = { + .nr_pins = 29, + .name = "GPIO2", + .groups = armada_37xx_sb_groups, + .ngroups = ARRAY_SIZE(armada_37xx_sb_groups), +}; + +static inline void armada_37xx_update_reg(unsigned int *reg, + unsigned int offset) +{ + /* We never have more than 2 registers */ + if (offset >= GPIO_PER_REG) { + offset -= GPIO_PER_REG; + *reg += sizeof(u32); + } +} + +static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp, + const char *func) +{ + int f; + + for (f = 0; f < NB_FUNCS; f++) + if (!strcmp(grp->funcs[f], func)) + return f; + + return -ENOTSUPP; +} + +static int armada_37xx_pmx_get_groups_count(struct udevice *dev) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev); + + return info->ngroups; +} + +static const char *armada_37xx_pmx_dummy_name = "_dummy"; + +static const char *armada_37xx_pmx_get_group_name(struct udevice *dev, + unsigned selector) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev); + + if (!info->groups[selector].name) + return armada_37xx_pmx_dummy_name; + + return info->groups[selector].name; +} + +static int armada_37xx_pmx_get_funcs_count(struct udevice *dev) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev); + + return info->nfuncs; +} + +static const char *armada_37xx_pmx_get_func_name(struct udevice *dev, + unsigned selector) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev); + + return info->funcs[selector].name; +} + +static int armada_37xx_pmx_set_by_name(struct udevice *dev, + const char *name, + struct armada_37xx_pin_group *grp) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev); + unsigned int reg = SELECTION; + unsigned int mask = grp->reg_mask; + int func, val; + + dev_dbg(info->dev, "enable function %s group %s\n", + name, grp->name); + + func = armada_37xx_get_func_reg(grp, name); + + if (func < 0) + return func; + + val = grp->val[func]; + + clrsetbits_le32(info->base + reg, mask, val); + + return 0; +} + +static int armada_37xx_pmx_group_set(struct udevice *dev, + unsigned group_selector, + unsigned func_selector) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev); + struct armada_37xx_pin_group *grp = &info->groups[group_selector]; + const char *name = info->funcs[func_selector].name; + + return armada_37xx_pmx_set_by_name(dev, name, grp); +} + +/** + * armada_37xx_add_function() - Add a new function to the list + * @funcs: array of function to add the new one + * @funcsize: size of the remaining space for the function + * @name: name of the function to add + * + * If it is a new function then create it by adding its name else + * increment the number of group associated to this function. + */ +static int armada_37xx_add_function(struct armada_37xx_pmx_func *funcs, + int *funcsize, const char *name) +{ + int i = 0; + + if (*funcsize <= 0) + return -EOVERFLOW; + + while (funcs->ngroups) { + /* function already there */ + if (strcmp(funcs->name, name) == 0) { + funcs->ngroups++; + + return -EEXIST; + } + funcs++; + i++; + } + + /* append new unique function */ + funcs->name = name; + funcs->ngroups = 1; + (*funcsize)--; + + return 0; +} + +/** + * armada_37xx_fill_group() - complete the group array + * @info: info driver instance + * + * Based on the data available from the armada_37xx_pin_group array + * completes the last member of the struct for each function: the list + * of the groups associated to this function. + * + */ +static int armada_37xx_fill_group(struct armada_37xx_pinctrl *info) +{ + int n, num = 0, funcsize = info->data->nr_pins; + + for (n = 0; n < info->ngroups; n++) { + struct armada_37xx_pin_group *grp = &info->groups[n]; + int i, j, f; + + grp->pins = devm_kzalloc(info->dev, + (grp->npins + grp->extra_npins) * + sizeof(*grp->pins), GFP_KERNEL); + if (!grp->pins) + return -ENOMEM; + + for (i = 0; i < grp->npins; i++) + grp->pins[i] = grp->start_pin + i; + + for (j = 0; j < grp->extra_npins; j++) + grp->pins[i+j] = grp->extra_pin + j; + + for (f = 0; f < NB_FUNCS; f++) { + int ret; + /* check for unique functions and count groups */ + ret = armada_37xx_add_function(info->funcs, &funcsize, + grp->funcs[f]); + if (ret == -EOVERFLOW) + dev_err(info->dev, + "More functions than pins(%d)\n", + info->data->nr_pins); + if (ret < 0) + continue; + num++; + } + } + + info->nfuncs = num; + + return 0; +} + +/** + * armada_37xx_fill_funcs() - complete the funcs array + * @info: info driver instance + * + * Based on the data available from the armada_37xx_pin_group array + * completes the last two member of the struct for each group: + * - the list of the pins included in the group + * - the list of pinmux functions that can be selected for this group + * + */ +static int armada_37xx_fill_func(struct armada_37xx_pinctrl *info) +{ + struct armada_37xx_pmx_func *funcs = info->funcs; + int n; + + for (n = 0; n < info->nfuncs; n++) { + const char *name = funcs[n].name; + const char **groups; + int g; + + funcs[n].groups = devm_kzalloc(info->dev, funcs[n].ngroups * + sizeof(*(funcs[n].groups)), + GFP_KERNEL); + if (!funcs[n].groups) + return -ENOMEM; + + groups = funcs[n].groups; + + for (g = 0; g < info->ngroups; g++) { + struct armada_37xx_pin_group *gp = &info->groups[g]; + int f; + + for (f = 0; f < NB_FUNCS; f++) { + if (strcmp(gp->funcs[f], name) == 0) { + *groups = gp->name; + groups++; + } + } + } + } + return 0; +} + +static int armada_37xx_gpio_get(struct udevice *dev, unsigned int offset) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent); + unsigned int reg = INPUT_VAL; + unsigned int val, mask; + + armada_37xx_update_reg(®, offset); + mask = BIT(offset); + + val = readl(info->base + reg); + + return (val & mask) != 0; +} + +static int armada_37xx_gpio_set(struct udevice *dev, unsigned int offset, + int value) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent); + unsigned int reg = OUTPUT_VAL; + unsigned int mask, val; + + armada_37xx_update_reg(®, offset); + mask = BIT(offset); + val = value ? mask : 0; + + clrsetbits_le32(info->base + reg, mask, val); + + return 0; +} + +static int armada_37xx_gpio_get_direction(struct udevice *dev, + unsigned int offset) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent); + unsigned int reg = OUTPUT_EN; + unsigned int val, mask; + + armada_37xx_update_reg(®, offset); + mask = BIT(offset); + val = readl(info->base + reg); + + if (val & mask) + return GPIOF_OUTPUT; + else + return GPIOF_INPUT; +} + +static int armada_37xx_gpio_direction_input(struct udevice *dev, + unsigned int offset) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent); + unsigned int reg = OUTPUT_EN; + unsigned int mask; + + armada_37xx_update_reg(®, offset); + mask = BIT(offset); + + clrbits_le32(info->base + reg, mask); + + return 0; +} + +static int armada_37xx_gpio_direction_output(struct udevice *dev, + unsigned int offset, int value) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent); + unsigned int reg = OUTPUT_EN; + unsigned int mask; + + armada_37xx_update_reg(®, offset); + mask = BIT(offset); + + setbits_le32(info->base + reg, mask); + + /* And set the requested value */ + return armada_37xx_gpio_set(dev, offset, value); +} + +static int armada_37xx_gpio_probe(struct udevice *dev) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev->parent); + struct gpio_dev_priv *uc_priv; + + uc_priv = dev_get_uclass_priv(dev); + uc_priv->bank_name = info->data->name; + uc_priv->gpio_count = info->data->nr_pins; + + return 0; +} + +static const struct dm_gpio_ops armada_37xx_gpio_ops = { + .set_value = armada_37xx_gpio_set, + .get_value = armada_37xx_gpio_get, + .get_function = armada_37xx_gpio_get_direction, + .direction_input = armada_37xx_gpio_direction_input, + .direction_output = armada_37xx_gpio_direction_output, +}; + +static struct driver armada_37xx_gpio_driver = { + .name = "armada-37xx-gpio", + .id = UCLASS_GPIO, + .probe = armada_37xx_gpio_probe, + .ops = &armada_37xx_gpio_ops, +}; + +static int armada_37xx_gpiochip_register(struct udevice *parent, + struct armada_37xx_pinctrl *info) +{ + const void *blob = gd->fdt_blob; + int node = dev_of_offset(parent); + struct uclass_driver *drv; + struct udevice *dev; + int ret = -ENODEV; + int subnode; + char *name; + + /* Lookup GPIO driver */ + drv = lists_uclass_lookup(UCLASS_GPIO); + if (!drv) { + puts("Cannot find GPIO driver\n"); + return -ENOENT; + } + + fdt_for_each_subnode(subnode, blob, node) { + if (!fdtdec_get_bool(blob, subnode, "gpio-controller")) { + ret = 0; + break; + } + }; + if (ret) + return ret; + + name = calloc(1, 32); + sprintf(name, "armada-37xx-gpio"); + + /* Create child device UCLASS_GPIO and bind it */ + device_bind(parent, &armada_37xx_gpio_driver, name, NULL, subnode, + &dev); + dev_set_of_offset(dev, subnode); + + return 0; +} + +const struct pinctrl_ops armada_37xx_pinctrl_ops = { + .get_groups_count = armada_37xx_pmx_get_groups_count, + .get_group_name = armada_37xx_pmx_get_group_name, + .get_functions_count = armada_37xx_pmx_get_funcs_count, + .get_function_name = armada_37xx_pmx_get_func_name, + .pinmux_group_set = armada_37xx_pmx_group_set, + .set_state = pinctrl_generic_set_state, +}; + +int armada_37xx_pinctrl_probe(struct udevice *dev) +{ + struct armada_37xx_pinctrl *info = dev_get_priv(dev); + const struct armada_37xx_pin_data *pin_data; + int ret; + + info->data = (struct armada_37xx_pin_data *)dev_get_driver_data(dev); + pin_data = info->data; + + info->base = (void __iomem *)dev_get_addr(dev); + if (!info->base) { + error("unable to find regmap\n"); + return -ENODEV; + } + + info->groups = pin_data->groups; + info->ngroups = pin_data->ngroups; + + /* + * we allocate functions for number of pins and hope there are + * fewer unique functions than pins available + */ + info->funcs = devm_kzalloc(info->dev, pin_data->nr_pins * + sizeof(struct armada_37xx_pmx_func), GFP_KERNEL); + if (!info->funcs) + return -ENOMEM; + + + ret = armada_37xx_fill_group(info); + if (ret) + return ret; + + ret = armada_37xx_fill_func(info); + if (ret) + return ret; + + ret = armada_37xx_gpiochip_register(dev, info); + if (ret) + return ret; + + return 0; +} + +static const struct udevice_id armada_37xx_pinctrl_of_match[] = { + { + .compatible = "marvell,armada3710-sb-pinctrl", + .data = (ulong)&armada_37xx_pin_sb, + }, + { + .compatible = "marvell,armada3710-nb-pinctrl", + .data = (ulong)&armada_37xx_pin_nb, + }, + { /* sentinel */ } +}; + +U_BOOT_DRIVER(armada_37xx_pinctrl) = { + .name = "armada-37xx-pinctrl", + .id = UCLASS_PINCTRL, + .of_match = of_match_ptr(armada_37xx_pinctrl_of_match), + .probe = armada_37xx_pinctrl_probe, + .priv_auto_alloc_size = sizeof(struct armada_37xx_pinctrl), + .ops = &armada_37xx_pinctrl_ops, +}; diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 9220d04..83a0915 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -321,6 +321,4 @@ #define CONFIG_SUPPORT_RAW_INITRD -#define CONFIG_CRC32_VERIFY - #endif /* __CONFIG_H */ diff --git a/include/configs/bcm23550_w1d.h b/include/configs/bcm23550_w1d.h index 77d6e6a..9a36a4c 100644 --- a/include/configs/bcm23550_w1d.h +++ b/include/configs/bcm23550_w1d.h @@ -104,7 +104,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* Initial upstream - boot to cmd prompt only */ diff --git a/include/configs/bcm28155_ap.h b/include/configs/bcm28155_ap.h index 03f4ca0..bb61e5b 100644 --- a/include/configs/bcm28155_ap.h +++ b/include/configs/bcm28155_ap.h @@ -103,7 +103,6 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* Initial upstream - boot to cmd prompt only */ diff --git a/include/configs/bcm_ep_board.h b/include/configs/bcm_ep_board.h index 957cd9e..fa7eff5 100644 --- a/include/configs/bcm_ep_board.h +++ b/include/configs/bcm_ep_board.h @@ -60,19 +60,14 @@ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* Commands */ #define CONFIG_FAT_WRITE -/* SHA hashing */ -#define CONFIG_HASH_VERIFY - /* Enable Time Command */ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER -#define CONFIG_CRC32_VERIFY #endif /* __BCM_EP_BOARD_H */ diff --git a/include/configs/calimain.h b/include/configs/calimain.h index f5d108e..29d3bda 100644 --- a/include/configs/calimain.h +++ b/include/configs/calimain.h @@ -196,7 +196,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/clearfog.h b/include/configs/clearfog.h index 3397aaf..77c2493 100644 --- a/include/configs/clearfog.h +++ b/include/configs/clearfog.h @@ -79,7 +79,7 @@ #define CONFIG_SYS_ALT_MEMTEST /* Keep device tree and initrd in lower memory so the kernel can access them */ -#define CONFIG_EXTRA_ENV_SETTINGS \ +#define RELOCATION_LIMITS_ENV_SETTINGS \ "fdt_high=0x10000000\0" \ "initrd_high=0x10000000\0" @@ -133,4 +133,50 @@ */ #include "mv-common.h" +/* Include the common distro boot environment */ +#ifndef CONFIG_SPL_BUILD +#include <config_distro_defaults.h> + +#ifdef CONFIG_MMC +#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0) +#else +#define BOOT_TARGET_DEVICES_MMC(func) +#endif + +#ifdef CONFIG_USB_STORAGE +#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0) +#else +#define BOOT_TARGET_DEVICES_USB(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_DEVICES_MMC(func) \ + BOOT_TARGET_DEVICES_USB(func) \ + func(PXE, pxe, na) \ + func(DHCP, dhcp, na) + +#define KERNEL_ADDR_R __stringify(0x800000) +#define FDT_ADDR_R __stringify(0x100000) +#define RAMDISK_ADDR_R __stringify(0x1800000) +#define SCRIPT_ADDR_R __stringify(0x200000) +#define PXEFILE_ADDR_R __stringify(0x300000) + +#define LOAD_ADDRESS_ENV_SETTINGS \ + "kernel_addr_r=" KERNEL_ADDR_R "\0" \ + "fdt_addr_r=" FDT_ADDR_R "\0" \ + "ramdisk_addr_r=" RAMDISK_ADDR_R "\0" \ + "scriptaddr=" SCRIPT_ADDR_R "\0" \ + "pxefile_addr_r=" PXEFILE_ADDR_R "\0" + +#include <config_distro_bootcmd.h> + +#define CONFIG_EXTRA_ENV_SETTINGS \ + RELOCATION_LIMITS_ENV_SETTINGS \ + LOAD_ADDRESS_ENV_SETTINGS \ + "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ + "console=ttyS0,115200\0" \ + BOOTENV + +#endif /* CONFIG_SPL_BUILD */ + #endif /* _CONFIG_CLEARFOG_H */ diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index 0882ef8..8f4022a 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -288,6 +288,4 @@ #define CONFIG_SUPPORT_RAW_INITRD -#define CONFIG_CRC32_VERIFY - #endif /* __CONFIG_H */ diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h index e0bbf94..f46f466 100644 --- a/include/configs/da850evm.h +++ b/include/configs/da850evm.h @@ -255,7 +255,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/ea20.h b/include/configs/ea20.h index 53ee1ad..fc0f5e6 100644 --- a/include/configs/ea20.h +++ b/include/configs/ea20.h @@ -115,7 +115,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 6915dc1..378219d 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -131,9 +131,6 @@ #define CONFIG_ENV_SROM_BANK 1 #endif /*CONFIG_CMD_NET*/ -/* SHA hashing */ -#define CONFIG_HASH_VERIFY - /* Enable Time Command */ /* USB */ diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 741bdfa..13fc48f 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -125,7 +125,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index f52865b..a588823 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -107,7 +107,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h index 2e12b97..1d48726 100644 --- a/include/configs/imx6ul_geam.h +++ b/include/configs/imx6ul_geam.h @@ -124,7 +124,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index 76ae159..a0eb6e2 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -124,7 +124,6 @@ /* FIT */ #ifdef CONFIG_FIT -# define CONFIG_HASH_VERIFY # define CONFIG_IMAGE_FORMAT_LEGACY #endif diff --git a/include/configs/ipam390.h b/include/configs/ipam390.h index a3c0cfa..127e7e7 100644 --- a/include/configs/ipam390.h +++ b/include/configs/ipam390.h @@ -205,7 +205,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h index c5e7d62..f230f40 100644 --- a/include/configs/legoev3.h +++ b/include/configs/legoev3.h @@ -150,7 +150,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h index 9db4eeb..8904cd5 100644 --- a/include/configs/omapl138_lcdk.h +++ b/include/configs/omapl138_lcdk.h @@ -249,7 +249,6 @@ #define CONFIG_AUTO_COMPLETE #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC /* diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h index c62b45e..fbbd6cd 100644 --- a/include/configs/sandbox.h +++ b/include/configs/sandbox.h @@ -98,8 +98,6 @@ #define CONFIG_BOOTP_SERVERIP #define CONFIG_IP_DEFRAG -#define CONFIG_HASH_VERIFY - #define CONFIG_CMD_SANDBOX #define CONFIG_BOOTARGS "" diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index bdc6512..fd18ae5 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -15,8 +15,6 @@ #define CONFIG_DISPLAY_BOARDINFO_LATE #define CONFIG_CLOCKS -#define CONFIG_CRC32_VERIFY - #define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024) #define CONFIG_TIMESTAMP /* Print image info with timestamp */ diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h index 6982eaa..7ca5c0b 100644 --- a/include/configs/tegra-common.h +++ b/include/configs/tegra-common.h @@ -96,7 +96,6 @@ /* Misc utility code */ #define CONFIG_BOUNCE_BUFFER -#define CONFIG_CRC32_VERIFY #ifndef CONFIG_SPL_BUILD #include <config_distro_defaults.h> diff --git a/include/configs/ti_armv7_keystone2.h b/include/configs/ti_armv7_keystone2.h index 3161c50..06b9bba 100644 --- a/include/configs/ti_armv7_keystone2.h +++ b/include/configs/ti_armv7_keystone2.h @@ -211,7 +211,6 @@ /* U-Boot general configuration */ #define CONFIG_MISC_INIT_R -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC #define CONFIG_TIMESTAMP diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h index 7b15f31..7d7d9bb 100644 --- a/include/configs/xtfpga.h +++ b/include/configs/xtfpga.h @@ -138,7 +138,6 @@ #define CONFIG_AUTO_COMPLETE /* Support tab autocompletion */ #define CONFIG_CMDLINE_EDITING #define CONFIG_SYS_LONGHELP -#define CONFIG_CRC32_VERIFY #define CONFIG_MX_CYCLIC #define CONFIG_SHOW_BOOT_PROGRESS diff --git a/include/hash.h b/include/hash.h index d814337..4f9a8cf 100644 --- a/include/hash.h +++ b/include/hash.h @@ -17,10 +17,6 @@ enum { HASH_FLAG_ENV = 1 << 1, /* Allow env vars */ }; -#if defined(CONFIG_SHA1SUM_VERIFY) || defined(CONFIG_CRC32_VERIFY) -#define CONFIG_HASH_VERIFY -#endif - struct hash_algo { const char *name; /* Name of algorithm */ int digest_size; /* Length of digest */ diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index e8f49eb..ee95359 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -507,7 +507,6 @@ CONFIG_CP_CLK_FREQ CONFIG_CQSPI_DECODER CONFIG_CQSPI_REF_CLK CONFIG_CRC32 -CONFIG_CRC32_VERIFY CONFIG_CS8900 CONFIG_CS8900_BASE CONFIG_CS8900_BUS16 @@ -1074,7 +1073,6 @@ CONFIG_H264_FREQ CONFIG_H8300 CONFIG_HALEAKALA CONFIG_HARD_SPI -CONFIG_HASH_VERIFY CONFIG_HAS_DATAFLASH CONFIG_HAS_ETH0 CONFIG_HAS_ETH1 @@ -2416,7 +2414,6 @@ CONFIG_SH7780_PCI_BAR CONFIG_SH7780_PCI_LAR CONFIG_SH7780_PCI_LSR CONFIG_SH7785LCR -CONFIG_SHA1SUM_VERIFY CONFIG_SHARP_16x9 CONFIG_SHARP_LM8V31 CONFIG_SHARP_LQ035Q7DH06 diff --git a/tools/kwbimage.c b/tools/kwbimage.c index 8c0e730..edef560 100644 --- a/tools/kwbimage.c +++ b/tools/kwbimage.c @@ -1476,47 +1476,6 @@ static int image_get_version(void) return e->version; } -static int image_version_file(const char *input) -{ - FILE *fcfg; - int version; - int ret; - - fcfg = fopen(input, "r"); - if (!fcfg) { - fprintf(stderr, "Could not open input file %s\n", input); - return -1; - } - - image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX * - sizeof(struct image_cfg_element)); - if (!image_cfg) { - fprintf(stderr, "Cannot allocate memory\n"); - fclose(fcfg); - return -1; - } - - memset(image_cfg, 0, - IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element)); - rewind(fcfg); - - ret = image_create_config_parse(fcfg); - fclose(fcfg); - if (ret) { - free(image_cfg); - return -1; - } - - version = image_get_version(); - /* Fallback to version 0 is no version is provided in the cfg file */ - if (version == -1) - version = 0; - - free(image_cfg); - - return version; -} - static void kwbimage_set_header(void *ptr, struct stat *sbuf, int ifd, struct image_tool_params *params) { @@ -1657,18 +1616,62 @@ static int kwbimage_verify_header(unsigned char *ptr, int image_size, static int kwbimage_generate(struct image_tool_params *params, struct image_type_params *tparams) { + FILE *fcfg; int alloc_len; + int version; void *hdr; - int version = 0; + int ret; - version = image_version_file(params->imagename); - if (version == 0) { + fcfg = fopen(params->imagename, "r"); + if (!fcfg) { + fprintf(stderr, "Could not open input file %s\n", + params->imagename); + exit(EXIT_FAILURE); + } + + image_cfg = malloc(IMAGE_CFG_ELEMENT_MAX * + sizeof(struct image_cfg_element)); + if (!image_cfg) { + fprintf(stderr, "Cannot allocate memory\n"); + fclose(fcfg); + exit(EXIT_FAILURE); + } + + memset(image_cfg, 0, + IMAGE_CFG_ELEMENT_MAX * sizeof(struct image_cfg_element)); + rewind(fcfg); + + ret = image_create_config_parse(fcfg); + fclose(fcfg); + if (ret) { + free(image_cfg); + exit(EXIT_FAILURE); + } + + version = image_get_version(); + switch (version) { + /* + * Fallback to version 0 if no version is provided in the + * cfg file + */ + case -1: + case 0: alloc_len = sizeof(struct main_hdr_v0) + sizeof(struct ext_hdr_v0); - } else { + break; + + case 1: alloc_len = image_headersz_v1(NULL); + break; + + default: + fprintf(stderr, "Unsupported version %d\n", version); + free(image_cfg); + exit(EXIT_FAILURE); } + free(image_cfg); + hdr = malloc(alloc_len); if (!hdr) { fprintf(stderr, "%s: malloc return failure: %s\n", |