diff options
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/armv7/omap-common/clocks-common.c | 11 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap4/clocks.c | 15 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/clocks.c | 32 |
3 files changed, 40 insertions, 18 deletions
diff --git a/arch/arm/cpu/armv7/omap-common/clocks-common.c b/arch/arm/cpu/armv7/omap-common/clocks-common.c index e96a430..10d286a 100644 --- a/arch/arm/cpu/armv7/omap-common/clocks-common.c +++ b/arch/arm/cpu/armv7/omap-common/clocks-common.c @@ -397,23 +397,16 @@ void do_scale_tps62361(int gpio, u32 reg, u32 volt_mv) void do_scale_vcore(u32 vcore_reg, u32 volt_mv) { u32 offset_code; - u32 step = 12660; /* 12.66 mV represented in uV */ u32 offset = volt_mv; /* convert to uV for better accuracy in the calculations */ offset *= 1000; - if (omap_revision() == OMAP4430_ES1_0) - offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV; - else - offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV; - - offset_code = (offset + step - 1) / step; - /* The code starts at 1 not 0 */ - offset_code++; + offset_code = get_offset_code(offset); debug("do_scale_vcore: volt - %d offset_code - 0x%x\n", volt_mv, offset_code); + if (omap_vc_bypass_send_value(SMPS_I2C_SLAVE_ADDR, vcore_reg, offset_code)) printf("Scaling voltage failed for 0x%x\n", vcore_reg); diff --git a/arch/arm/cpu/armv7/omap4/clocks.c b/arch/arm/cpu/armv7/omap4/clocks.c index b6b3f7e..dd694c4 100644 --- a/arch/arm/cpu/armv7/omap4/clocks.c +++ b/arch/arm/cpu/armv7/omap4/clocks.c @@ -326,6 +326,21 @@ void scale_vcores(void) } } +u32 get_offset_code(u32 offset) +{ + u32 offset_code, step = 12660; /* 12.66 mV represented in uV */ + + if (omap_revision() == OMAP4430_ES1_0) + offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_UV; + else + offset -= PHOENIX_SMPS_BASE_VOLT_STD_MODE_WITH_OFFSET_UV; + + offset_code = (offset + step - 1) / step; + + /* The code starts at 1 not 0 */ + return ++offset_code; +} + /* * Enable essential clock domains, modules and * do some additional special settings needed diff --git a/arch/arm/cpu/armv7/omap5/clocks.c b/arch/arm/cpu/armv7/omap5/clocks.c index 722916e..1a59f26 100644 --- a/arch/arm/cpu/armv7/omap5/clocks.c +++ b/arch/arm/cpu/armv7/omap5/clocks.c @@ -264,17 +264,31 @@ void scale_vcores(void) omap_vc_init(PRM_VC_I2C_CHANNEL_FREQ_KHZ); - /* Enable 1.22V from TPS for vdd_mpu */ - volt = 1220; - do_scale_tps62361(-1, TPS62361_REG_ADDR_SET1, volt); + /* Palmas settings */ + volt = VDD_CORE; + do_scale_vcore(SMPS_REG_ADDR_8_CORE, volt); - /* VCORE 1 - for vdd_core */ - volt = 1000; - do_scale_vcore(SMPS_REG_ADDR_VCORE1, volt); + volt = VDD_MPU; + do_scale_vcore(SMPS_REG_ADDR_12_MPU, volt); - /* VCORE 2 - for vdd_MM */ - volt = 1125; - do_scale_vcore(SMPS_REG_ADDR_VCORE2, volt); + volt = VDD_MM; + do_scale_vcore(SMPS_REG_ADDR_45_IVA, volt); + +} + +u32 get_offset_code(u32 volt_offset) +{ + u32 offset_code, step = 10000; /* 10 mV represented in uV */ + + volt_offset -= PALMAS_SMPS_BASE_VOLT_UV; + + offset_code = (volt_offset + step - 1) / step; + + /* + * Offset codes 1-6 all give the base voltage in Palmas + * Offset code 0 switches OFF the SMPS + */ + return offset_code + 6; } /* |