diff options
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape/soc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/soc.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h index 58e90d8..3ccacb9 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h @@ -30,7 +30,7 @@ #define pex_lut_in32(a) in_be32(a) #define pex_lut_out32(a, v) out_be32(a, v) #endif - +#ifndef __ASSEMBLY__ struct cpu_type { char name[15]; u32 soc_ver; @@ -39,7 +39,7 @@ struct cpu_type { #define CPU_TYPE_ENTRY(n, v, nc) \ { .name = #n, .soc_ver = SVR_##v, .num_cores = (nc)} - +#endif #define SVR_WO_E 0xFFFFFE #define SVR_LS1012A 0x870400 #define SVR_LS1043A 0x879200 @@ -51,6 +51,8 @@ struct cpu_type { #define SVR_LS2085A 0x870100 #define SVR_LS2040A 0x870130 +#define SVR_DEV_LS2080A 0x8701 + #define SVR_MAJ(svr) (((svr) >> 4) & 0xf) #define SVR_MIN(svr) (((svr) >> 0) & 0xf) #define SVR_SOC_VER(svr) (((svr) >> 8) & SVR_WO_E) @@ -63,6 +65,7 @@ struct cpu_type { #define AHCI_PORT_TRANS_CFG 0x08000029 #define AHCI_PORT_AXICC_CFG 0x3fffffff +#ifndef __ASSEMBLY__ /* AHCI (sata) register map */ struct ccsr_ahci { u32 res1[0xa4/4]; /* 0x0 - 0xa4 */ @@ -105,4 +108,5 @@ void erratum_a010315(void); bool soc_has_dp_ddr(void); bool soc_has_aiop(void); +#endif #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */ |