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Diffstat (limited to 'arch/arm/include/asm/arch-stm32f7/stm32.h')
-rw-r--r--arch/arm/include/asm/arch-stm32f7/stm32.h13
1 files changed, 0 insertions, 13 deletions
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
index 14e3398..87aee60 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -57,12 +57,6 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
[5 ... 7] = 256 * 1024
};
-enum clock {
- CLOCK_CORE,
- CLOCK_AHB,
- CLOCK_APB1,
- CLOCK_APB2
-};
#define STM32_BUS_MASK GENMASK(31, 16)
struct stm32_rcc_regs {
@@ -101,11 +95,6 @@ struct stm32_rcc_regs {
};
#define STM32_RCC ((struct stm32_rcc_regs *)RCC_BASE)
-struct stm32_rcc_ext_f7_regs {
- u32 dckcfgr2; /* dedicated clocks configuration register */
-};
-#define STM32_RCC_EXT_F7 ((struct stm32_rcc_ext_f7_regs *) (RCC_BASE + sizeof(struct stm32_rcc_regs)))
-
struct stm32_pwr_regs {
u32 cr1; /* power control register 1 */
u32 csr1; /* power control/status register 2 */
@@ -114,8 +103,6 @@ struct stm32_pwr_regs {
};
#define STM32_PWR ((struct stm32_pwr_regs *)PWR_BASE)
-int configure_clocks(void);
-unsigned long clock_get(enum clock clck);
void stm32_flash_latency_cfg(int latency);
#endif /* _ASM_ARCH_HARDWARE_H */