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-rw-r--r--arch/powerpc/include/asm/arch-mpc85xx/gpio.h8
-rw-r--r--arch/powerpc/include/asm/immap_85xx.h10
-rw-r--r--arch/powerpc/include/asm/mpc8xxx_gpio.h100
3 files changed, 118 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
index 76faa22..0c72c71 100644
--- a/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
+++ b/arch/powerpc/include/asm/arch-mpc85xx/gpio.h
@@ -14,6 +14,7 @@
#ifndef __ASM_ARCH_MX85XX_GPIO_H
#define __ASM_ARCH_MX85XX_GPIO_H
+<<<<<<< bc5d0384458466ed5b3608d326eec03cd4f13016
#ifndef CONFIG_MPC85XX_GPIO
#include <asm/mpc85xx_gpio.h>
#endif
@@ -23,5 +24,12 @@ struct mpc85xx_gpio_plat {
unsigned long size;
uint ngpios;
};
+=======
+#ifdef CONFIG_MPC8XXX_GPIO
+#include <asm/mpc8xxx_gpio.h>
+#else
+#include <asm/mpc85xx_gpio.h>
+#endif
+>>>>>>> dm: gpio: Add DM GPIO driver for MPC8xxx platforms
#endif
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index ee537f4..184ff5a 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -3200,4 +3200,14 @@ struct ccsr_scfg {
u32 res4[60];
u32 sparecr[8]; /* 0x500 Spare Control register(0-7) */
};
+
+#if defined(CONFIG_PPC_T1013) || defined(CONFIG_PPC_T1014) ||\
+ defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022) ||\
+ defined(CONFIG_PPC_T1023) || defined(CONFIG_PPC_T1024) ||\
+ defined(CONFIG_PPC_T1040) || defined(CONFIG_PPC_T1042) ||\
+#define CONFIG_SYS_MPC8XXX_GPIO1_ADDR (CONFIG_SYS_IMMR + 0x130000)
+#define CONFIG_SYS_MPC8XXX_GPIO2_ADDR (CONFIG_SYS_IMMR + 0x131000)
+#define CONFIG_SYS_MPC8XXX_GPIO3_ADDR (CONFIG_SYS_IMMR + 0x132000)
+#define CONFIG_SYS_MPC8XXX_GPIO4_ADDR (CONFIG_SYS_IMMR + 0x133000)
+#endif
#endif /*__IMMAP_85xx__*/
diff --git a/arch/powerpc/include/asm/mpc8xxx_gpio.h b/arch/powerpc/include/asm/mpc8xxx_gpio.h
new file mode 100644
index 0000000..d4a5b7c
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc8xxx_gpio.h
@@ -0,0 +1,100 @@
+/*
+ * Copyright (c) 2016 Scalys B.V. <u-boot@scalys.com>
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _POWERPC_ASM_MPC8XXX_GPIO_H
+#define _POWERPC_ASM_MPC8XXX_GPIO_H
+
+#define MPC8XXX_GPIO_NR(port, pin) ((((port)-1)*32)+((pin)&31))
+#define MPC8XXX_GPIO_TO_PORT(gpio) (gpio/32)
+#define MPC8XXX_GPIO_TO_PIN(gpio) (gpio&31)
+
+static inline void mpc8xxx_gpio_set(uint32_t gpio, int value)
+{
+ int port, pin;
+ ccsr_gpio_t *gpio_regs;
+ uint32_t regval;
+
+ port = MPC8XXX_GPIO_TO_PORT(gpio);
+ pin = MPC8XXX_GPIO_TO_PIN(gpio);
+
+ switch (port) {
+#ifdef CONFIG_SYS_MPC8XXX_GPIO1_ADDR
+ case 0:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO1_ADDR;
+ break;
+#endif
+#ifdef CONFIG_SYS_MPC8XXX_GPIO2_ADDR
+ case 1:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO2_ADDR;
+ break;
+#endif
+#ifdef CONFIG_SYS_MPC8XXX_GPIO3_ADDR
+ case 2:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO3_ADDR;
+ break;
+#endif
+#ifdef CONFIG_SYS_MPC8XXX_GPIO4_ADDR
+ case 3:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO4_ADDR;
+ break;
+#endif
+ default:
+ return;
+ }
+
+ /* Set output */
+ regval = in_be32(&(gpio_regs->gpdat));
+ regval |= (0x80000000 >> pin);
+ out_be32(&(gpio_regs->gpdat), regval);
+
+ /* Set direction to acivate gpio pin */
+ regval = in_be32(&(gpio_regs->gpdir));
+ regval |= (0x80000000 >> pin);
+ out_be32(&(gpio_regs->gpdir), regval);
+}
+
+static inline int mpc8xxx_gpio_get(uint32_t gpio, int value)
+{
+ int port, pin;
+ ccsr_gpio_t *gpio_regs;
+ uint32_t regval;
+
+ port = MPC8XXX_GPIO_TO_PORT(gpio);
+ pin = MPC8XXX_GPIO_TO_PIN(gpio);
+
+ switch (port) {
+#ifdef CONFIG_SYS_MPC8XXX_GPIO1_ADDR
+ case 0:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO1_ADDR;
+ break;
+#endif
+#ifdef CONFIG_SYS_MPC8XXX_GPIO2_ADDR
+ case 1:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO2_ADDR;
+ break;
+#endif
+#ifdef CONFIG_SYS_MPC8XXX_GPIO3_ADDR
+ case 2:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO3_ADDR;
+ break;
+#endif
+#ifdef CONFIG_SYS_MPC8XXX_GPIO4_ADDR
+ case 3:
+ gpio_regs = (ccsr_gpio_t *) CONFIG_SYS_MPC8XXX_GPIO4_ADDR;
+ break;
+#endif
+ default:
+ return;
+ }
+
+ /* Get inputs */
+ regval = in_be32(&(gpio_regs->gpdat));
+ regval <<= pin;
+ regval &= 1;
+
+ return regval;
+}
+
+#endif /* _POWERPC_ASM_MPC8XXX_GPIO_H */