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-rw-r--r--arch/arc/Kconfig3
-rw-r--r--arch/arc/Makefile2
-rw-r--r--arch/arc/config.mk4
-rw-r--r--arch/arc/cpu/arc700/Makefile13
-rw-r--r--arch/arc/cpu/arcv1/Makefile7
-rw-r--r--arch/arc/cpu/arcv1/config.mk (renamed from arch/arc/cpu/arc700/config.mk)0
-rw-r--r--arch/arc/cpu/arcv1/start.S (renamed from arch/arc/cpu/arc700/start.S)77
-rw-r--r--arch/arc/cpu/u-boot.lds (renamed from arch/arc/cpu/arc700/u-boot.lds)15
-rw-r--r--arch/arc/include/asm/arcregs.h2
-rw-r--r--arch/arc/include/asm/sections.h3
-rw-r--r--arch/arc/lib/Makefile6
-rw-r--r--arch/arc/lib/cache.c (renamed from arch/arc/cpu/arc700/cache.c)29
-rw-r--r--arch/arc/lib/cpu.c (renamed from arch/arc/cpu/arc700/cpu.c)0
-rw-r--r--arch/arc/lib/interrupts.c (renamed from arch/arc/cpu/arc700/interrupts.c)3
-rw-r--r--arch/arc/lib/relocate.c19
-rw-r--r--arch/arc/lib/reset.c (renamed from arch/arc/cpu/arc700/reset.c)0
-rw-r--r--arch/arc/lib/sections.c2
-rw-r--r--arch/arc/lib/timer.c (renamed from arch/arc/cpu/arc700/timer.c)0
18 files changed, 123 insertions, 62 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index d3ef58b..c6b1efe 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -4,6 +4,9 @@ menu "ARC architecture"
config SYS_ARCH
default "arc"
+config SYS_CPU
+ default "arcv1"
+
choice
prompt "Target select"
diff --git a/arch/arc/Makefile b/arch/arc/Makefile
index 03ea6db..a59231e 100644
--- a/arch/arc/Makefile
+++ b/arch/arc/Makefile
@@ -2,8 +2,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
-head-y := arch/arc/cpu/$(CPU)/start.o
-
libs-y += arch/arc/cpu/$(CPU)/
libs-y += arch/arc/lib/
diff --git a/arch/arc/config.mk b/arch/arc/config.mk
index e408800..5321987 100644
--- a/arch/arc/config.mk
+++ b/arch/arc/config.mk
@@ -21,6 +21,10 @@ ifeq ($(CROSS_COMPILE),)
CROSS_COMPILE := $(ARC_CROSS_COMPILE)
endif
+ifdef CONFIG_ARC_MMU_VER
+CONFIG_MMU = 1
+endif
+
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
# Needed for relocation
diff --git a/arch/arc/cpu/arc700/Makefile b/arch/arc/cpu/arc700/Makefile
deleted file mode 100644
index cdc5002..0000000
--- a/arch/arc/cpu/arc700/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
-#
-# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-extra-y += start.o
-
-obj-y += cache.o
-obj-y += cpu.o
-obj-y += interrupts.o
-obj-y += reset.o
-obj-y += timer.o
diff --git a/arch/arc/cpu/arcv1/Makefile b/arch/arc/cpu/arcv1/Makefile
new file mode 100644
index 0000000..3704ebe
--- /dev/null
+++ b/arch/arc/cpu/arcv1/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += start.o
diff --git a/arch/arc/cpu/arc700/config.mk b/arch/arc/cpu/arcv1/config.mk
index 3206ff4..3206ff4 100644
--- a/arch/arc/cpu/arc700/config.mk
+++ b/arch/arc/cpu/arcv1/config.mk
diff --git a/arch/arc/cpu/arc700/start.S b/arch/arc/cpu/arcv1/start.S
index 563513b..01cfba4 100644
--- a/arch/arc/cpu/arc700/start.S
+++ b/arch/arc/cpu/arcv1/start.S
@@ -57,11 +57,13 @@
.endm
.macro SAVE_ALL_SYS
-
+ /* saving %r0 to reg->r0 in advance since we read %ecr into it */
+ st %r0, [%sp, -8]
+ lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
- lr %r0, [%ecr]
- st %r0, [%sp, 8] /* ECR */
- st %sp, [%sp, 4]
+ st %sp, [%sp, -4]
+ /* now move %sp to reg->r0 position so we can do "push" automatically */
+ sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
@@ -76,11 +78,21 @@
PUSHAX %erbta
.endm
+.macro SAVE_EXCEPTION_SOURCE
+#ifdef CONFIG_MMU
+ /* If MMU exists exception faulting address is loaded in EFA reg */
+ lr %r0, [%efa]
+#else
+ /* Otherwise in ERET (exception return) reg */
+ lr %r0, [%eret]
+#endif
+.endm
+
+.section .ivt, "ax",@progbits
.align 4
-.globl _start
-_start:
+_ivt:
/* Critical system events */
- j reset /* 0 - 0x000 */
+ j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
@@ -98,15 +110,37 @@ _start:
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
+.text
+.globl _start
+_start:
+ /* Setup interrupt vector base that matches "__text_start" */
+ sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
+
+ /* Setup stack pointer */
+ mov %sp, CONFIG_SYS_INIT_SP_ADDR
+ mov %fp, %sp
+
+ /* Clear bss */
+ mov %r0, __bss_start
+ mov %r1, __bss_end
+
+clear_bss:
+ st.ab 0, [%r0, 4]
+ brlt %r0, %r1, clear_bss
+
+ /* Zero the one and only argument of "board_init_f" */
+ mov_s %r0, 0
+ j board_init_f
+
memory_error:
SAVE_ALL_SYS
- lr %r0, [%efa]
+ SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
instruction_error:
SAVE_ALL_SYS
- lr %r0, [%efa]
+ SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
@@ -117,7 +151,7 @@ interrupt_handler:
EV_MachineCheck:
SAVE_ALL_SYS
- lr %r0, [%efa]
+ SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
@@ -133,7 +167,7 @@ EV_TLBMissD:
EV_TLBProtV:
SAVE_ALL_SYS
- lr %r0, [%efa]
+ SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
@@ -152,27 +186,6 @@ EV_Extension:
mov %r0, %sp
j do_extension
-
-reset:
- /* Setup interrupt vector base that matches "__text_start" */
- sr __text_start, [ARC_AUX_INTR_VEC_BASE]
-
- /* Setup stack pointer */
- mov %sp, CONFIG_SYS_INIT_SP_ADDR
- mov %fp, %sp
-
- /* Clear bss */
- mov %r0, __bss_start
- mov %r1, __bss_end
-
-clear_bss:
- st.ab 0, [%r0, 4]
- brlt %r0, %r1, clear_bss
-
- /* Zero the one and only argument of "board_init_f" */
- mov_s %r0, 0
- j board_init_f
-
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
diff --git a/arch/arc/cpu/arc700/u-boot.lds b/arch/arc/cpu/u-boot.lds
index 2d01b21..ccddbf7 100644
--- a/arch/arc/cpu/arc700/u-boot.lds
+++ b/arch/arc/cpu/u-boot.lds
@@ -13,7 +13,6 @@ SECTIONS
.text : {
*(.__text_start)
*(.__image_copy_start)
- CPUDIR/start.o (.text*)
*(.text*)
}
@@ -23,6 +22,20 @@ SECTIONS
*(.__text_end)
}
+ . = ALIGN(1024);
+ .ivt_start : {
+ *(.__ivt_start)
+ }
+
+ .ivt :
+ {
+ *(.ivt)
+ }
+
+ .ivt_end : {
+ *(.__ivt_end)
+ }
+
. = ALIGN(4);
.rodata : {
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
diff --git a/arch/arc/include/asm/arcregs.h b/arch/arc/include/asm/arcregs.h
index 5d48d11..8ace87f 100644
--- a/arch/arc/include/asm/arcregs.h
+++ b/arch/arc/include/asm/arcregs.h
@@ -24,6 +24,7 @@
#if (CONFIG_ARC_MMU_VER > 2)
#define ARC_AUX_IC_PTAG 0x1E
#endif
+#define ARC_BCR_IC_BUILD 0x77
/* Timer related auxiliary registers */
#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
@@ -42,6 +43,7 @@
#if (CONFIG_ARC_MMU_VER > 2)
#define ARC_AUX_DC_PTAG 0x5C
#endif
+#define ARC_BCR_DC_BUILD 0x72
#ifndef __ASSEMBLY__
/* Accessors for auxiliary registers */
diff --git a/arch/arc/include/asm/sections.h b/arch/arc/include/asm/sections.h
index 18484a1..b8f2a85 100644
--- a/arch/arc/include/asm/sections.h
+++ b/arch/arc/include/asm/sections.h
@@ -10,5 +10,8 @@
#include <asm-generic/sections.h>
extern ulong __text_end;
+extern ulong __ivt_start;
+extern ulong __ivt_end;
+extern ulong __image_copy_start;
#endif /* __ASM_ARC_SECTIONS_H */
diff --git a/arch/arc/lib/Makefile b/arch/arc/lib/Makefile
index 7675f85..bae4419 100644
--- a/arch/arc/lib/Makefile
+++ b/arch/arc/lib/Makefile
@@ -4,6 +4,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
+obj-y += cache.o
+obj-y += cpu.o
+obj-y += interrupts.o
obj-y += sections.o
obj-y += relocate.o
obj-y += strchr-700.o
@@ -13,4 +16,7 @@ obj-y += strlen.o
obj-y += memcmp.o
obj-y += memcpy-700.o
obj-y += memset.o
+obj-y += reset.o
+obj-y += timer.o
+
obj-$(CONFIG_CMD_BOOTM) += bootm.o
diff --git a/arch/arc/cpu/arc700/cache.c b/arch/arc/lib/cache.c
index 39d522d..fa19a13 100644
--- a/arch/arc/cpu/arc700/cache.c
+++ b/arch/arc/lib/cache.c
@@ -14,21 +14,34 @@
#define DC_CTRL_CACHE_DISABLE (1 << 0)
#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
#define DC_CTRL_FLUSH_STATUS (1 << 8)
+#define CACHE_VER_NUM_MASK 0xF
int icache_status(void)
{
+ /* If no cache in CPU exit immediately */
+ if (!(read_aux_reg(ARC_BCR_IC_BUILD) & CACHE_VER_NUM_MASK))
+ return 0;
+
return (read_aux_reg(ARC_AUX_IC_CTRL) & IC_CTRL_CACHE_DISABLE) !=
IC_CTRL_CACHE_DISABLE;
}
void icache_enable(void)
{
+ /* If no cache in CPU exit immediately */
+ if (!(read_aux_reg(ARC_BCR_IC_BUILD) & CACHE_VER_NUM_MASK))
+ return;
+
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) &
~IC_CTRL_CACHE_DISABLE);
}
void icache_disable(void)
{
+ /* If no cache in CPU exit immediately */
+ if (!(read_aux_reg(ARC_BCR_IC_BUILD) & CACHE_VER_NUM_MASK))
+ return;
+
write_aux_reg(ARC_AUX_IC_CTRL, read_aux_reg(ARC_AUX_IC_CTRL) |
IC_CTRL_CACHE_DISABLE);
}
@@ -43,24 +56,40 @@ void invalidate_icache_all(void)
int dcache_status(void)
{
+ /* If no cache in CPU exit immediately */
+ if (!(read_aux_reg(ARC_BCR_DC_BUILD) & CACHE_VER_NUM_MASK))
+ return 0;
+
return (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_CACHE_DISABLE) !=
DC_CTRL_CACHE_DISABLE;
}
void dcache_enable(void)
{
+ /* If no cache in CPU exit immediately */
+ if (!(read_aux_reg(ARC_BCR_DC_BUILD) & CACHE_VER_NUM_MASK))
+ return;
+
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) &
~(DC_CTRL_INV_MODE_FLUSH | DC_CTRL_CACHE_DISABLE));
}
void dcache_disable(void)
{
+ /* If no cache in CPU exit immediately */
+ if (!(read_aux_reg(ARC_BCR_DC_BUILD) & CACHE_VER_NUM_MASK))
+ return;
+
write_aux_reg(ARC_AUX_DC_CTRL, read_aux_reg(ARC_AUX_DC_CTRL) |
DC_CTRL_CACHE_DISABLE);
}
void flush_dcache_all(void)
{
+ /* If no cache in CPU exit immediately */
+ if (!(read_aux_reg(ARC_BCR_DC_BUILD) & CACHE_VER_NUM_MASK))
+ return;
+
/* Do flush of entire cache */
write_aux_reg(ARC_AUX_DC_FLSH, 1);
diff --git a/arch/arc/cpu/arc700/cpu.c b/arch/arc/lib/cpu.c
index 50634b8..50634b8 100644
--- a/arch/arc/cpu/arc700/cpu.c
+++ b/arch/arc/lib/cpu.c
diff --git a/arch/arc/cpu/arc700/interrupts.c b/arch/arc/lib/interrupts.c
index d93a6eb..d7cab3b 100644
--- a/arch/arc/cpu/arc700/interrupts.c
+++ b/arch/arc/lib/interrupts.c
@@ -23,7 +23,7 @@ int interrupt_init(void)
int disable_interrupts(void)
{
int status = read_aux_reg(ARC_AUX_STATUS32);
- int state = (status | E1_MASK | E2_MASK) ? 1 : 0;
+ int state = (status & (E1_MASK | E2_MASK)) ? 1 : 0;
status &= ~(E1_MASK | E2_MASK);
/* STATUS32 register is updated indirectly with "FLAG" instruction */
@@ -61,6 +61,7 @@ static void print_reg_file(long *reg_rev, int start_num)
void show_regs(struct pt_regs *regs)
{
+ printf("ECR:\t0x%08lx\n", regs->ecr);
printf("RET:\t0x%08lx\nBLINK:\t0x%08lx\nSTAT32:\t0x%08lx\n",
regs->ret, regs->blink, regs->status32);
printf("GP: 0x%08lx\t r25: 0x%08lx\t\n", regs->r26, regs->r25);
diff --git a/arch/arc/lib/relocate.c b/arch/arc/lib/relocate.c
index 2482bcd..7797782 100644
--- a/arch/arc/lib/relocate.c
+++ b/arch/arc/lib/relocate.c
@@ -26,7 +26,7 @@ int do_elf_reloc_fixups(void)
offset_ptr_rom = (Elf32_Addr *)re_src->r_offset;
/* Check that the location of the relocation is in .text */
- if (offset_ptr_rom >= (Elf32_Addr *)CONFIG_SYS_TEXT_BASE &&
+ if (offset_ptr_rom >= (Elf32_Addr *)&__image_copy_start &&
offset_ptr_rom > last_offset) {
unsigned int val;
/* Switch to the in-RAM version */
@@ -44,29 +44,22 @@ int do_elf_reloc_fixups(void)
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
- (unsigned int)&__text_end)
+ (unsigned int)&__ivt_end)
val = (val << 16) | (val >> 16);
#endif
- /* Check that the target points into .text */
- if (val >= CONFIG_SYS_TEXT_BASE && val <=
- (unsigned int)&__bss_end) {
+ /* Check that the target points into executable */
+ if (val >= (unsigned int)&__image_copy_start && val <=
+ (unsigned int)&__image_copy_end) {
val += gd->reloc_off;
#ifdef __LITTLE_ENDIAN__
/* If location in ".text" section swap value */
if ((unsigned int)offset_ptr_rom <
- (unsigned int)&__text_end)
+ (unsigned int)&__ivt_end)
val = (val << 16) | (val >> 16);
#endif
memcpy(offset_ptr_ram, &val, sizeof(int));
- } else {
- debug(" %p: rom reloc %x, ram %p, value %x, limit %x\n",
- re_src, re_src->r_offset, offset_ptr_ram,
- val, (unsigned int)&__bss_end);
}
- } else {
- debug(" %p: rom reloc %x, last %p\n", re_src,
- re_src->r_offset, last_offset);
}
last_offset = offset_ptr_rom;
diff --git a/arch/arc/cpu/arc700/reset.c b/arch/arc/lib/reset.c
index 98ebf1d..98ebf1d 100644
--- a/arch/arc/cpu/arc700/reset.c
+++ b/arch/arc/lib/reset.c
diff --git a/arch/arc/lib/sections.c b/arch/arc/lib/sections.c
index b0b46a4..a72c694 100644
--- a/arch/arc/lib/sections.c
+++ b/arch/arc/lib/sections.c
@@ -19,3 +19,5 @@ char __rel_dyn_end[0] __attribute__((section(".__rel_dyn_end")));
char __text_start[0] __attribute__((section(".__text_start")));
char __text_end[0] __attribute__((section(".__text_end")));
char __init_end[0] __attribute__((section(".__init_end")));
+char __ivt_start[0] __attribute__((section(".__ivt_start")));
+char __ivt_end[0] __attribute__((section(".__ivt_end")));
diff --git a/arch/arc/cpu/arc700/timer.c b/arch/arc/lib/timer.c
index a0acbbc..a0acbbc 100644
--- a/arch/arc/cpu/arc700/timer.c
+++ b/arch/arc/lib/timer.c