diff options
Diffstat (limited to 'board/freescale/common')
-rw-r--r-- | board/freescale/common/arm_sleep.c | 6 | ||||
-rw-r--r-- | board/freescale/common/cmd_esbc_validate.c | 16 | ||||
-rw-r--r-- | board/freescale/common/mpc85xx_sleep.c | 8 | ||||
-rw-r--r-- | board/freescale/common/qixis.c | 31 |
4 files changed, 51 insertions, 10 deletions
diff --git a/board/freescale/common/arm_sleep.c b/board/freescale/common/arm_sleep.c index 8edf878..c06b862 100644 --- a/board/freescale/common/arm_sleep.c +++ b/board/freescale/common/arm_sleep.c @@ -19,6 +19,9 @@ #endif #include "sleep.h" +#ifdef CONFIG_U_QE +#include "../../../drivers/qe/qe.h" +#endif DECLARE_GLOBAL_DATA_PTR; @@ -72,6 +75,9 @@ static void dp_resume_prepare(void) board_sleep_prepare(); armv7_init_nonsec(); cleanup_before_linux(); +#ifdef CONFIG_U_QE + u_qe_resume(); +#endif } int fsl_dp_resume(void) diff --git a/board/freescale/common/cmd_esbc_validate.c b/board/freescale/common/cmd_esbc_validate.c index 8500ba5..8bbe85b 100644 --- a/board/freescale/common/cmd_esbc_validate.c +++ b/board/freescale/common/cmd_esbc_validate.c @@ -8,6 +8,16 @@ #include <command.h> #include <fsl_validate.h> +static int do_esbc_halt(cmd_tbl_t *cmdtp, int flag, int argc, + char * const argv[]) +{ + printf("Core is entering spin loop.\n"); +loop: + goto loop; + + return 0; +} + static int do_esbc_validate(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) { @@ -32,3 +42,9 @@ U_BOOT_CMD( "Validates signature on a given image using RSA verification", esbc_validate_help_text ); + +U_BOOT_CMD( + esbc_halt, 1, 0, do_esbc_halt, + "Put the core in spin loop ", + "" +); diff --git a/board/freescale/common/mpc85xx_sleep.c b/board/freescale/common/mpc85xx_sleep.c index f924e7f..9e4132c 100644 --- a/board/freescale/common/mpc85xx_sleep.c +++ b/board/freescale/common/mpc85xx_sleep.c @@ -7,6 +7,9 @@ #include <common.h> #include <asm/immap_85xx.h> #include "sleep.h" +#ifdef CONFIG_U_QE +#include "../../../drivers/qe/qe.h" +#endif DECLARE_GLOBAL_DATA_PTR; @@ -65,6 +68,11 @@ static void dp_resume_prepare(void) disable_cpc_sram(); #endif enable_cpc(); + +#ifdef CONFIG_U_QE + u_qe_resume(); +#endif + } int fsl_dp_resume(void) diff --git a/board/freescale/common/qixis.c b/board/freescale/common/qixis.c index a49e300..9f6b0e7 100644 --- a/board/freescale/common/qixis.c +++ b/board/freescale/common/qixis.c @@ -138,24 +138,23 @@ void qixis_bank_reset(void) QIXIS_WRITE(rcfg_ctl, QIXIS_RCFG_CTL_RECONFIG_START); } -/* Set the boot bank to the power-on default bank */ -void clear_altbank(void) +static void __maybe_unused set_lbmap(int lbmap) { u8 reg; reg = QIXIS_READ(brdcfg[0]); - reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_DFLTBANK; + reg = (reg & ~QIXIS_LBMAP_MASK) | lbmap; QIXIS_WRITE(brdcfg[0], reg); } -/* Set the boot bank to the alternate bank */ -void set_altbank(void) +static void __maybe_unused set_rcw_src(int rcw_src) { u8 reg; - reg = QIXIS_READ(brdcfg[0]); - reg = (reg & ~QIXIS_LBMAP_MASK) | QIXIS_LBMAP_ALTBANK; - QIXIS_WRITE(brdcfg[0], reg); + reg = QIXIS_READ(dutcfg[1]); + reg = (reg & ~1) | (rcw_src & 1); + QIXIS_WRITE(dutcfg[1], reg); + QIXIS_WRITE(dutcfg[0], (rcw_src >> 1) & 0xff); } static void qixis_dump_regs(void) @@ -201,11 +200,22 @@ int qixis_reset_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) int i; if (argc <= 1) { - clear_altbank(); + set_lbmap(QIXIS_LBMAP_DFLTBANK); qixis_reset(); } else if (strcmp(argv[1], "altbank") == 0) { - set_altbank(); + set_lbmap(QIXIS_LBMAP_ALTBANK); qixis_bank_reset(); + } else if (strcmp(argv[1], "nand") == 0) { +#ifdef QIXIS_LBMAP_NAND + QIXIS_WRITE(rst_ctl, 0x30); + QIXIS_WRITE(rcfg_ctl, 0); + set_lbmap(QIXIS_LBMAP_NAND); + set_rcw_src(QIXIS_RCW_SRC_NAND); + QIXIS_WRITE(rcfg_ctl, 0x20); + QIXIS_WRITE(rcfg_ctl, 0x21); +#else + printf("Not implemented\n"); +#endif } else if (strcmp(argv[1], "watchdog") == 0) { static char *period[9] = {"2s", "4s", "8s", "16s", "32s", "1min", "2min", "4min", "8min"}; @@ -244,6 +254,7 @@ U_BOOT_CMD( "Reset the board using the FPGA sequencer", "- hard reset to default bank\n" "qixis_reset altbank - reset to alternate bank\n" + "qixis_reset nand - reset to nand\n" "qixis watchdog <watchdog_period> - set the watchdog period\n" " period: 1s 2s 4s 8s 16s 32s 1min 2min 4min 8min\n" "qixis_reset dump - display the QIXIS registers\n" |