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Diffstat (limited to 'board/scalys/simc-t10xx/dragonfruit.c')
-rw-r--r--board/scalys/simc-t10xx/dragonfruit.c54
1 files changed, 15 insertions, 39 deletions
diff --git a/board/scalys/simc-t10xx/dragonfruit.c b/board/scalys/simc-t10xx/dragonfruit.c
index 80235fe..12accc0 100644
--- a/board/scalys/simc-t10xx/dragonfruit.c
+++ b/board/scalys/simc-t10xx/dragonfruit.c
@@ -8,23 +8,18 @@
#include <common.h>
#include <asm-generic/gpio.h>
-
#include "dragonfruit.h"
-uint32_t *gpio2_gpdir = (uint32_t *) 0xffe131000;
-uint32_t *gpio2_gpdat = (uint32_t *) 0xffe131008;
-uint32_t regval;
-
/*
* SERDER MUX Configuration pins:
* IFC_A25 : GPIO2_25 : SERDES_CLK_ MUX_SER0_1_SEL
* IFC_A26 : GPIO2_26 : SERDES_CLK_ MUX_SER2_3_SEL
* IFC_A27 : GPIO2_27 : SERDES_CLK_ MUX_SER5_6_SEL
*/
-#define MUX_SER0_1_SEL (0x80000000 >> 25)
-#define MUX_SER2_3_SEL (0x80000000 >> 26)
-#define MUX_SER5_6_SEL (0x80000000 >> 27)
-#define SERDES_CLK_OE (0x80000000 >> 29)
+#define MUX_SER0_1_SEL MPC85XX_GPIO_NR(2, 25)
+#define MUX_SER2_3_SEL MPC85XX_GPIO_NR(2, 26)
+#define MUX_SER5_6_SEL MPC85XX_GPIO_NR(2, 27)
+#define SERDES_CLK_OE MPC85XX_GPIO_NR(2, 29)
/*
* MUX_SER0_1_SEL
@@ -153,46 +148,34 @@ int scalys_carrier_setup_muxing(int serdes_config)
printf("-----------------------------------------------------\n");
printf("Serdes lane configuration:\n");
- if ((mux_config & 1) > 0) {
- regval = in_be32(gpio2_gpdat);
- regval |= MUX_SER0_1_SEL;
- out_be32(gpio2_gpdat, regval);
+ if ((mux_config & 1) != 0) {
+ gpio_direction_output(MUX_SER0_1_SEL, 1);
printf("A: SFP slot 0 (T2081 only)\n");
- printf("B: SFP slot 1\n");
+ printf("B: SFP slot 1 (T2081 only)\n");
} else {
- regval = in_be32(gpio2_gpdat);
- regval &= ~MUX_SER0_1_SEL;
- out_be32(gpio2_gpdat, regval);
+ gpio_direction_output(MUX_SER0_1_SEL, 0);
printf("A: PCIe slot 1 on lane 0\n");
printf("B: PCIe slot 1 on lane 1\n");
}
- if ((mux_config & 2) > 0) {
- regval = in_be32(gpio2_gpdat);
- regval |= MUX_SER2_3_SEL;
- out_be32(gpio2_gpdat, regval);
+ if ((mux_config & 2) != 0) {
+ gpio_direction_output(MUX_SER2_3_SEL, 1);
printf("C: SFP slot 2\n");
printf("D: SFP slot 3\n");
} else {
- regval = in_be32(gpio2_gpdat);
- regval &= ~MUX_SER2_3_SEL;
- out_be32(gpio2_gpdat, regval);
+ gpio_direction_output(MUX_SER2_3_SEL, 0);
printf("C: PCIe slot 1 on lane 2\n");
printf("D: PCIe slot 1 on lane 3\n");
}
printf("E: PCIe slot 4 on lane 0\n");
- if ((mux_config & 4) > 0) {
- regval = in_be32(gpio2_gpdat);
- regval |= MUX_SER5_6_SEL;
- out_be32(gpio2_gpdat, regval);
+ if ((mux_config & 4) != 0) {
+ gpio_direction_output(MUX_SER5_6_SEL, 1);
printf("F: PCIe slot 2 on lane 0\n");
printf("G: PCIe slot 3 on lane 0\n");
} else {
- regval = in_be32(gpio2_gpdat);
- regval &= ~MUX_SER5_6_SEL;
- out_be32(gpio2_gpdat, regval);
+ gpio_direction_output(MUX_SER5_6_SEL, 0);
printf("F: PCIe slot 4 on lane 1\n");
printf("G: PCIe slot 4 on lane 2\n");
}
@@ -201,14 +184,7 @@ int scalys_carrier_setup_muxing(int serdes_config)
printf("-----------------------------------------------------\n");
/* Enable serdes clock */
- regval = in_be32(gpio2_gpdat);
- regval |= SERDES_CLK_OE;
- out_be32(gpio2_gpdat, regval);
+ gpio_direction_output(SERDES_CLK_OE, 1);
- /* Set outputs to output mode */
- regval = in_be32(gpio2_gpdir);
- regval |= (MUX_SER0_1_SEL | MUX_SER2_3_SEL | MUX_SER5_6_SEL | SERDES_CLK_OE);
- out_be32(gpio2_gpdir, regval);
-
return ret;
}