summaryrefslogtreecommitdiff
path: root/board/scalys/simc-t10xx/eth.c
diff options
context:
space:
mode:
Diffstat (limited to 'board/scalys/simc-t10xx/eth.c')
-rw-r--r--board/scalys/simc-t10xx/eth.c68
1 files changed, 66 insertions, 2 deletions
diff --git a/board/scalys/simc-t10xx/eth.c b/board/scalys/simc-t10xx/eth.c
index 2533137..2f5c401 100644
--- a/board/scalys/simc-t10xx/eth.c
+++ b/board/scalys/simc-t10xx/eth.c
@@ -13,6 +13,25 @@
#include <malloc.h>
#include <i2c.h>
+
+
+
+#include <common.h>
+#include <netdev.h>
+#include <asm/fsl_serdes.h>
+#include <asm/immap_85xx.h>
+#include <fm_eth.h>
+#include <fsl_mdio.h>
+#include <malloc.h>
+#include <fsl_dtsec.h>
+#include <vsc9953.h>
+
+//#include "../common/fman.h"
+//#include "../common/qixis.h"
+
+
+
+
#include "../../freescale/common/fman.h"
uint8_t sfp_phy_config[][2] = {
@@ -33,6 +52,13 @@ int board_eth_init(bd_t *bis)
int ret;
int phy_addr = 0;
+#ifdef CONFIG_VSC9953
+ int lane;
+ phy_interface_t phy_int;
+ struct mii_dev *bus;
+ struct ccsr_scfg *scfg;
+#endif
+
uint32_t *gpio2_gpdir = (uint32_t *) 0xffe131000;
uint32_t *gpio2_gpdat = (uint32_t *) 0xffe131008;
uint32_t regval;
@@ -106,7 +132,6 @@ int board_eth_init(bd_t *bis)
*/
for (i = FM1_DTSEC1; i < FM1_DTSEC1 + CONFIG_SYS_NUM_FM1_DTSEC; i++) {
int idx = i - FM1_DTSEC1;
-
switch (fm_info_get_enet_if(i)) {
case PHY_INTERFACE_MODE_RGMII:
if (FM1_DTSEC4 == i)
@@ -116,7 +141,8 @@ int board_eth_init(bd_t *bis)
fm_info_set_phy_address(i, phy_addr);
break;
case PHY_INTERFACE_MODE_QSGMII:
- fm_info_set_phy_address(i, 0);
+ /* TODO, get fixed phy here */
+ fm_info_set_phy_address(i, i+2);
break;
case PHY_INTERFACE_MODE_NONE:
fm_info_set_phy_address(i, 0);
@@ -134,6 +160,44 @@ int board_eth_init(bd_t *bis)
fm_info_set_mdio(i,
miiphy_get_dev_by_name(DEFAULT_FM_MDIO_NAME));
}
+
+#ifdef CONFIG_VSC9953
+ for (i = 0; i < VSC9953_MAX_PORTS; i++) {
+ int lane = -1;
+ int phy_addr = 0;
+ int phy_int = PHY_INTERFACE_MODE_NONE;
+ switch (i) {
+ case 0:
+ case 1:
+ case 2:
+ vsc9953_port_enable(i);
+ vsc9953_port_info_set_phy_int(i, PHY_INTERFACE_MODE_SGMII);
+ break;
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ continue;
+ case 8:
+ /* FM1@DTSEC1 is connected to SW1@PORT8 */
+ vsc9953_port_enable(i);
+ break;
+ case 9:
+ /* Enable L2 On MAC2 using SCFG */
+ scfg = (struct ccsr_scfg *) CONFIG_SYS_MPC85xx_SCFG;
+
+ out_be32(&scfg->esgmiiselcr,
+ in_be32(&scfg->esgmiiselcr) |
+ (0x80000000));
+ vsc9953_port_enable(i);
+ break;
+ }
+ bus = lane;
+
+ }
+#endif
+
cpu_eth_init(bis);
#endif
return pci_eth_init(bis);