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-rw-r--r--board/coreboot/coreboot/Kconfig6
-rw-r--r--board/emulation/Kconfig25
-rw-r--r--board/emulation/qemu-x86/Kconfig24
-rw-r--r--board/emulation/qemu-x86/MAINTAINERS6
-rw-r--r--board/emulation/qemu-x86/Makefile7
-rw-r--r--board/emulation/qemu-x86/qemu-x86.c13
-rw-r--r--board/emulation/qemu-x86/start.S9
-rw-r--r--board/intel/crownbay/crownbay.c2
-rw-r--r--board/intel/galileo/galileo.c2
-rw-r--r--board/intel/minnowmax/minnowmax.c9
10 files changed, 95 insertions, 8 deletions
diff --git a/board/coreboot/coreboot/Kconfig b/board/coreboot/coreboot/Kconfig
index 6a04158..3ff64f4 100644
--- a/board/coreboot/coreboot/Kconfig
+++ b/board/coreboot/coreboot/Kconfig
@@ -16,21 +16,21 @@ comment "coreboot-specific options"
config SYS_CONFIG_NAME
string "Board configuration file"
- default "chromebook_link"
+ default "qemu-x86"
help
This option selects the board configuration file in include/configs/
directory to be used to build U-Boot for coreboot.
config DEFAULT_DEVICE_TREE
string "Board Device Tree Source (dts) file"
- default "chromebook_link"
+ default "qemu-x86_i440fx"
help
This option selects the board Device Tree Source (dts) file in
arch/x86/dts/ directory to be used to build U-Boot for coreboot.
config SYS_CAR_ADDR
hex "Board specific Cache-As-RAM (CAR) address"
- default 0x19200000
+ default 0x01920000
help
This option specifies the board specific Cache-As-RAM (CAR) address.
diff --git a/board/emulation/Kconfig b/board/emulation/Kconfig
new file mode 100644
index 0000000..36809fd
--- /dev/null
+++ b/board/emulation/Kconfig
@@ -0,0 +1,25 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+if VENDOR_EMULATION
+
+choice
+ prompt "Mainboard model"
+
+config TARGET_QEMU_X86
+ bool "QEMU x86"
+ help
+ This is the QEMU emulated x86 board. U-Boot supports running
+ as a coreboot payload as well as bare boot without coreboot.
+ There are two types of x86 boards supported by QEMU which are
+ supported by U-Boot. They are via QEMU '-M pc', an i440FX/PIIX
+ chipset platform and '-M q35', a Q35/ICH9 chipset platform.
+
+endchoice
+
+source "board/emulation/qemu-x86/Kconfig"
+
+endif
diff --git a/board/emulation/qemu-x86/Kconfig b/board/emulation/qemu-x86/Kconfig
new file mode 100644
index 0000000..e777ef4
--- /dev/null
+++ b/board/emulation/qemu-x86/Kconfig
@@ -0,0 +1,24 @@
+if TARGET_QEMU_X86
+
+config SYS_BOARD
+ default "qemu-x86"
+
+config SYS_VENDOR
+ default "emulation"
+
+config SYS_SOC
+ default "qemu"
+
+config SYS_CONFIG_NAME
+ default "qemu-x86"
+
+config SYS_TEXT_BASE
+ default 0xfff00000
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+ def_bool y
+ select X86_RESET_VECTOR
+ select QEMU
+ select BOARD_ROMSIZE_KB_1024
+
+endif
diff --git a/board/emulation/qemu-x86/MAINTAINERS b/board/emulation/qemu-x86/MAINTAINERS
new file mode 100644
index 0000000..ea4dd19
--- /dev/null
+++ b/board/emulation/qemu-x86/MAINTAINERS
@@ -0,0 +1,6 @@
+QEMU X86 BOARD
+M: Bin Meng <bmeng.cn@gmail.com>
+S: Maintained
+F: board/emulation/qemu-x86/
+F: include/configs/qemu-x86.h
+F: configs/qemu-x86_defconfig
diff --git a/board/emulation/qemu-x86/Makefile b/board/emulation/qemu-x86/Makefile
new file mode 100644
index 0000000..ad2bbb9
--- /dev/null
+++ b/board/emulation/qemu-x86/Makefile
@@ -0,0 +1,7 @@
+#
+# Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += qemu-x86.o start.o
diff --git a/board/emulation/qemu-x86/qemu-x86.c b/board/emulation/qemu-x86/qemu-x86.c
new file mode 100644
index 0000000..fedea81
--- /dev/null
+++ b/board/emulation/qemu-x86/qemu-x86.c
@@ -0,0 +1,13 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <netdev.h>
+
+int board_eth_init(bd_t *bis)
+{
+ return pci_eth_init(bis);
+}
diff --git a/board/emulation/qemu-x86/start.S b/board/emulation/qemu-x86/start.S
new file mode 100644
index 0000000..a71db69
--- /dev/null
+++ b/board/emulation/qemu-x86/start.S
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+.globl early_board_init
+early_board_init:
+ jmp early_board_init_ret
diff --git a/board/intel/crownbay/crownbay.c b/board/intel/crownbay/crownbay.c
index 31bb320..ad2d5b6 100644
--- a/board/intel/crownbay/crownbay.c
+++ b/board/intel/crownbay/crownbay.c
@@ -12,8 +12,6 @@
#define SERIAL_DEV PNP_DEV(0x2e, 4)
-DECLARE_GLOBAL_DATA_PTR;
-
int board_early_init_f(void)
{
lpc47m_enable_serial(SERIAL_DEV, UART0_BASE, UART0_IRQ);
diff --git a/board/intel/galileo/galileo.c b/board/intel/galileo/galileo.c
index f2e7468..746ab27 100644
--- a/board/intel/galileo/galileo.c
+++ b/board/intel/galileo/galileo.c
@@ -6,8 +6,6 @@
#include <common.h>
-DECLARE_GLOBAL_DATA_PTR;
-
int board_early_init_f(void)
{
return 0;
diff --git a/board/intel/minnowmax/minnowmax.c b/board/intel/minnowmax/minnowmax.c
index fd2070a..383cae0 100644
--- a/board/intel/minnowmax/minnowmax.c
+++ b/board/intel/minnowmax/minnowmax.c
@@ -5,6 +5,7 @@
*/
#include <common.h>
+#include <asm/gpio.h>
#include <asm/ibmpc.h>
#include <asm/pnp_def.h>
#include <netdev.h>
@@ -12,7 +13,13 @@
#define SERIAL_DEV PNP_DEV(0x2e, 4)
-DECLARE_GLOBAL_DATA_PTR;
+int arch_early_init_r(void)
+{
+ /* do the pin-muxing */
+ gpio_ich6_pinctrl_init();
+
+ return 0;
+}
int board_early_init_f(void)
{