diff options
Diffstat (limited to 'board')
28 files changed, 487 insertions, 129 deletions
diff --git a/board/AndesTech/adp-ae3xx/Kconfig b/board/AndesTech/adp-ae3xx/Kconfig new file mode 100644 index 0000000..8ec69d6 --- /dev/null +++ b/board/AndesTech/adp-ae3xx/Kconfig @@ -0,0 +1,18 @@ +if TARGET_ADP_AE3XX + +config SYS_CPU + default "n1213" + +config SYS_BOARD + default "adp-ae3xx" + +config SYS_VENDOR + default "AndesTech" + +config SYS_SOC + default "ae3xx" + +config SYS_CONFIG_NAME + default "adp-ae3xx" + +endif diff --git a/board/AndesTech/adp-ae3xx/MAINTAINERS b/board/AndesTech/adp-ae3xx/MAINTAINERS new file mode 100644 index 0000000..02e5a19 --- /dev/null +++ b/board/AndesTech/adp-ae3xx/MAINTAINERS @@ -0,0 +1,6 @@ +ADP-AG101P BOARD +M: Andes <uboot@andestech.com> +S: Maintained +F: board/AndesTech/adp-ae3xx/ +F: include/configs/adp-ae3xx.h +F: configs/adp-ae3xx_defconfig diff --git a/board/AndesTech/adp-ae3xx/Makefile b/board/AndesTech/adp-ae3xx/Makefile new file mode 100644 index 0000000..842dfb4 --- /dev/null +++ b/board/AndesTech/adp-ae3xx/Makefile @@ -0,0 +1,8 @@ +# +# Copyright (C) 2016 Andes Technology Corporation +# Rick Chen, Andes Technology Corporation <rick@andestech.com> +# +# SPDX-License-Identifier: GPL-2.0+ +# + +obj-y := adp-ae3xx.o diff --git a/board/AndesTech/adp-ae3xx/adp-ae3xx.c b/board/AndesTech/adp-ae3xx/adp-ae3xx.c new file mode 100644 index 0000000..ab174fa --- /dev/null +++ b/board/AndesTech/adp-ae3xx/adp-ae3xx.c @@ -0,0 +1,86 @@ +/* + * Copyright (C) 2011 Andes Technology Corporation + * Shawn Lin, Andes Technology Corporation <nobuhiro@andestech.com> + * Macpaul Lin, Andes Technology Corporation <macpaul@andestech.com> + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include <common.h> +#if defined(CONFIG_FTMAC100) +#include <netdev.h> +#endif +#include <linux/io.h> +#include <faraday/ftsdc010.h> +#include <faraday/ftsmc020.h> + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscellaneous platform dependent initializations + */ +int board_init(void) +{ + /* + * refer to BOOT_PARAMETER_PA_BASE within + * "linux/arch/nds32/include/asm/misc_spec.h" + */ + printf("Board: %s\n" , CONFIG_SYS_BOARD); + gd->bd->bi_arch_number = MACH_TYPE_ADPAE3XX; + gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; + return 0; +} + +int dram_init(void) +{ + unsigned long sdram_base = PHYS_SDRAM_0; + unsigned long expected_size = PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE; + unsigned long actual_size; + actual_size = get_ram_size((void *)sdram_base, expected_size); + gd->ram_size = actual_size; + if (expected_size != actual_size) { + printf("Warning: Only %lu of %lu MiB SDRAM is working\n", + actual_size >> 20, expected_size >> 20); + } + + return 0; +} + +int dram_init_banksize(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM_0; + gd->bd->bi_dram[0].size = PHYS_SDRAM_0_SIZE; + gd->bd->bi_dram[1].start = PHYS_SDRAM_1; + gd->bd->bi_dram[1].size = PHYS_SDRAM_1_SIZE; + + return 0; +} + +#if defined(CONFIG_FTMAC100) +int board_eth_init(bd_t *bd) +{ + return ftmac100_initialize(bd); +} +#endif + +ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) +{ + if (banknum == 0) { /* non-CFI boot flash */ + info->portwidth = FLASH_CFI_8BIT; + info->chipwidth = FLASH_CFI_BY8; + info->interface = FLASH_CFI_X8; + return 1; + } else { + return 0; + } +} + +int board_mmc_init(bd_t *bis) +{ +#ifndef CONFIG_DM_MMC +#ifdef CONFIG_FTSDC010 + ftsdc010_mmc_init(0); +#endif +#endif + return 0; +} diff --git a/board/AndesTech/adp-ag101p/adp-ag101p.c b/board/AndesTech/adp-ag101p/adp-ag101p.c index 805a266..0fd6fb0 100644 --- a/board/AndesTech/adp-ag101p/adp-ag101p.c +++ b/board/AndesTech/adp-ag101p/adp-ag101p.c @@ -7,8 +7,10 @@ */ #include <common.h> +#if defined(CONFIG_FTMAC100) #include <netdev.h> -#include <asm/io.h> +#endif +#include <linux/io.h> #include <faraday/ftsdc010.h> #include <faraday/ftsmc020.h> @@ -25,6 +27,7 @@ int board_init(void) * refer to BOOT_PARAMETER_PA_BASE within * "linux/arch/nds32/include/asm/misc_spec.h" */ + printf("Board: %s\n" , CONFIG_SYS_BOARD); gd->bd->bi_arch_number = MACH_TYPE_ADPAG101P; gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; @@ -59,10 +62,12 @@ int dram_init_banksize(void) return 0; } +#if defined(CONFIG_FTMAC100) int board_eth_init(bd_t *bd) { return ftmac100_initialize(bd); } +#endif ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) { @@ -78,6 +83,8 @@ ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) int board_mmc_init(bd_t *bis) { +#ifdef CONFIG_FTSDC010 ftsdc010_mmc_init(0); +#endif return 0; } diff --git a/board/freescale/common/Kconfig b/board/freescale/common/Kconfig index 8a9a9be..53b606e 100644 --- a/board/freescale/common/Kconfig +++ b/board/freescale/common/Kconfig @@ -1,6 +1,19 @@ config CHAIN_OF_TRUST depends on !FIT_SIGNATURE && SECURE_BOOT imply CMD_BLOB + imply CMD_HASH if ARM select FSL_CAAM + select SPL_BOARD_INIT if (ARM && SPL) + select SHA_HW_ACCEL + select SHA_PROG_HW_ACCEL bool default y + +config CMD_ESBC_VALIDATE + bool "Enable the 'esbc_validate' and 'esbc_halt' commands" + default y if CHAIN_OF_TRUST + help + This option enables two commands used for secure booting: + + esbc_validate - validate signature using RSA verification + esbc_halt - put the core in spin loop (Secure Boot Only) diff --git a/board/freescale/m5253demo/m5253demo.c b/board/freescale/m5253demo/m5253demo.c index c2cc2d7..3318368 100644 --- a/board/freescale/m5253demo/m5253demo.c +++ b/board/freescale/m5253demo/m5253demo.c @@ -88,7 +88,7 @@ int testdram(void) return (0); } -#ifdef CONFIG_CMD_IDE +#ifdef CONFIG_IDE #include <ata.h> int ide_preinit(void) { @@ -133,7 +133,7 @@ void ide_set_reset(int idereset) setbits_8(&ata->cr, 0x01); } } -#endif /* CONFIG_CMD_IDE */ +#endif /* CONFIG_IDE */ #ifdef CONFIG_DRIVER_DM9000 diff --git a/board/freescale/m5253evbe/m5253evbe.c b/board/freescale/m5253evbe/m5253evbe.c index c1ed431..2c6afad 100644 --- a/board/freescale/m5253evbe/m5253evbe.c +++ b/board/freescale/m5253evbe/m5253evbe.c @@ -81,7 +81,7 @@ int testdram(void) return (0); } -#ifdef CONFIG_CMD_IDE +#ifdef CONFIG_IDE #include <ata.h> int ide_preinit(void) { @@ -126,4 +126,4 @@ void ide_set_reset(int idereset) setbits_8(&ata->cr, 0x01); } } -#endif /* CONFIG_CMD_IDE */ +#endif /* CONFIG_IDE */ diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c index d6b0650..1e35970 100644 --- a/board/freescale/m54455evb/m54455evb.c +++ b/board/freescale/m54455evb/m54455evb.c @@ -88,7 +88,7 @@ int testdram(void) return (0); } -#if defined(CONFIG_CMD_IDE) +#if defined(CONFIG_IDE) #include <ata.h> int ide_preinit(void) diff --git a/board/gateworks/gw_ventana/Kconfig b/board/gateworks/gw_ventana/Kconfig index ccce98e..5d1bae4 100644 --- a/board/gateworks/gw_ventana/Kconfig +++ b/board/gateworks/gw_ventana/Kconfig @@ -9,4 +9,17 @@ config SYS_VENDOR config SYS_CONFIG_NAME default "gw_ventana" +config CMD_EECONFIG + bool "Enable the 'econfig' command" + help + Provides access to EEPROM configuration on Gateworks Ventana + +config CMD_GSC + bool "Enable the 'gsc' command" + help + Provides access to the GSC configuration: + + gsc sleep - sleeps for a period of seconds + gsc wd - enables / disables the watchdog + endif diff --git a/board/gdsys/405ep/dlvision-10g.c b/board/gdsys/405ep/dlvision-10g.c index e400d19..b531786 100644 --- a/board/gdsys/405ep/dlvision-10g.c +++ b/board/gdsys/405ep/dlvision-10g.c @@ -10,7 +10,6 @@ #include <asm/processor.h> #include <asm/io.h> #include <asm/ppc4xx-gpio.h> -#include <dtt.h> #include "405ep.h" #include <gdsys_fpga.h> @@ -61,8 +60,13 @@ struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR; int misc_init_r(void) { - /* startup fans */ - dtt_init(); + /* + * Note: DTT has been removed. Please use UCLASS_THERMAL. + * + * startup fans + * + * dtt_init(); + */ return 0; } diff --git a/board/gdsys/405ep/io.c b/board/gdsys/405ep/io.c index 81b4965..1484469 100644 --- a/board/gdsys/405ep/io.c +++ b/board/gdsys/405ep/io.c @@ -11,7 +11,6 @@ #include <asm/io.h> #include <asm/ppc4xx-gpio.h> -#include <dtt.h> #include <miiphy.h> #include "405ep.h" @@ -41,8 +40,13 @@ struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR; int misc_init_r(void) { - /* startup fans */ - dtt_init(); + /* + * Note: DTT has been removed. Please use UCLASS_THERMAL. + * + * startup fans + * + * dtt_init(); + */ return 0; } diff --git a/board/gdsys/405ep/neo.c b/board/gdsys/405ep/neo.c index ff0edb2..ad88af2 100644 --- a/board/gdsys/405ep/neo.c +++ b/board/gdsys/405ep/neo.c @@ -10,7 +10,6 @@ #include <asm/processor.h> #include <asm/io.h> #include <asm/ppc4xx-gpio.h> -#include <dtt.h> #include "405ep.h" #include <gdsys_fpga.h> @@ -32,8 +31,13 @@ struct ihs_fpga *fpga_ptr[] = CONFIG_SYS_FPGA_PTR; int misc_init_r(void) { - /* startup fans */ - dtt_init(); + /* + * Note: DTT has been removed. Please use UCLASS_THERMAL. + * + * startup fans + * + * dtt_init(); + */ return 0; } diff --git a/board/gdsys/405ex/io64.c b/board/gdsys/405ex/io64.c index 0a7baaa..9ef965b 100644 --- a/board/gdsys/405ex/io64.c +++ b/board/gdsys/405ex/io64.c @@ -26,7 +26,6 @@ #include <miiphy.h> #include <i2c.h> -#include <dtt.h> DECLARE_GLOBAL_DATA_PTR; @@ -70,8 +69,13 @@ static inline void blank_string(int size) */ int misc_init_r(void) { - /* startup fans */ - dtt_init(); + /* + * Note: DTT has been removed. Please use UCLASS_THERMAL. + * + * startup fans + * + * dtt_init(); + */ #ifdef CONFIG_ENV_IS_IN_FLASH /* Monitor protection ON by default */ diff --git a/board/gdsys/mpc8308/Kconfig b/board/gdsys/mpc8308/Kconfig index 9a1a3a2..cb29c25 100644 --- a/board/gdsys/mpc8308/Kconfig +++ b/board/gdsys/mpc8308/Kconfig @@ -23,3 +23,8 @@ config SYS_CONFIG_NAME default "strider" endif + +config CMD_IOLOOP + bool "Enable 'ioloop' and 'ioreflect' commands" + help + These commands provide FPGA tests. diff --git a/board/intercontrol/digsy_mtc/digsy_mtc.c b/board/intercontrol/digsy_mtc/digsy_mtc.c index b8bc045..6c33eeb 100644 --- a/board/intercontrol/digsy_mtc/digsy_mtc.c +++ b/board/intercontrol/digsy_mtc/digsy_mtc.c @@ -325,7 +325,7 @@ void pci_init_board(void) } #endif -#ifdef CONFIG_CMD_IDE +#ifdef CONFIG_IDE #ifdef CONFIG_IDE_RESET @@ -369,7 +369,7 @@ void ide_set_reset(int idereset) setbits_be32((void *)MPC5XXX_WU_GPIO_ENABLE, (1 << 25)); } #endif /* CONFIG_IDE_RESET */ -#endif /* CONFIG_CMD_IDE */ +#endif /* CONFIG_IDE */ #ifdef CONFIG_OF_BOARD_SETUP static void ft_delete_node(void *fdt, const char *compat) diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c index ea24eaa..52d2766 100644 --- a/board/jupiter/jupiter.c +++ b/board/jupiter/jupiter.c @@ -259,7 +259,7 @@ void pci_init_board(void) } #endif -#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) +#if defined(CONFIG_IDE) && defined(CONFIG_IDE_RESET) void init_ide_reset (void) { diff --git a/board/phytec/pcm030/pcm030.c b/board/phytec/pcm030/pcm030.c index 983559e..bdd980d 100644 --- a/board/phytec/pcm030/pcm030.c +++ b/board/phytec/pcm030/pcm030.c @@ -176,7 +176,7 @@ int ft_board_setup(void *blob, bd_t *bd) } #endif /* CONFIG_OF_BOARD_SETUP */ -#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) +#if defined(CONFIG_IDE) && defined(CONFIG_IDE_RESET) #define GPIO_PSC2_4 0x02000000UL @@ -206,4 +206,4 @@ void ide_set_reset(int idereset) } else setbits_be32(&wu_gpio->dvo, GPIO_PSC2_4); } -#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */ +#endif /* defined(CONFIG_IDE) && defined(CONFIG_IDE_RESET) */ diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 1c88173..a512a20 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -72,7 +72,6 @@ F: configs/q8_a33_tablet_1024x600_defconfig F: include/configs/sun9i.h F: configs/Merrii_A80_Optimus_defconfig F: include/configs/sun50i.h -F: configs/pine64_plus_defconfig A20-OLIMEX-SOM-EVB BOARD M: Marcus Cooper <codekipper@gmail.com> @@ -263,6 +262,11 @@ M: Andre Przywara <andre.przywara@arm.com> S: Maintained F: configs/orangepi_pc2_defconfig +PINE64 BOARDS +M: Andre Przywara <andre.przywara@arm.com> +S: Maintained +F: configs/pine64_plus_defconfig + R16 EVB PARROT BOARD M: Quentin Schulz <quentin.schulz@free-electrons.com> S: Maintained diff --git a/board/sunxi/README.pine64 b/board/sunxi/README.pine64 deleted file mode 100644 index 5553415..0000000 --- a/board/sunxi/README.pine64 +++ /dev/null @@ -1,98 +0,0 @@ -Pine64 board README -==================== - -The Pine64(+) is a single board computer equipped with an AArch64 capable ARMv8 -compliant Allwinner A64 SoC. -This chip has ARM Cortex A-53 cores and thus can run both in AArch32 -(compatible to 32-bit ARMv7) and AArch64 modes. Upon reset the SoC starts -in AArch32 mode and executes 32-bit code from the Boot ROM (BROM). -This has some implications on U-Boot. - -Quick start -============ -- Get hold of a boot0.img file (see below for more details). -- Get the boot0img tool source from the tools directory in [1] and compile - that on your host. -- Build U-Boot: -$ export CROSS_COMPILE=aarch64-linux-gnu- -$ make pine64_plus_defconfig -$ make -- You also need a compiled ARM Trusted Firmware (ATF) binary. Checkout the - "allwinner" branch from the github repository [2] and build it: -$ export CROSS_COMPILE=aarch64-linux-gnu- -$ make PLAT=sun50iw1p1 DEBUG=1 bl31 - The resulting binary is build/sun50iw1p1/debug/bl31.bin. - -Now put an empty (or disposable) micro SD card in your card reader and learn -its device file name, replacing /dev/sd<x> below with the result (that could -be /dev/mmcblk<x> as well): - -$ ./boot0img --device /dev/sd<x> -e -u u-boot.bin -B boot0.img \ - -d trampoline64:0x44000 -s bl31.bin -a 0x44008 -p 100 -(either copying the respective files to the working directory or specifying -the paths directly) - -This will create a new partition table (with a 100 MB FAT boot partition), -copies boot0.img, ATF and U-Boot to the proper locations on the SD card and -will fill in the magic Allwinner header to be recognized by boot0. -Prefix the above call with "sudo" if you don't have write access to the -uSD card. You can also use "-o output.img" instead of "--device /dev/sd<x>" -to create an image file and "dd" that to the uSD card. -Omitting the "-p" option will skip the partition table. - -Now put this uSD card in the board and power it on. You should be greeted by -the U-Boot prompt. - - -Main U-Boot -============ -The main U-Boot proper is a real 64-bit ARMv8 port and runs entirely in the -64-bit AArch64 mode. It can load any AArch64 code, EFI applications or arm64 -Linux kernel images (often named "Image") using the booti command. -Launching 32-bit code and kernels is technically possible, though not without -drawbacks (or hacks to avoid them) and currently not implemented. - -SPL support -============ -The main task of the SPL support is to bring up the DRAM controller and make -DRAM actually accessible. At the moment there is no documentation or source -code available which would do this. -There are currently two ways to overcome this situation: using a tainted 32-bit -SPL (involving some hacks and resulting in a non-redistributable binary, thus -not described here) or using the Allwinner boot0 blob. - -boot0 method -------------- -boot0 is Allwiner's secondary program loader and it can be used as some kind -of SPL replacement to get U-Boot up and running. -The binary is a 32 KByte blob and contained on every Pine64 image distributed -so far. It can be easily extracted from a micro SD card or an image file: -# dd if=/dev/sd<x> of=boot0.bin bs=8k skip=1 count=4 -where /dev/sd<x> is the device name of the uSD card or the name of the image -file. Apparently Allwinner allows re-distribution of this proprietary code -as-is. -For the time being this boot0 blob is the only redistributable way of making -U-Boot work on the Pine64. Beside loading the various parts of the (original) -firmware it also switches the core into AArch64 mode. -The original boot0 code looks for U-Boot at a certain place on an uSD card -(at 19096 KB), also it expects a header with magic bytes and a checksum. -There is a tool called boot0img[1] which takes a boot0.bin image and a compiled -U-Boot binary (plus other binaries) and will populate that header accordingly. -To make space for the magic header, the pine64_plus_defconfig will make sure -there is sufficient space at the beginning of the U-Boot binary. -boot0img will also take care of putting the different binaries at the right -places on the uSD card and works around unused, but mandatory parts by using -trampoline code. See the output of "boot0img -h" for more information. -boot0img can also patch boot0 to avoid loading U-Boot from 19MB, instead -fetching it from just behind the boot0 binary (-B option). - -FEL boot -========= -FEL is the name of the Allwinner defined USB boot protocol built-in the -mask ROM of most Allwinner SoCs. It allows to bootstrap a board solely -by using the USB-OTG interface and a host port on another computer. -Since FEL boot does not work with boot0, it requires the libdram hack, which -is not described here. - -[1] https://github.com/apritzel/pine64/ -[2] https://github.com/apritzel/arm-trusted-firmware.git diff --git a/board/sunxi/README.sunxi64 b/board/sunxi/README.sunxi64 new file mode 100644 index 0000000..c492f74 --- /dev/null +++ b/board/sunxi/README.sunxi64 @@ -0,0 +1,165 @@ +Allwinner 64-bit boards README +============================== + +Newer Allwinner SoCs feature ARMv8 cores (ARM Cortex-A53) with support for +both the 64-bit AArch64 mode and the ARMv7 compatible 32-bit AArch32 mode. +Examples are the Allwinner A64 (used for instance on the Pine64 board) or +the Allwinner H5 SoC (as used on the OrangePi PC 2). +These SoCs are wired to start in AArch32 mode on reset and execute 32-bit +code from the Boot ROM (BROM). As this has some implications on U-Boot, this +file describes how to make full use of the 64-bit capabilities. + +Quick Start / Overview +====================== +- Build the ARM Trusted Firmware binary (see "ARM Trusted Firmware (ATF)" below) +- Build U-Boot (see "SPL/U-Boot" below) +- Transfer to an uSD card (see "microSD card" below) +- Boot and enjoy! + +Building the firmware +===================== + +The Allwinner A64/H5 firmware consists of three parts: U-Boot's SPL, an +ARM Trusted Firmware (ATF) build and the U-Boot proper. +The SPL will load both ATF and U-Boot proper along with the right device +tree blob (.dtb) and will pass execution to ATF (in EL3), which in turn will +drop into the U-Boot proper (in EL2). +As the ATF binary will become part of the U-Boot image file, you will need +to build it first. + + ARM Trusted Firmware (ATF) +---------------------------- +Checkout the "allwinner" branch from the github repository [1] and build it: +$ export CROSS_COMPILE=aarch64-linux-gnu- +$ make PLAT=sun50iw1p1 DEBUG=1 bl31 +The resulting binary is build/sun50iw1p1/debug/bl31.bin. Either put the +location of this file into the BL31 environment variable or copy this to +the root of your U-Boot build directory (or create a symbolic link). +$ export BL31=/src/arm-trusted-firmware/build/sun50iw1p1/debug/bl31.bin + (adjust the actual path accordingly) + + SPL/U-Boot +------------ +Both U-Boot proper and the SPL are using the 64-bit mode. As the boot ROM +enters the SPL still in AArch32 secure SVC mode, there is some shim code to +enter AArch64 very early. The rest of the SPL runs in AArch64 EL3. +U-Boot proper runs in EL2 and can load any AArch64 code (using the "go" +command), EFI applications (with "bootefi") or arm64 Linux kernel images +(often named "Image"), using the "booti" command. + +$ make clean +$ export CROSS_COMPILE=aarch64-linux-gnu- +$ make pine64_plus_defconfig +$ make + +This will build the SPL in spl/sunxi-spl.bin and a FIT image called u-boot.itb, +which contains the rest of the firmware. + + +Boot process +============ +The on-die BROM code will try several methods to load and execute the firmware. +On a typical board like the Pine64 this will result in the following boot order: + +1) Reading 32KB from sector 16 (@8K) of the microSD card to SRAM A1. If the +BROM finds the magic "eGON" header in the first bytes, it will execute that +code. If not (no SD card at all or invalid magic), it will: +2) Try to read 32KB from sector 16 (@8K) of memory connected to the MMC2 +controller, typically an on-board eMMC chip. If there is no eMMC or it does +not contain a valid boot header, it will: +3) Initialize the SPI0 controller and try to access a NOR flash connected to +it (using the CS0 pin). If a flash chip is found, the BROM will load the +first 32KB (from offset 0) into SRAM A1. Now it checks for the magic eGON +header and checksum and will execute the code upon finding it. If not, it will: +4) Initialize the USB OTG controller and will wait for a host to connect to +it, speaking the Allwinner proprietary (but deciphered) "FEL" USB protocol. + + +To boot the Pine64 board, you can use U-Boot and any of the described methods. + +FEL boot (USB OTG) +------------------ +FEL is the name of the Allwinner defined USB boot protocol built in the +mask ROM of most Allwinner SoCs. It allows to bootstrap a board solely +by using the USB-OTG interface and a host port on another computer. +As the FEL mode is controlled by the boot ROM, it expects to be running in +AArch32. For now the AArch64 SPL cannot properly return into FEL mode, so the +feature is disabled in the configuration at the moment. + +microSD card +------------ +Transfer the SPL and the U-Boot FIT image directly to an uSD card: +# dd if=spl/sunxi-spl.bin of=/dev/sdx bs=8k seek=1 +# dd if=u-boot.itb of=/dev/sdx bs=8k seek=5 +# sync +(replace /dev/sdx with you SD card device file name, which could be +/dev/mmcblk[x] as well). + +Alternatively you can concatenate the SPL and the U-Boot FIT image into a +single file and transfer that instead: +$ cat spl/sunxi-spl.bin u-boot.itb > u-boot-sunxi-with-spl.bin +# dd if=u-boot-sunxi-with-spl.bin of=/dev/sdx bs=8k seek=1 + +You can partition the microSD card, but leave the first MB unallocated (most +partitioning tools will do this anyway). + +NOR flash +--------- +Some boards (like the SoPine, Pinebook or the OrangePi PC2) come with a +soldered SPI NOR flash chip. On other boards like the Pine64 such a chip +can be connected to the SPI0/CS0 pins on the PI-2 headers. +Create the SPL and FIT image like described above for the SD card. +Now connect either an "A to A" USB cable to the upper USB port on the Pine64 +or get an adaptor and use a regular A-microB cable connected to it. Other +boards often have a proper micro-B USB socket connected to the USB OTB port. +Remove a microSD card from the slot and power on the board. +On your host computer download and build the sunxi-tools package[2], then +use "sunxi-fel" to access the board: +$ ./sunxi-fel ver -v -p +This should give you an output starting with: AWUSBFEX soc=00001689(A64) ... +Now use the sunxi-fel tool to write to the NOR flash: +$ ./sunxi-fel spiflash-write 0 spl/sunxi-spl.bin +$ ./sunxi-fel spiflash-write 32768 u-boot.itb +Now boot the board without an SD card inserted and you should see the +U-Boot prompt on the serial console. + +(Legacy) boot0 method +--------------------- +boot0 is Allwiner's secondary program loader and it can be used as some kind +of SPL replacement to get U-Boot up and running from an microSD card. +For some time using boot0 was the only option to get the Pine64 booted. +With working DRAM init code in U-Boot's SPL this is no longer necessary, +but this method is described here for the sake of completeness. +Please note that this method works only with the boot0 files shipped with +A64 based boards, the H5 uses an incompatible layout which is not supported +by this method. + +The boot0 binary is a 32 KByte blob and contained in the official Pine64 images +distributed by Pine64 or Allwinner. It can be easily extracted from a micro +SD card or an image file: +# dd if=/dev/sd<x> of=boot0.bin bs=8k skip=1 count=4 +where /dev/sd<x> is the device name of the uSD card or the name of the image +file. Apparently Allwinner allows re-distribution of this proprietary code +"as-is". +This boot0 blob takes care of DRAM initialisation and loads the remaining +firmware parts, then switches the core into AArch64 mode. +The original boot0 code looks for U-Boot at a certain place on an uSD card +(at 19096 KB), also it expects a header with magic bytes and a checksum. +There is a tool called boot0img[3] which takes a boot0.bin image and a compiled +U-Boot binary (plus other binaries) and will populate that header accordingly. +To make space for the magic header, the pine64_plus_defconfig will make sure +there is sufficient space at the beginning of the U-Boot binary. +boot0img will also take care of putting the different binaries at the right +places on the uSD card and works around unused, but mandatory parts by using +trampoline code. See the output of "boot0img -h" for more information. +boot0img can also patch boot0 to avoid loading U-Boot from 19MB, instead +fetching it from just behind the boot0 binary (-B option). +$ ./boot0img -o firmware.img -B boot0.img -u u-boot-dtb.bin -e -s bl31.bin \ +-a 0x44008 -d trampoline64:0x44000 +Then write this image to a microSD card, replacing /dev/sdx with the right +device file (see above): +$ dd if=firmware.img of=/dev/sdx bs=8k seek=1 + +[1] https://github.com/apritzel/arm-trusted-firmware.git +[2] git://github.com/linux-sunxi/sunxi-tools.git +[3] https://github.com/apritzel/pine64/ diff --git a/board/sunxi/board.c b/board/sunxi/board.c index 4404edb..f79bd5c 100644 --- a/board/sunxi/board.c +++ b/board/sunxi/board.c @@ -512,7 +512,6 @@ int board_mmc_init(bd_t *bis) void sunxi_board_init(void) { int power_failed = 0; - unsigned long ramsize; #ifdef CONFIG_SY8106A_POWER power_failed = sy8106a_set_vout1(CONFIG_SY8106A_VOUT1_VOLT); @@ -573,9 +572,9 @@ void sunxi_board_init(void) #endif #endif printf("DRAM:"); - ramsize = sunxi_dram_init(); - printf(" %d MiB\n", (int)(ramsize >> 20)); - if (!ramsize) + gd->ram_size = sunxi_dram_init(); + printf(" %d MiB\n", (int)(gd->ram_size >> 20)); + if (!gd->ram_size) hang(); /* @@ -758,3 +757,32 @@ int ft_board_setup(void *blob, bd_t *bd) #endif return 0; } + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + struct boot_file_head *spl = (void *)(ulong)SPL_ADDR; + const char *cmp_str = (void *)(ulong)SPL_ADDR; + + /* Check if there is a DT name stored in the SPL header and use that. */ + if (spl->dt_name_offset) { + cmp_str += spl->dt_name_offset; + } else { +#ifdef CONFIG_DEFAULT_DEVICE_TREE + cmp_str = CONFIG_DEFAULT_DEVICE_TREE; +#else + return 0; +#endif + }; + +/* Differentiate the two Pine64 board DTs by their DRAM size. */ + if (strstr(name, "-pine64") && strstr(cmp_str, "-pine64")) { + if ((gd->ram_size > 512 * 1024 * 1024)) + return !strstr(name, "plus"); + else + return !!strstr(name, "plus"); + } else { + return strcmp(name, cmp_str); + } +} +#endif diff --git a/board/sunxi/mksunxi_fit_atf.sh b/board/sunxi/mksunxi_fit_atf.sh new file mode 100755 index 0000000..b1d6e0e --- /dev/null +++ b/board/sunxi/mksunxi_fit_atf.sh @@ -0,0 +1,81 @@ +#!/bin/sh +# +# script to generate FIT image source for 64-bit sunxi boards with +# ARM Trusted Firmware and multiple device trees (given on the command line) +# +# usage: $0 <dt_name> [<dt_name> [<dt_name] ...] + +[ -z "$BL31" ] && BL31="bl31.bin" + +if [ ! -f $BL31 ]; then + echo "WARNING: BL31 file $BL31 NOT found, resulting binary is non-functional" >&2 + echo "Please read the section on ARM Trusted Firmware (ATF) in board/sunxi/README.sunxi64" >&2 + BL31=/dev/null +fi + +cat << __HEADER_EOF +/dts-v1/; + +/ { + description = "Configuration to load ATF before U-Boot"; + #address-cells = <1>; + + images { + uboot@1 { + description = "U-Boot (64-bit)"; + data = /incbin/("u-boot-nodtb.bin"); + type = "standalone"; + arch = "arm64"; + compression = "none"; + load = <0x4a000000>; + }; + atf@1 { + description = "ARM Trusted Firmware"; + data = /incbin/("$BL31"); + type = "firmware"; + arch = "arm64"; + compression = "none"; + load = <0x44000>; + entry = <0x44000>; + }; +__HEADER_EOF + +cnt=1 +for dtname in $* +do + cat << __FDT_IMAGE_EOF + fdt@$cnt { + description = "$(basename $dtname .dtb)"; + data = /incbin/("$dtname"); + type = "flat_dt"; + compression = "none"; + }; +__FDT_IMAGE_EOF + cnt=$((cnt+1)) +done + +cat << __CONF_HEADER_EOF + }; + configurations { + default = "config@1"; + +__CONF_HEADER_EOF + +cnt=1 +for dtname in $* +do + cat << __CONF_SECTION_EOF + config@$cnt { + description = "$(basename $dtname .dtb)"; + firmware = "uboot@1"; + loadables = "atf@1"; + fdt = "fdt@$cnt"; + }; +__CONF_SECTION_EOF + cnt=$((cnt+1)) +done + +cat << __ITS_EOF + }; +}; +__ITS_EOF diff --git a/board/ti/common/Kconfig b/board/ti/common/Kconfig index 08c39d9..1187cf5 100644 --- a/board/ti/common/Kconfig +++ b/board/ti/common/Kconfig @@ -20,6 +20,7 @@ config TI_COMMON_CMD_OPTIONS imply CMD_BOOTZ imply CMD_DFU if USB_GADGET_DOWNLOAD imply CMD_DHCP + imply CMD_EEPROM imply CMD_EXT2 imply CMD_EXT4 imply CMD_EXT4_WRITE diff --git a/board/tqc/tqm5200/tqm5200.c b/board/tqc/tqm5200/tqm5200.c index c48ab11..cb99afd 100644 --- a/board/tqc/tqm5200/tqm5200.c +++ b/board/tqc/tqm5200/tqm5200.c @@ -312,7 +312,7 @@ void pci_init_board(void) } #endif -#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) +#if defined(CONFIG_IDE) && defined(CONFIG_IDE_RESET) #if defined (CONFIG_MINIFAP) #define SM501_POWER_MODE0_GATE 0x00000040UL diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c index 73227c1..e680b7b 100644 --- a/board/v38b/v38b.c +++ b/board/v38b/v38b.c @@ -224,7 +224,7 @@ int misc_init_r(void) return 0; } -#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) +#if defined(CONFIG_IDE) && defined(CONFIG_IDE_RESET) void init_ide_reset(void) { debug("init_ide_reset\n"); diff --git a/board/work-microwave/work_92105/Kconfig b/board/work-microwave/work_92105/Kconfig index 74f004f..1fde4b2 100644 --- a/board/work-microwave/work_92105/Kconfig +++ b/board/work-microwave/work_92105/Kconfig @@ -12,4 +12,9 @@ config SYS_SOC config SYS_CONFIG_NAME default "work_92105" +config CMD_HD44760 + bool "Enable 'hd44780' LCD-control comand" + help + This controls the LCD driver. + endif diff --git a/board/work-microwave/work_92105/work_92105_display.c b/board/work-microwave/work_92105/work_92105_display.c index 3d7438e..37a7363 100644 --- a/board/work-microwave/work_92105/work_92105_display.c +++ b/board/work-microwave/work_92105/work_92105_display.c @@ -346,4 +346,4 @@ U_BOOT_CMD( "HD44780 LCD driver control", hd44780_help_text ); -#endif /* CONFIG_CMD_HD44780 */ +#endif /* CONFIG_CMD_HD44760 */ |