summaryrefslogtreecommitdiff
path: root/board
diff options
context:
space:
mode:
Diffstat (limited to 'board')
-rw-r--r--board/atum8548/atum8548.c20
-rw-r--r--board/freescale/corenet_ds/corenet_ds.c15
-rw-r--r--board/freescale/corenet_ds/pci.c16
-rw-r--r--board/freescale/mpc8536ds/mpc8536ds.c24
-rw-r--r--board/freescale/mpc8540ads/mpc8540ads.c4
-rw-r--r--board/freescale/mpc8541cds/mpc8541cds.c6
-rw-r--r--board/freescale/mpc8544ds/mpc8544ds.c28
-rw-r--r--board/freescale/mpc8548cds/mpc8548cds.c16
-rw-r--r--board/freescale/mpc8555cds/mpc8555cds.c6
-rw-r--r--board/freescale/mpc8560ads/mpc8560ads.c4
-rw-r--r--board/freescale/mpc8568mds/mpc8568mds.c8
-rw-r--r--board/freescale/mpc8569mds/mpc8569mds.c8
-rw-r--r--board/freescale/mpc8572ds/mpc8572ds.c28
-rw-r--r--board/freescale/mpc8610hpcd/mpc8610hpcd.c20
-rw-r--r--board/freescale/mpc8641hpcn/mpc8641hpcn.c18
-rw-r--r--board/freescale/p1022ds/p1022ds.c8
-rw-r--r--board/freescale/p1_p2_rdb/p1_p2_rdb.c4
-rw-r--r--board/freescale/p1_p2_rdb/pci.c18
-rw-r--r--board/freescale/p2020ds/p2020ds.c28
-rw-r--r--board/pm854/pm854.c4
-rw-r--r--board/pm856/pm856.c4
-rw-r--r--board/sbc8548/sbc8548.c8
-rw-r--r--board/sbc8641d/sbc8641d.c18
-rw-r--r--board/tqc/tqm85xx/tqm85xx.c10
-rw-r--r--board/xes/common/fsl_8xxx_pci.c16
25 files changed, 178 insertions, 161 deletions
diff --git a/board/atum8548/atum8548.c b/board/atum8548/atum8548.c
index 671f9e9..9403e4b 100644
--- a/board/atum8548/atum8548.c
+++ b/board/atum8548/atum8548.c
@@ -193,13 +193,13 @@ void pci_init_board(void)
if (io_sel & 1) {
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
- printf (" eTSEC1 is in sgmii mode.\n");
+ printf("eTSEC1 is in sgmii mode.\n");
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
- printf (" eTSEC2 is in sgmii mode.\n");
+ printf("eTSEC2 is in sgmii mode.\n");
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
- printf (" eTSEC3 is in sgmii mode.\n");
+ printf("eTSEC3 is in sgmii mode.\n");
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
- printf (" eTSEC4 is in sgmii mode.\n");
+ printf("eTSEC4 is in sgmii mode.\n");
}
#ifdef CONFIG_PCIE1
@@ -218,14 +218,14 @@ void pci_init_board(void)
pcie1_hose.region_count = 1;
#endif
- printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
+ printf ("PCIE1: connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
@@ -242,7 +242,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+ printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
@@ -254,7 +254,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf (" PCI: disabled\n");
+ printf("PCI1: disabled\n");
}
puts("\n");
@@ -267,11 +267,11 @@ void pci_init_board(void)
SET_STD_PCI_INFO(pci_info[num], 2);
pci_agent = fsl_setup_hose(&pci2_hose, pci_info[num].regs);
- puts (" PCI2\n");
+ puts("PCI2\n");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf (" PCI2: disabled\n");
+ printf("PCI2: disabled\n");
}
puts("\n");
#else
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index 68c63ac..f183cf6 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -45,6 +45,8 @@ int checkboard (void)
{
u8 sw;
struct cpu_type *cpu = gd->cpu;
+ ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+ unsigned int i;
printf("Board: %sDS, ", cpu->name);
printf("Sys ID: 0x%02x, Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
@@ -66,6 +68,19 @@ int checkboard (void)
puts("36-bit Addressing\n");
#endif
+ /* Display the RCW, so that no one gets confused as to what RCW
+ * we're actually using for this boot.
+ */
+ puts("Reset Configuration Word (RCW):");
+ for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
+ u32 rcw = in_be32(&gur->rcwsr[i]);
+
+ if ((i % 4) == 0)
+ printf("\n %08x:", i * 4);
+ printf(" %08x", rcw);
+ }
+ puts("\n");
+
/* Display the actual SERDES reference clocks as configured by the
* dip switches on the board. Note that the SWx registers could
* technically be set to force the reference clocks to match the
diff --git a/board/freescale/corenet_ds/pci.c b/board/freescale/corenet_ds/pci.c
index e1bca19..775b623 100644
--- a/board/freescale/corenet_ds/pci.c
+++ b/board/freescale/corenet_ds/pci.c
@@ -68,13 +68,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_1);
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf(" PCIE1 connected to Slot 1 as %s (base addr %lx)\n",
+ printf("PCIE1: connected to Slot 1 as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE1); /* disable */
@@ -90,13 +90,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_2);
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf(" PCIE2 connected to Slot 3 as %s (base addr %lx)\n",
+ printf("PCIE2: connected to Slot 3 as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
- printf (" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE2); /* disable */
@@ -112,13 +112,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_3);
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
- printf(" PCIE3 connected to Slot 2 as %s (base addr %lx)\n",
+ printf("PCIE3: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
} else {
- printf (" PCIE3: disabled\n");
+ printf("PCIE3: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE3); /* disable */
@@ -134,13 +134,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_4);
SET_STD_PCIE_INFO(pci_info[num], 4);
pcie_ep = fsl_setup_hose(&pcie4_hose, pci_info[num].regs);
- printf(" PCIE4 connected to as %s (base addr %lx)\n",
+ printf("PCIE4: connected to as %s (base addr %lx)\n",
pcie_ep ? "End Point" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie4_hose, first_free_busno);
} else {
- printf (" PCIE4: disabled\n");
+ printf("PCIE4: disabled\n");
}
#else
setbits_be32(&gur->devdisr, FSL_CORENET_DEVDISR_PCIE4); /* disable */
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index c8e0856..cf92ba1 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -211,12 +211,12 @@ void pci_init_board(void)
devdisr, sdrs2_io_sel, io_sel);
if (sdrs2_io_sel == 7)
- printf(" Serdes2 disalbed\n");
+ printf("Serdes2 disalbed\n");
else if (sdrs2_io_sel == 4) {
- printf(" eTSEC1 is in sgmii mode.\n");
- printf(" eTSEC3 is in sgmii mode.\n");
+ printf("eTSEC1 is in sgmii mode.\n");
+ printf("eTSEC3 is in sgmii mode.\n");
} else if (sdrs2_io_sel == 6)
- printf(" eTSEC1 is in sgmii mode.\n");
+ printf("eTSEC1 is in sgmii mode.\n");
puts("\n");
#ifdef CONFIG_PCIE3
@@ -229,13 +229,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_3);
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
- printf (" PCIE3 connected to Slot3 as %s (base address %lx)\n",
+ printf("PCIE3: connected to Slot3 as %s (base address %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
} else {
- printf (" PCIE3: disabled\n");
+ printf("PCIE3: disabled\n");
}
puts("\n");
@@ -253,13 +253,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_1);
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf (" PCIE1 connected to Slot1 as %s (base address %lx)\n",
+ printf("PCIE1: connected to Slot1 as %s (base address %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
@@ -277,13 +277,13 @@ void pci_init_board(void)
LAW_TRGT_IF_PCIE_2);
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf (" PCIE2 connected to Slot 2 as %s (base address %lx)\n",
+ printf("PCIE2: connected to Slot 2 as %s (base address %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
- printf (" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
puts("\n");
@@ -304,7 +304,7 @@ void pci_init_board(void)
LAW_TRGT_IF_PCI);
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+ printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
@@ -316,7 +316,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf (" PCI: disabled\n");
+ printf("PCI: disabled\n");
}
puts("\n");
diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c
index f9ff827..d354a26 100644
--- a/board/freescale/mpc8540ads/mpc8540ads.c
+++ b/board/freescale/mpc8540ads/mpc8540ads.c
@@ -47,10 +47,10 @@ int checkboard (void)
puts("Board: ADS\n");
#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
+ printf("PCI1: 32 bit, %d MHz (compiled)\n",
CONFIG_SYS_CLK_FREQ / 1000000);
#else
- printf(" PCI1: disabled\n");
+ printf("PCI1: disabled\n");
#endif
/*
diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index 0580fe7..59ec604 100644
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -221,17 +221,17 @@ int checkboard (void)
MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
- printf (" PCI1: %d bit, %s MHz, %s\n",
+ printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
(pci1_speed == 33000000) ? "33" :
(pci1_speed == 66000000) ? "66" : "unknown",
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {
- printf (" PCI2: 32 bit, 66 MHz, %s\n",
+ printf("PCI2: 32 bit, 66 MHz, %s\n",
pci2_clk_sel ? "sync" : "async");
} else {
- printf (" PCI2: disabled\n");
+ printf("PCI2: disabled\n");
}
/*
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index da3a2b6..31c3fad 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -120,9 +120,9 @@ void pci_init_board(void)
if (io_sel & 1) {
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
- printf (" eTSEC1 is in sgmii mode.\n");
+ printf("eTSEC1 is in sgmii mode.\n");
if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
- printf (" eTSEC3 is in sgmii mode.\n");
+ printf("eTSEC3 is in sgmii mode.\n");
}
puts("\n");
@@ -142,9 +142,9 @@ void pci_init_board(void)
pcie3_hose.region_count = 1;
#endif
- printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE3: connected to ULI as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
@@ -154,7 +154,7 @@ void pci_init_board(void)
*/
in_be32((u32 *)CONFIG_SYS_PCIE3_MEM_BUS);
} else {
- printf (" PCIE3: disabled\n");
+ printf("PCIE3: disabled\n");
}
puts("\n");
#else
@@ -177,14 +177,14 @@ void pci_init_board(void)
pcie1_hose.region_count = 1;
#endif
- printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
+ printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
@@ -208,13 +208,13 @@ void pci_init_board(void)
pcie2_hose.region_count = 1;
#endif
- printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
- printf (" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
puts("\n");
@@ -231,7 +231,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+ printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
@@ -243,7 +243,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf (" PCI: disabled\n");
+ printf("PCI: disabled\n");
}
puts("\n");
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c
index 23e552b..14c902c 100644
--- a/board/freescale/mpc8548cds/mpc8548cds.c
+++ b/board/freescale/mpc8548cds/mpc8548cds.c
@@ -284,7 +284,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+ printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
@@ -308,7 +308,7 @@ void pci_init_board(void)
}
#endif
} else {
- printf (" PCI: disabled\n");
+ printf("PCI: disabled\n");
}
puts("\n");
@@ -321,10 +321,10 @@ void pci_init_board(void)
uint pci2_clk_sel = porpllsr & 0x4000; /* PORPLLSR[17] */
uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
if (pci_dual) {
- printf (" PCI2: 32 bit, 66 MHz, %s\n",
+ printf("PCI2: 32 bit, 66 MHz, %s\n",
pci2_clk_sel ? "sync" : "async");
} else {
- printf (" PCI2: disabled\n");
+ printf("PCI2: disabled\n");
}
}
#else
@@ -337,14 +337,14 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index b7e0e0c..edaba26 100644
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -219,17 +219,17 @@ int checkboard (void)
MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
- printf (" PCI1: %d bit, %s MHz, %s\n",
+ printf("PCI1: %d bit, %s MHz, %s\n",
(pci1_32) ? 32 : 64,
(pci1_speed == 33000000) ? "33" :
(pci1_speed == 66000000) ? "66" : "unknown",
pci1_clk_sel ? "sync" : "async");
if (pci_dual) {
- printf (" PCI2: 32 bit, 66 MHz, %s\n",
+ printf("PCI2: 32 bit, 66 MHz, %s\n",
pci2_clk_sel ? "sync" : "async");
} else {
- printf (" PCI2: disabled\n");
+ printf("PCI2: disabled\n");
}
/*
diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c
index 423e9d7..1761431 100644
--- a/board/freescale/mpc8560ads/mpc8560ads.c
+++ b/board/freescale/mpc8560ads/mpc8560ads.c
@@ -252,10 +252,10 @@ int checkboard (void)
puts("Board: ADS\n");
#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
+ printf("PCI1: 32 bit, %d MHz (compiled)\n",
CONFIG_SYS_CLK_FREQ / 1000000);
#else
- printf(" PCI1: disabled\n");
+ printf("PCI1: disabled\n");
#endif
/*
diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c
index bd859e4..d74fcac 100644
--- a/board/freescale/mpc8568mds/mpc8568mds.c
+++ b/board/freescale/mpc8568mds/mpc8568mds.c
@@ -378,7 +378,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
+ printf("PCI: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333000) ? "33" :
(pci_speed == 66666000) ? "66" : "unknown",
@@ -390,7 +390,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf (" PCI: disabled\n");
+ printf("PCI: disabled\n");
}
puts("\n");
@@ -404,14 +404,14 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
+ printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c
index 743e712..dc0884e 100644
--- a/board/freescale/mpc8569mds/mpc8569mds.c
+++ b/board/freescale/mpc8569mds/mpc8569mds.c
@@ -584,13 +584,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf (" PCIE1 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE1: connected to Slot as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 6b96dfc..120f35c 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -177,13 +177,13 @@ void pci_init_board(void)
debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
- printf (" eTSEC1 is in sgmii mode.\n");
+ printf("eTSEC1 is in sgmii mode.\n");
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
- printf (" eTSEC2 is in sgmii mode.\n");
+ printf("eTSEC2 is in sgmii mode.\n");
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
- printf (" eTSEC3 is in sgmii mode.\n");
+ printf("eTSEC3 is in sgmii mode.\n");
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII4_DIS))
- printf (" eTSEC4 is in sgmii mode.\n");
+ printf("eTSEC4 is in sgmii mode.\n");
puts("\n");
#ifdef CONFIG_PCIE3
@@ -192,9 +192,9 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
- printf (" PCIE3 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE3: connected to ULI as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
/*
@@ -211,7 +211,7 @@ void pci_init_board(void)
in_be32(p);
}
} else {
- printf (" PCIE3: disabled\n");
+ printf("PCIE3: disabled\n");
}
puts("\n");
#else
@@ -224,13 +224,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)){
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf (" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
- printf (" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
puts("\n");
@@ -244,13 +244,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf (" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
+ printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
pcie_ep ? "Endpoint" : "Root Complex",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
index f67f3e3..61a635d 100644
--- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c
+++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c
@@ -244,14 +244,14 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE1)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf (" PCIE1 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
@@ -265,13 +265,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIE2)){
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf (" PCIE2 connected to Slot as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE2: connected to Slot as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
- printf (" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
puts("\n");
@@ -283,14 +283,14 @@ void pci_init_board(void)
if (!(devdisr & MPC86xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf(" PCI connected to PCI slots as %s" \
+ printf("PCI: connected to PCI slots as %s" \
" (base address %lx)\n",
pci_agent ? "Agent" : "Host",
pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf (" PCI: disabled\n");
+ printf("PCI: disabled\n");
}
puts("\n");
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
index 092ead6..812111d 100644
--- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -157,9 +157,9 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf(" PCIE1 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE1: connected to ULI as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
@@ -171,22 +171,22 @@ void pci_init_board(void)
+ CONFIG_SYS_PCIE1_MEM_SIZE - 0x1000000)));
} else {
- puts(" PCIE1: disabled\n");
+ puts("PCIE1: disabled\n");
}
#else
- puts(" PCIE1: disabled\n");
+ puts("PCIE1: disabled\n");
#endif /* CONFIG_PCIE1 */
#ifdef CONFIG_PCIE2
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf(" PCIE2 connected as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE2: connected as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
#else
- puts(" PCIE2: disabled\n");
+ puts("PCIE2: disabled\n");
#endif /* CONFIG_PCIE2 */
}
diff --git a/board/freescale/p1022ds/p1022ds.c b/board/freescale/p1022ds/p1022ds.c
index ee93e8b..7cb549b 100644
--- a/board/freescale/p1022ds/p1022ds.c
+++ b/board/freescale/p1022ds/p1022ds.c
@@ -225,7 +225,7 @@ static void configure_pcie(struct fsl_pci_info *info,
set_next_law(info->mem_phys, law_size_bits(info->mem_size), info->law);
set_next_law(info->io_phys, law_size_bits(info->io_size), info->law);
is_endpoint = fsl_setup_hose(hose, info->regs);
- printf(" PCIE%u connected to %s as %s (base addr %lx)\n",
+ printf("PCIE%u: connected to %s as %s (base addr %lx)\n",
info->pci_num, connected,
is_endpoint ? "Endpoint" : "Root Complex", info->regs);
bus_number = fsl_pci_init_port(info, hose, bus_number);
@@ -255,7 +255,7 @@ void pci_init_board(void)
SET_STD_PCIE_INFO(pci_info, 1);
configure_pcie(&pci_info, &pcie1_hose, serdes_slot_name(PCIE1));
} else {
- printf(" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); /* disable */
@@ -266,7 +266,7 @@ void pci_init_board(void)
SET_STD_PCIE_INFO(pci_info, 2);
configure_pcie(&pci_info, &pcie2_hose, serdes_slot_name(PCIE2));
} else {
- printf(" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE2); /* disable */
@@ -277,7 +277,7 @@ void pci_init_board(void)
SET_STD_PCIE_INFO(pci_info, 3);
configure_pcie(&pci_info, &pcie3_hose, serdes_slot_name(PCIE3));
} else {
- printf(" PCIE3: disabled\n");
+ printf("PCIE3: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */
diff --git a/board/freescale/p1_p2_rdb/p1_p2_rdb.c b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
index fae31f2..1c4c020 100644
--- a/board/freescale/p1_p2_rdb/p1_p2_rdb.c
+++ b/board/freescale/p1_p2_rdb/p1_p2_rdb.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -33,6 +33,7 @@
#include <tsec.h>
#include <vsc7385.h>
#include <netdev.h>
+#include <rtc.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -156,6 +157,7 @@ int board_early_init_r(void)
set_tlb(1, flashbase, CONFIG_SYS_FLASH_BASE_PHYS,
MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
0, flash_esel, BOOKE_PAGESZ_16M, 1);
+ rtc_reset();
return 0;
}
diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c
index 97d4f83..2a2d6b7 100644
--- a/board/freescale/p1_p2_rdb/pci.c
+++ b/board/freescale/p1_p2_rdb/pci.c
@@ -56,7 +56,7 @@ void pci_init_board(void)
debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
- printf (" eTSEC2 is in sgmii mode.\n");
+ printf("eTSEC2 is in sgmii mode.\n");
puts("\n");
#ifdef CONFIG_PCIE2
@@ -65,13 +65,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf(" PCIE2 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE2: connected to Slot 1 as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
- printf (" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
puts("\n");
#else
@@ -84,13 +84,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
#else
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 608ff91..b507677 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -207,9 +207,9 @@ void pci_init_board(void)
debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII2_DIS))
- printf(" eTSEC2 is in sgmii mode.\n");
+ printf("eTSEC2 is in sgmii mode.\n");
if (!(pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
- printf(" eTSEC3 is in sgmii mode.\n");
+ printf("eTSEC3 is in sgmii mode.\n");
puts("\n");
#ifdef CONFIG_PCIE2
@@ -218,9 +218,9 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE2)) {
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf(" PCIE2 connected to ULI as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE2: connected to ULI as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
@@ -245,7 +245,7 @@ void pci_init_board(void)
}
#endif
} else {
- printf(" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
puts("\n");
#else
@@ -258,13 +258,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)) {
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
- printf(" PCIE3 connected to Slot 1 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE3: connected to Slot 1 as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
} else {
- printf(" PCIE3: disabled\n");
+ printf("PCIE3: disabled\n");
}
puts("\n");
#else
@@ -277,13 +277,13 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf(" PCIE1 connected to Slot 2 as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE1: connected to Slot 2 as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf(" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
puts("\n");
#else
diff --git a/board/pm854/pm854.c b/board/pm854/pm854.c
index a302b91..0b8ea81 100644
--- a/board/pm854/pm854.c
+++ b/board/pm854/pm854.c
@@ -59,10 +59,10 @@ int checkboard (void)
puts("Board: MicroSys PM854\n");
#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
+ printf("PCI1: 32 bit, %d MHz (compiled)\n",
CONFIG_SYS_CLK_FREQ / 1000000);
#else
- printf(" PCI1: disabled\n");
+ printf("PCI1: disabled\n");
#endif
/*
diff --git a/board/pm856/pm856.c b/board/pm856/pm856.c
index f9d92d9..4e059b0 100644
--- a/board/pm856/pm856.c
+++ b/board/pm856/pm856.c
@@ -213,10 +213,10 @@ int checkboard (void)
puts("Board: MicroSys PM856\n");
#ifdef CONFIG_PCI
- printf(" PCI1: 32 bit, %d MHz (compiled)\n",
+ printf("PCI1: 32 bit, %d MHz (compiled)\n",
CONFIG_SYS_CLK_FREQ / 1000000);
#else
- printf(" PCI1: disabled\n");
+ printf("PCI1: disabled\n");
#endif
/*
diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index 733979c..272428f 100644
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -342,7 +342,7 @@ pci_init_board(void)
uint pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD;
uint pci_speed = CONFIG_SYS_CLK_FREQ; /* get_clock_freq() */
- printf (" PCI host: %d bit, %s MHz, %s, %s\n",
+ printf("PCI: Host, %d bit, %s MHz, %s, %s\n",
(pci_32) ? 32 : 64,
(pci_speed == 33000000) ? "33" :
(pci_speed == 66000000) ? "66" : "unknown",
@@ -353,7 +353,7 @@ pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf (" PCI: disabled\n");
+ printf("PCI: disabled\n");
}
puts("\n");
@@ -368,11 +368,11 @@ pci_init_board(void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
SET_STD_PCIE_INFO(pci_info[num], 1);
- printf (" PCIE at base address %lx\n", pci_info[num].regs);
+ printf("PCIE: base address %lx\n", pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf (" PCIE: disabled\n");
+ printf("PCIE: disabled\n");
}
puts("\n");
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
index d954d2f..5bf2364 100644
--- a/board/sbc8641d/sbc8641d.c
+++ b/board/sbc8641d/sbc8641d.c
@@ -221,29 +221,29 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf(" PCIE1 connected as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE1: connected as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- puts(" PCIE1: disabled\n");
+ puts("PCIE1: disabled\n");
}
#else
- puts(" PCIE1: disabled\n");
+ puts("PCIE1: disabled\n");
#endif /* CONFIG_PCIE1 */
#ifdef CONFIG_PCIE2
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf(" PCIE2 connected as %s (base addr %lx)\n",
- pcie_ep ? "Endpoint" : "Root Complex",
- pci_info[num].regs);
+ printf("PCIE2: connected as %s (base addr %lx)\n",
+ pcie_ep ? "Endpoint" : "Root Complex",
+ pci_info[num].regs);
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
#else
- puts(" PCIE2: disabled\n");
+ puts("PCIE2: disabled\n");
#endif /* CONFIG_PCIE2 */
}
diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c
index 2c3885f..527af6d 100644
--- a/board/tqc/tqm85xx/tqm85xx.c
+++ b/board/tqc/tqm85xx/tqm85xx.c
@@ -298,7 +298,7 @@ int misc_init_r (void)
*/
set_lbc_or(0, ((-flash_info[1].size) & 0xffff8000) |
(CONFIG_SYS_OR0_PRELIM & 0x00007fff));
- set_lbc_br(0, gd->bd->bi_flashstart |
+ set_lbc_br(0, (gd->bd->bi_flashstart + flash_info[0].size) |
(CONFIG_SYS_BR0_PRELIM & 0x00007fff));
/*
@@ -567,7 +567,7 @@ void pci_init_board (void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf ("\n PCI1: %d bit, %s MHz, %s, %s, %s\n",
+ printf("PCI1: %d bit, %s MHz, %s, %s, %s\n",
(pci_32) ? 32 : 64,
(pci_speed == 33333333) ? "33" :
(pci_speed == 66666666) ? "66" : "unknown",
@@ -591,7 +591,7 @@ void pci_init_board (void)
}
#endif
} else {
- printf(" PCI1: disabled\n");
+ printf("PCI1: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
@@ -603,12 +603,12 @@ void pci_init_board (void)
if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf(" PCIE1 connected as %s\n",
+ printf("PCIE1: connected as %s\n",
pcie_ep ? "Endpoint" : "Root Complex");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf(" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE);
diff --git a/board/xes/common/fsl_8xxx_pci.c b/board/xes/common/fsl_8xxx_pci.c
index f425cee..4a0965b 100644
--- a/board/xes/common/fsl_8xxx_pci.c
+++ b/board/xes/common/fsl_8xxx_pci.c
@@ -95,7 +95,7 @@ void pci_init_board(void)
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs);
- printf("\n PCI1: %d bit %s, %s %d MHz, %s, %s\n",
+ printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n",
pci_32 ? 32 : 64,
pcix ? "PCIX" : "PCI",
pci_spd_norm ? ">=" : "<=",
@@ -106,7 +106,7 @@ void pci_init_board(void)
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pci1_hose, first_free_busno);
} else {
- printf(" PCI1: disabled\n");
+ printf("PCI1: disabled\n");
}
#elif defined CONFIG_MPC8548
/* PCI1 not present on MPC8572 */
@@ -119,12 +119,12 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE1)) {
SET_STD_PCIE_INFO(pci_info[num], 1);
pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs);
- printf(" PCIE1 connected as %s\n",
+ printf("PCIE1: connected as %s\n",
pcie_ep ? "Endpoint" : "Root Complex");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie1_hose, first_free_busno);
} else {
- printf(" PCIE1: disabled\n");
+ printf("PCIE1: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE1);
@@ -136,12 +136,12 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE2)) {
SET_STD_PCIE_INFO(pci_info[num], 2);
pcie_ep = fsl_setup_hose(&pcie2_hose, pci_info[num].regs);
- printf(" PCIE2 connected as %s\n",
+ printf("PCIE2: connected as %s\n",
pcie_ep ? "Endpoint" : "Root Complex");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie2_hose, first_free_busno);
} else {
- printf(" PCIE2: disabled\n");
+ printf("PCIE2: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE2);
@@ -153,12 +153,12 @@ void pci_init_board(void)
if (pcie_configured && !(devdisr & MPC8xxx_DEVDISR_PCIE3)) {
SET_STD_PCIE_INFO(pci_info[num], 3);
pcie_ep = fsl_setup_hose(&pcie3_hose, pci_info[num].regs);
- printf(" PCIE3 connected as %s\n",
+ printf("PCIE3: connected as %s\n",
pcie_ep ? "Endpoint" : "Root Complex");
first_free_busno = fsl_pci_init_port(&pci_info[num++],
&pcie3_hose, first_free_busno);
} else {
- printf(" PCIE3: disabled\n");
+ printf("PCIE3: disabled\n");
}
#else
setbits_be32(&gur->devdisr, MPC8xxx_DEVDISR_PCIE3);