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-rw-r--r--cpu/arm1176/s3c64xx/cpu_init.S2
-rw-r--r--cpu/arm1176/s3c64xx/reset.S2
-rw-r--r--cpu/arm1176/s3c64xx/speed.c2
-rw-r--r--cpu/arm1176/s3c64xx/timer.c4
4 files changed, 5 insertions, 5 deletions
diff --git a/cpu/arm1176/s3c64xx/cpu_init.S b/cpu/arm1176/s3c64xx/cpu_init.S
index 32bb467..df88cba 100644
--- a/cpu/arm1176/s3c64xx/cpu_init.S
+++ b/cpu/arm1176/s3c64xx/cpu_init.S
@@ -24,7 +24,7 @@
*/
#include <config.h>
-#include <s3c6400.h>
+#include <asm/arch/s3c6400.h>
.globl mem_ctrl_asm_init
mem_ctrl_asm_init:
diff --git a/cpu/arm1176/s3c64xx/reset.S b/cpu/arm1176/s3c64xx/reset.S
index 315b13f..eae572e 100644
--- a/cpu/arm1176/s3c64xx/reset.S
+++ b/cpu/arm1176/s3c64xx/reset.S
@@ -21,7 +21,7 @@
* MA 02111-1307 USA
*/
-#include <s3c6400.h>
+#include <asm/arch/s3c6400.h>
.globl reset_cpu
reset_cpu:
diff --git a/cpu/arm1176/s3c64xx/speed.c b/cpu/arm1176/s3c64xx/speed.c
index 5c335a5..11962ac 100644
--- a/cpu/arm1176/s3c64xx/speed.c
+++ b/cpu/arm1176/s3c64xx/speed.c
@@ -31,7 +31,7 @@
*/
#include <common.h>
-#include <s3c6400.h>
+#include <asm/arch/s3c6400.h>
#define APLL 0
#define MPLL 1
diff --git a/cpu/arm1176/s3c64xx/timer.c b/cpu/arm1176/s3c64xx/timer.c
index 22a5b77..9768319 100644
--- a/cpu/arm1176/s3c64xx/timer.c
+++ b/cpu/arm1176/s3c64xx/timer.c
@@ -40,7 +40,7 @@
#include <common.h>
#include <asm/proc-armv/ptrace.h>
-#include <s3c6400.h>
+#include <asm/arch/s3c6400.h>
#include <div64.h>
static ulong timer_load_val;
@@ -164,7 +164,7 @@ void set_timer(ulong t)
timestamp = t * (timer_load_val / (100 * CONFIG_SYS_HZ));
}
-void udelay(unsigned long usec)
+void __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;