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-rw-r--r--doc/README.imx56
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diff --git a/doc/README.imx5 b/doc/README.imx5
index e08941e..c5312b6 100644
--- a/doc/README.imx5
+++ b/doc/README.imx5
@@ -20,3 +20,9 @@ i.MX5x SoCs.
This option should be enabled for boards having a SYS_ON_OFF_CTL signal
connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the
reference designs.
+
+2. CONVENTIONS FOR FUSE ASSIGNMENTS
+-----------------------------------
+
+2.1 MAC Address: It is stored in the words 9 to 14 of fuse bank 1, using the
+ natural MAC byte order (i.e. MSB first).