diff options
Diffstat (limited to 'drivers/pci/fsl_pci_init.c')
| -rw-r--r-- | drivers/pci/fsl_pci_init.c | 17 |
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index af20cf0..1139d83 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -361,7 +361,11 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) debug("Outbound memory range: %llx:%llx\n", out_lo, out_hi); /* setup PCSRBAR/PEXCSRBAR */ +#if defined (CONFIG_ARCH_T2081) || defined (CONFIG_ARCH_T2080) /* T208x has writable bits at [3..0] that shouldn't be accessed here (right?) */ + pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0xfffffff0); +#else pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_0, 0xffffffff); +#endif pci_hose_read_config_dword (hose, dev, PCI_BASE_ADDRESS_0, &pcicsrbar_sz); pcicsrbar_sz = ~pcicsrbar_sz + 1; @@ -443,7 +447,7 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) #define PEX_CSR0_LTSSM_SHIFT 2 ltssm = (in_be32(&pci->pex_csr0) & PEX_CSR0_LTSSM_MASK) >> PEX_CSR0_LTSSM_SHIFT; - enabled = (ltssm == 0x11) ? 1 : 0; + enabled = (ltssm == PCI_LTSSM_L0) ? 1 : 0; #ifdef CONFIG_FSL_PCIE_RESET int i; /* assert PCIe reset */ @@ -454,10 +458,17 @@ void fsl_pci_init(struct pci_controller *hose, struct fsl_pci_info *pci_info) clrbits_be32(&pci->pdb_stat, 0x08000000); asm("sync;isync"); for (i = 0; i < 100 && ltssm < PCI_LTSSM_L0; i++) { - pci_hose_read_config_word(hose, dev, PCI_LTSSM, - <ssm); + ltssm = (in_be32(&pci->pex_csr0) & PEX_CSR0_LTSSM_MASK) >> PEX_CSR0_LTSSM_SHIFT; udelay(1000); + /*debug("....PCIe link error. LTSSM=0x%02x.\n", ltssm);*/ } + enabled = ltssm >= PCI_LTSSM_L0; + + /* we need to re-write the bar0 since a reset will + * clear it + */ + pci_hose_write_config_dword(hose, dev, + PCI_BASE_ADDRESS_0, pcicsrbar); #endif } else { /* pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm); */ |