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-rw-r--r--drivers/gpio/pca953x.c2
-rw-r--r--drivers/misc/ds4510.c8
-rw-r--r--drivers/qe/qe.c5
3 files changed, 9 insertions, 6 deletions
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c
index 1c5e314..e8273ee 100644
--- a/drivers/gpio/pca953x.c
+++ b/drivers/gpio/pca953x.c
@@ -221,7 +221,7 @@ U_BOOT_CMD(
"pca953x invert pin 0|1\n"
" - disable/enable polarity inversion for reads\n"
"pca953x intput pin\n"
- " - set pin as input and read value\n"
+ " - set pin as input and read value"
);
#endif /* CONFIG_CMD_PCA953X */
diff --git a/drivers/misc/ds4510.c b/drivers/misc/ds4510.c
index 8b5fbbc..f2510a3 100644
--- a/drivers/misc/ds4510.c
+++ b/drivers/misc/ds4510.c
@@ -404,12 +404,14 @@ U_BOOT_CMD(
"ds4510 pullup pin 0|1\n"
" - disable/enable pullup on specified pin\n"
"ds4510 nv 0|1\n"
- " - make gpio and seeprom writes volatile/non-volatile\n"
+ " - make gpio and seeprom writes volatile/non-volatile"
#ifdef CONFIG_CMD_DS4510_RST
+ "\n"
"ds4510 rstdelay 0-3\n"
- " - set reset output delay\n"
+ " - set reset output delay"
#endif
#ifdef CONFIG_CMD_DS4510_MEM
+ "\n"
"ds4510 eeprom read addr off cnt\n"
"ds4510 eeprom write addr off cnt\n"
" - read/write 'cnt' bytes at EEPROM offset 'off'\n"
@@ -418,7 +420,7 @@ U_BOOT_CMD(
" - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
"ds4510 sram read addr off cnt\n"
"ds4510 sram write addr off cnt\n"
- " - read/write 'cnt' bytes at SRAM offset 'off'\n"
+ " - read/write 'cnt' bytes at SRAM offset 'off'"
#endif
);
#endif /* CONFIG_CMD_DS4510 */
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index f114fe0..918bfa7 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -473,5 +473,6 @@ U_BOOT_CMD(
qe, 4, 0, qe_cmd,
"QUICC Engine commands",
"fw <addr> [<length>] - Upload firmware binary at address <addr> to "
- "the QE,\n\twith optional length <length> verification.\n"
- );
+ "the QE,\n"
+ "\twith optional length <length> verification."
+);