diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/pcmcia/Makefile | 1 | ||||
| -rw-r--r-- | drivers/pcmcia/marubun_pcmcia.c | 113 | ||||
| -rw-r--r-- | drivers/serial/Makefile | 1 | ||||
| -rw-r--r-- | drivers/serial/serial_sh.c | 177 |
4 files changed, 292 insertions, 0 deletions
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile index 55528c8..bba1ab8 100644 --- a/drivers/pcmcia/Makefile +++ b/drivers/pcmcia/Makefile @@ -30,6 +30,7 @@ COBJS-y += pxa_pcmcia.o COBJS-y += rpx_pcmcia.o COBJS-y += ti_pci1410a.o COBJS-y += tqm8xx_pcmcia.o +COBJS-y += marubun_pcmcia.o COBJS := $(COBJS-y) SRCS := $(COBJS:.o=.c) diff --git a/drivers/pcmcia/marubun_pcmcia.c b/drivers/pcmcia/marubun_pcmcia.c new file mode 100644 index 0000000..89b2015 --- /dev/null +++ b/drivers/pcmcia/marubun_pcmcia.c @@ -0,0 +1,113 @@ +/* + * Marubun MR-SHPC-01 PCMCIA controller device driver + * + * (c) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <config.h> +#include <pcmcia.h> +#include <asm/io.h> + +#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) +#define CONFIG_PCMCIA +#endif + +#if (CONFIG_COMMANDS & CFG_CMD_IDE) +#define CONFIG_PCMCIA +#endif + +#if defined(CONFIG_PCMCIA) \ + && (defined(CONFIG_MARUBUN_PCCARD)) + +/* MR-SHPC-01 register */ +#define MRSHPC_MODE (CFG_MARUBUN_MRSHPC + 4) +#define MRSHPC_OPTION (CFG_MARUBUN_MRSHPC + 6) +#define MRSHPC_CSR (CFG_MARUBUN_MRSHPC + 8) +#define MRSHPC_ISR (CFG_MARUBUN_MRSHPC + 10) +#define MRSHPC_ICR (CFG_MARUBUN_MRSHPC + 12) +#define MRSHPC_CPWCR (CFG_MARUBUN_MRSHPC + 14) +#define MRSHPC_MW0CR1 (CFG_MARUBUN_MRSHPC + 16) +#define MRSHPC_MW1CR1 (CFG_MARUBUN_MRSHPC + 18) +#define MRSHPC_IOWCR1 (CFG_MARUBUN_MRSHPC + 20) +#define MRSHPC_MW0CR2 (CFG_MARUBUN_MRSHPC + 22) +#define MRSHPC_MW1CR2 (CFG_MARUBUN_MRSHPC + 24) +#define MRSHPC_IOWCR2 (CFG_MARUBUN_MRSHPC + 26) +#define MRSHPC_CDCR (CFG_MARUBUN_MRSHPC + 28) +#define MRSHPC_PCIC_INFO (CFG_MARUBUN_MRSHPC + 30) + +int pcmcia_on (void) +{ + printf("Enable PCMCIA " PCMCIA_SLOT_MSG "\n"); + + /* Init */ + outw( 0x0000 , MRSHPC_MODE ); + + if ((inw(MRSHPC_CSR) & 0x000c) == 0){ /* if card detect is true */ + if ((inw(MRSHPC_CSR) & 0x0080) == 0){ + outw(0x0674 ,MRSHPC_CPWCR); /* Card Vcc is 3.3v? */ + }else{ + outw(0x0678 ,MRSHPC_CPWCR); /* Card Vcc is 5V */ + } + udelay( 100000 ); /* wait for power on */ + }else{ + return 1; + } + /* + * PC-Card window open + * flag == COMMON/ATTRIBUTE/IO + */ + /* common window open */ + outw(0x8a84,MRSHPC_MW0CR1); /* window 0xb8400000 */ + if ((inw(MRSHPC_CSR) & 0x4000) != 0) + outw(0x0b00,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 1 */ + else + outw(0x0300,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 0 */ + + /* attribute window open */ + outw(0x8a85,MRSHPC_MW1CR1); /* window 0xb8500000 */ + if ((inw(MRSHPC_CSR) & 0x4000) != 0) + outw(0x0a00,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 1 */ + else + outw(0x0200,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 0 */ + + /* I/O window open */ + outw(0x8a86,MRSHPC_IOWCR1); /* I/O window 0xb8600000 */ + outw(0x0008,MRSHPC_CDCR); /* I/O card mode */ + if ((inw(MRSHPC_CSR) & 0x4000) != 0) + outw(0x0a00,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1 */ + else + outw(0x0200,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0 */ + + outw(0x0000,MRSHPC_ISR); + outw(0x2000,MRSHPC_ICR); + outb(0x00,(CFG_MARUBUN_MW2 + 0x206)); + outb(0x42,(CFG_MARUBUN_MW2 + 0x200)); + + return 0; +} + +int pcmcia_off (void) +{ + printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n"); + + return 0; +} + +#endif /* CONFIG_MARUBUN_PCCARD */ diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 735c630..ee2b780 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -35,6 +35,7 @@ COBJS-y += serial_max3100.o COBJS-y += serial_pl010.o COBJS-y += serial_pl011.o COBJS-y += serial_xuartlite.o +COBJS-y += serial_sh.o COBJS-y += usbtty.o COBJS := $(COBJS-y) diff --git a/drivers/serial/serial_sh.c b/drivers/serial/serial_sh.c new file mode 100644 index 0000000..7818632 --- /dev/null +++ b/drivers/serial/serial_sh.c @@ -0,0 +1,177 @@ +/* + * SuperH SCIF device driver. + * Copyright (c) 2007 Nobuhiro Iwamatsu + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/processor.h> + +#ifdef CFG_SCIF_CONSOLE + +#if defined (CONFIG_CONS_SCIF0) +#define SCIF_BASE SCIF0_BASE +#elif defined (CONFIG_CONS_SCIF1) +#define SCIF_BASE SCIF1_BASE +#else +#error "Default SCIF doesn't set....." +#endif + +#define SCSMR (vu_short *)(SCIF_BASE + 0x0) +#define SCBRR (vu_char *)(SCIF_BASE + 0x4) +#define SCSCR (vu_short *)(SCIF_BASE + 0x8) +#define SCFTDR (vu_char *)(SCIF_BASE + 0xC) +#define SCFSR (vu_short *)(SCIF_BASE + 0x10) +#define SCFRDR (vu_char *)(SCIF_BASE + 0x14) +#define SCFCR (vu_short *)(SCIF_BASE + 0x18) +#define SCFDR (vu_short *)(SCIF_BASE + 0x1C) +#if defined(CONFIG_SH4A) +#define SCRFDR (vu_short *)(SCIF_BASE + 0x20) +#define SCSPTR (vu_short *)(SCIF_BASE + 0x24) +#define SCLSR (vu_short *)(SCIF_BASE + 0x28) +#define SCRER (vu_short *)(SCIF_BASE + 0x2C) +#elif defined (CONFIG_SH4) +#define SCSPTR (vu_short *)(SCIF_BASE + 0x20) +#define SCLSR (vu_short *)(SCIF_BASE + 0x24) +#elif defined (CONFIG_SH3) +#define SCLSR (vu_short *)(SCIF_BASE + 0x24) +#endif + +#define SCR_RE (1 << 4) +#define SCR_TE (1 << 5) +#define FCR_RFRST (1 << 1) /* RFCL */ +#define FCR_TFRST (1 << 2) /* TFCL */ +#define FSR_DR (1 << 0) +#define FSR_RDF (1 << 1) +#define FSR_FER (1 << 3) +#define FSR_BRK (1 << 4) +#define FSR_FER (1 << 3) +#define FSR_TEND (1 << 6) +#define FSR_ER (1 << 7) + +/*----------------------------------------------------------------------*/ + +void serial_setbrg (void) +{ + DECLARE_GLOBAL_DATA_PTR; + int divisor = gd->baudrate * 32; + + *SCBRR = (CONFIG_SYS_CLK_FREQ + (divisor / 2)) / + (gd->baudrate * 32) - 1; +} + +int serial_init (void) +{ + *SCSCR = (SCR_RE | SCR_TE); + *SCSMR = 0 ; + *SCSMR = 0; + *SCFCR = (FCR_RFRST | FCR_TFRST); + *SCFCR; + *SCFCR = 0; + + serial_setbrg(); + return 0; +} + +static int serial_tx_fifo_level (void) +{ + return (*SCFDR >> 8) & 0x1F; +} + +static int serial_rx_fifo_level (void) +{ + return (*SCFDR >> 0) & 0x1F; +} + +void serial_raw_putc (const char c) +{ + unsigned int fsr_bits_to_clear; + + while (1) { + if (*SCFSR & FSR_TEND) { /* Tx fifo is empty */ + fsr_bits_to_clear = FSR_TEND; + break; + } + } + + *SCFTDR = c; + if (fsr_bits_to_clear != 0) + *SCFSR &= ~fsr_bits_to_clear; +} + +void serial_putc (const char c) +{ + if (c == '\n') + serial_raw_putc ('\r'); + serial_raw_putc (c); +} + +void serial_puts (const char *s) +{ + char c; + while ((c = *s++) != 0) + serial_putc (c); +} + +int serial_tstc (void) +{ + return serial_rx_fifo_level() ? 1 : 0; +} + +#define FSR_ERR_CLEAR 0x0063 +#define RDRF_CLEAR 0x00fc +#define LSR_ORER 1 +void handle_error( void ){ + + (void)*SCFSR ; + *SCFSR = FSR_ERR_CLEAR ; + (void)*SCLSR ; + *SCLSR = 0x00 ; +} + +int serial_getc_check( void ){ + unsigned short status; + + status = *SCFSR ; + + if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK)) + handle_error(); + if( *SCLSR & LSR_ORER ) + handle_error(); + return (status & ( FSR_DR | FSR_RDF )); +} + +int serial_getc (void) +{ + unsigned short status ; + char ch; + while(!serial_getc_check()); + + ch = *SCFRDR; + status = *SCFSR ; + + *SCFSR = RDRF_CLEAR ; + + if (status & (FSR_FER | FSR_FER | FSR_ER | FSR_BRK)) + handle_error(); + + if( *SCLSR & LSR_ORER ) + handle_error(); + + return ch ; +} + +#endif /* CFG_SCIF_CONSOLE */ |