diff options
Diffstat (limited to 'include/configs/simc-t2081.h')
| -rw-r--r-- | include/configs/simc-t2081.h | 94 |
1 files changed, 48 insertions, 46 deletions
diff --git a/include/configs/simc-t2081.h b/include/configs/simc-t2081.h index 90a84ef..7a9d1c5 100644 --- a/include/configs/simc-t2081.h +++ b/include/configs/simc-t2081.h @@ -16,6 +16,23 @@ #include <generated/autoconf.h> +/* High Level Configuration Options */ +#define CONFIG_SYS_BOOK3E_HV /* Category E.HV supported */ +#define CONFIG_MP /* support multiple processors */ + +#ifdef CONFIG_PHYS_64BIT +/*#define CONFIG_ADDR_MAP 1*/ +#define CONFIG_SYS_NUM_ADDR_MAP 64 /* number of TLB1 entries */ +#endif + +#define CONFIG_SYS_FSL_CPC /* Corenet Platform Cache */ +#define CONFIG_SYS_NUM_CPC CONFIG_SYS_NUM_DDR_CTLRS +#define CONFIG_ENV_OVERWRITE + +/* Errata */ +#define CONFIG_SYS_FSL_ERRATUM_A007815 +#define CONFIG_SYS_FSL_ERRATUM_A007907 + #define CONFIG_MTD_UBI_WL_THRESHOLD 4096 #define CONFIG_MTD_UBI_BEB_LIMIT 20 @@ -442,19 +459,20 @@ #define VDD_MV_MIN 819 #define VDD_MV_MAX 1212 - /* * General PCI * Memory space is mapped 1-1, but I/O space must start from 0. */ -/* #define CONFIG_PCI */ /* Enable PCI/PCIE */ -#define CONFIG_PCIE1 /* PCIE controler 1 */ -#define CONFIG_PCIE2 /* PCIE controler 2 */ -#define CONFIG_PCIE3 /* PCIE controler 3 */ -#define CONFIG_PCIE4 /* PCIE controler 4 */ +#ifndef CONFIG_PCI +#define CONFIG_PCI +#endif +#define CONFIG_PCIE1 /* PCIE controller 1 */ +#define CONFIG_PCIE2 /* PCIE controller 2 */ +#define CONFIG_PCIE3 /* PCIE controller 3 */ +#define CONFIG_PCIE4 /* PCIE controller 4 */ #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ -/* controller 1, direct to uli, tgtid 3, Base address 20000 */ +/* controller 1 */ #define CONFIG_SYS_PCIE1_MEM_VIRT 0x80000000 #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc00000000ull @@ -464,7 +482,7 @@ #define CONFIG_SYS_PCIE1_IO_PHYS 0xff8000000ull #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ -/* controller 2, Slot 2, tgtid 2, Base address 201000 */ +/* controller 2 */ #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull @@ -474,7 +492,7 @@ #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ -/* controller 3, Slot 1, tgtid 1, Base address 202000 */ +/* controller 3 */ #define CONFIG_SYS_PCIE3_MEM_VIRT 0xb0000000 #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc30000000ull @@ -484,8 +502,8 @@ #define CONFIG_SYS_PCIE3_IO_PHYS 0xff8020000ull #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ -/* controller 4, Base address 203000 */ -#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 +/* controller 4 */ +#define CONFIG_SYS_PCIE4_MEM_VIRT 0xc0000000 #define CONFIG_SYS_PCIE4_MEM_BUS 0xe0000000 #define CONFIG_SYS_PCIE4_MEM_PHYS 0xc40000000ull #define CONFIG_SYS_PCIE4_MEM_SIZE 0x10000000 /* 256M */ @@ -496,32 +514,10 @@ #ifdef CONFIG_PCI #define CONFIG_PCI_INDIRECT_BRIDGE -#define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata LSZ ADD */ +/*#define CONFIG_FSL_PCIE_RESET*/ /* need PCIe reset errata (TODO: really needed? (disabled for pci sas demo)) */ #define CONFIG_NET_MULTI #define CONFIG_E1000 -/*#define CONFIG_PCI_PNP*/ /* do pci plug-and-play */ #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ -/* #define CONFIG_DOS_PARTITION */ -#endif - -#if 0 /* T2081 has no SATA */ -/* - * SATA - */ -#define CONFIG_FSL_SATA_V2 -#ifdef CONFIG_FSL_SATA_V2 -#define CONFIG_LIBATA -#define CONFIG_FSL_SATA -#define CONFIG_SYS_SATA_MAX_DEVICE 2 -#define CONFIG_SATA1 -#define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR -#define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA -#define CONFIG_SATA2 -#define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR -#define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA -#define CONFIG_LBA48 -/* #define CONFIG_DOS_PARTITION */ -#endif #endif /*#define CONFIG_SPI_FLASH_MTD*/ @@ -587,10 +583,6 @@ /* #define CONFIG_SYS_DPAA_RMAN */ #define CONFIG_SYS_INTERLAKEN -/*TODO: QE not supported on T2081 - #define CONFIG_QE - #define CONFIG_U_QE */ - /* Default address of microcode for the Linux Fman driver */ /* TODO: move FMAN/QE ucode to boot source */ @@ -605,17 +597,26 @@ #define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)*/ #define CONFIG_SYS_QE_FMAN_FW_IN_NAND #define CONFIG_SYS_FMAN_FW_ADDR (0x240000) /* Refer to mtdparts: fman_ucode */ -#define CONFIG_SYS_QE_FW_ADDR (0x280000) /* Refer to mtdparts: qe_ucode */ +/*#define CONFIG_SYS_QE_FW_ADDR (0x280000)*/ /* Refer to mtdparts: qe_ucode */ +/*#define CONFIG_SYS_CORTINA_FW_IN_NAND +#define CONFIG_CORTINA_FW_ADDR (0x2a0000) +#define CONFIG_CORTINA_FW_LENGTH 0x28000*/ #elif defined(CONFIG_NAND_FLASH_BOOT) #define CONFIG_SYS_QE_FMAN_FW_IN_NAND #define CONFIG_SYS_FMAN_FW_ADDR (0x240000) /* Refer to mtdparts: fman_ucode */ -#define CONFIG_SYS_QE_FW_ADDR (0x280000) /* Refer to mtdparts: qe_ucode */ +/*#define CONFIG_SYS_QE_FW_ADDR (0x280000)*/ /* Refer to mtdparts: qe_ucode */ +/*#define CONFIG_SYS_CORTINA_FW_IN_NAND +#define CONFIG_CORTINA_FW_ADDR (0x2a0000) +#define CONFIG_CORTINA_FW_LENGTH 0x28000*/ #else #define CONFIG_SYS_QE_FMAN_FW_IN_NOR #define CONFIG_SYS_FMAN_FW_ADDR 0xe8240000 /* Refer to mtdparts: fman_ucode */ -#define CONFIG_SYS_QE_FW_ADDR 0xe8280000 /* Refer to mtdparts: qe_ucode */ +/*#define CONFIG_SYS_QE_FW_ADDR 0xe8280000*/ /* Refer to mtdparts: qe_ucode */ +/* TODO: #define CONFIG_SYS_CORTINA_FW_IN_NOR +#define CONFIG_CORTINA_FW_ADDR 0xe82a0000 +#define CONFIG_CORTINA_FW_LENGTH */ /* __stringify(CONFIG_LOADADDR) */ #endif @@ -632,8 +633,8 @@ #define CONFIG_SYS_RGMII1_PHY_ADDR 0x00 #define CONFIG_SYS_RGMII2_PHY_ADDR 0x01 -#define FM1_10GEC1_PHY_ADDR 0x00 -#define FM1_10GEC2_PHY_ADDR 0x01 +#define CORTINA_PHY_ADDR1 0x00 +#define CORTINA_PHY_ADDR2 0x01 #define CONFIG_MII /* MII PHY management */ #define CONFIG_ETHPRIME "FM1@DTSEC3" @@ -738,6 +739,7 @@ "2M@0x0(u-boot)," \ "256k(env)," \ "256k(fman_ucode)," + /*"256k(cs_ucode),"*/ #ifdef CONFIG_NAND_FLASH @@ -900,7 +902,7 @@ "setfans=i2c dev 0; i2c mw 0x2e 0x40 1;i2c mw 0x2e 0x7d 0x2;" \ "i2c mw 0x2e 0x5c 0xe0;i2c mw 0x2e 0x5d 0xe0;i2c mw 0x2e 0x5e 0xe0;" \ "i2c mw 0x2e 0x5f 0xc8;i2c mw 0x2e 0x60 0xc8;i2c mw 0x2e 0x61 0xc8;" \ - "i2c mw 0x2e 0x30 0x20;i2c mw 0x2e 0x31 0x20;i2c mw 0x2e 0x32 0x20;\0"\ + "i2c mw 0x2e 0x30 0x40;i2c mw 0x2e 0x31 0x40;i2c mw 0x2e 0x32 0x40;\0"\ \ "probe-spi-flash=sf probe 0; if test $? = \"0\"; then " \ "setenv mtdids \"${mtdids}\",nor1=fe110000.spi;" \ @@ -911,7 +913,7 @@ \ "bootcmd=run setfans; run "BOOTCMD"\0" \ \ - "bootargs_sata=rootfstype=ext4 root=/dev/sda1 rw\0" \ - "bootargs=console=ttyS0,115200 rootwait panic=10\0" \ + "bootargs_sata=rootfstype=ext2 root=/dev/sda1 rw\0" \ + "bootargs=console=ttyS0,115200 rootwait panic=10 pci=realloc\0" \ #endif /* SIMC_T2081_H */ |