diff options
Diffstat (limited to 'include/configs/uniphier.h')
| -rw-r--r-- | include/configs/uniphier.h | 72 |
1 files changed, 55 insertions, 17 deletions
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h index c6fc90f..e485583 100644 --- a/include/configs/uniphier.h +++ b/include/configs/uniphier.h @@ -9,7 +9,6 @@ #ifndef __CONFIG_UNIPHIER_COMMON_H__ #define __CONFIG_UNIPHIER_COMMON_H__ -#define CONFIG_I2C_EEPROM #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 #define CONFIG_SMC911X @@ -71,8 +70,7 @@ /* serial console configuration */ #define CONFIG_BAUDRATE 115200 - -#if !defined(CONFIG_SPL_BUILD) +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64) #define CONFIG_USE_ARCH_MEMSET #define CONFIG_USE_ARCH_MEMCPY #endif @@ -99,8 +97,21 @@ #define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_PART 1 +#ifdef CONFIG_ARM64 +#define CPU_RELEASE_ADDR 0x80000000 +#define COUNTER_FREQUENCY 50000000 +#define CONFIG_GICV3 +#define GICD_BASE 0x5fe00000 +#if defined(CONFIG_ARCH_UNIPHIER_LD11) +#define GICR_BASE 0x5fe40000 +#elif defined(CONFIG_ARCH_UNIPHIER_LD20) +#define GICR_BASE 0x5fe80000 +#endif +#else /* Time clock 1MHz */ #define CONFIG_SYS_TIMER_RATE 1000000 +#endif + #define CONFIG_SYS_MAX_NAND_DEVICE 1 #define CONFIG_SYS_NAND_MAX_CHIPS 2 @@ -124,12 +135,10 @@ /* USB */ #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4 -#define CONFIG_CMD_FAT #define CONFIG_FAT_WRITE #define CONFIG_DOS_PARTITION /* SD/MMC */ -#define CONFIG_CMD_MMC #define CONFIG_SUPPORT_EMMC_BOOT #define CONFIG_GENERIC_MMC @@ -137,9 +146,6 @@ #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000) -#define CONFIG_BOOTDELAY 3 -#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ - /* * Network Configuration */ @@ -176,23 +182,36 @@ "bootm $fit_addr_r\0" \ "__nfsboot=run tftpboot\0" #else -#define CONFIG_CMD_BOOTZ +#ifdef CONFIG_ARM64 +#define CONFIG_CMD_BOOTI +#define CONFIG_BOOTFILE "Image" +#define LINUXBOOT_CMD "booti" +#define KERNEL_ADDR_R "kernel_addr_r=0x80080000\0" +#define KERNEL_SIZE "kernel_size=0x00c00000\0" +#define RAMDISK_ADDR "ramdisk_addr=0x00e00000\0" +#else #define CONFIG_BOOTFILE "zImage" +#define LINUXBOOT_CMD "bootz" +#define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0" +#define KERNEL_SIZE "kernel_size=0x00800000\0" +#define RAMDISK_ADDR "ramdisk_addr=0x00a00000\0" +#endif #define LINUXBOOT_ENV_SETTINGS \ "fdt_addr=0x00100000\0" \ "fdt_addr_r=0x84100000\0" \ "fdt_size=0x00008000\0" \ "kernel_addr=0x00200000\0" \ - "kernel_addr_r=0x80208000\0" \ - "kernel_size=0x00800000\0" \ - "ramdisk_addr=0x00a00000\0" \ + KERNEL_ADDR_R \ + KERNEL_SIZE \ + RAMDISK_ADDR \ "ramdisk_addr_r=0x84a00000\0" \ "ramdisk_size=0x00600000\0" \ "ramdisk_file=rootfs.cpio.uboot\0" \ "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \ - "bootz $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ + LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \ "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \ - "cp.b $kernel_addr $kernel_addr_r $kernel_size &&" \ + "setexpr kernel_size $kernel_size / 4 &&" \ + "cp $kernel_addr $kernel_addr_r $kernel_size &&" \ "setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \ "setexpr fdt_addr_r $nor_base + $fdt_addr &&" \ "run boot_common\0" \ @@ -206,7 +225,6 @@ "run boot_common\0" \ "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \ "tftpboot $fdt_addr_r $fdt_file &&" \ - "tftpboot $fdt_addr_r $fdt_file &&" \ "setenv ramdisk_addr_r - &&" \ "run boot_common\0" #endif @@ -221,7 +239,6 @@ "tftpboot $tmp_addr u-boot.bin\0" \ "emmcupdate=mmcsetn &&" \ "mmc partconf $mmc_first_dev 0 1 1 &&" \ - "mmc erase 0 800 &&" \ "tftpboot u-boot-spl.bin &&" \ "mmc write $loadaddr 0 80 &&" \ "tftpboot u-boot.bin &&" \ @@ -237,15 +254,26 @@ #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_NR_DRAM_BANKS 2 +/* for LD20; the last 64 byte is used for dynamic DDR PHY training */ +#define CONFIG_SYS_MEM_TOP_HIDE 64 -#if defined(CONFIG_ARCH_UNIPHIER_SLD3) || defined(CONFIG_ARCH_UNIPHIER_LD4) || \ +#if defined(CONFIG_ARM64) +#define CONFIG_SPL_TEXT_BASE 0x30000000 +#elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \ + defined(CONFIG_ARCH_UNIPHIER_LD4) || \ defined(CONFIG_ARCH_UNIPHIER_SLD8) #define CONFIG_SPL_TEXT_BASE 0x00040000 #else #define CONFIG_SPL_TEXT_BASE 0x00100000 #endif +#if defined(CONFIG_ARCH_UNIPHIER_LD11) +#define CONFIG_SPL_STACK (0x30014c00) +#elif defined(CONFIG_ARCH_UNIPHIER_LD20) +#define CONFIG_SPL_STACK (0x3001c000) +#else #define CONFIG_SPL_STACK (0x00100000) +#endif #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE) #define CONFIG_PANIC_HANG @@ -253,8 +281,12 @@ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_SERIAL_SUPPORT #define CONFIG_SPL_NOR_SUPPORT +#ifdef CONFIG_ARM64 +#define CONFIG_SPL_BOARD_LOAD_IMAGE +#else #define CONFIG_SPL_NAND_SUPPORT #define CONFIG_SPL_MMC_SUPPORT +#endif #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */ #define CONFIG_SPL_LIBGENERIC_SUPPORT @@ -270,5 +302,11 @@ #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" #define CONFIG_SPL_MAX_FOOTPRINT 0x10000 #define CONFIG_SPL_MAX_SIZE 0x10000 +#if defined(CONFIG_ARCH_UNIPHIER_LD11) +#define CONFIG_SPL_BSS_START_ADDR 0x30012000 +#elif defined(CONFIG_ARCH_UNIPHIER_LD20) +#define CONFIG_SPL_BSS_START_ADDR 0x30016000 +#endif +#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */ |