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-rw-r--r--include/asm-arm/arch-pxa/mmc.h17
-rw-r--r--include/asm-arm/mach-types.h13
-rw-r--r--include/asm-arm/u-boot-arm.h2
-rw-r--r--include/asm-avr32/arch-at32ap700x/mmc.h19
-rw-r--r--include/asm-ppc/bitops.h52
-rw-r--r--include/common.h7
-rw-r--r--include/configs/MPC8349EMDS.h1
-rw-r--r--include/configs/MVBLM7.h2
-rw-r--r--include/configs/davinci_sffsdr.h177
-rw-r--r--include/configs/sacsng.h12
-rw-r--r--include/exports.h2
-rw-r--r--include/lmb.h1
-rw-r--r--include/mmc.h24
-rwxr-xr-xinclude/sha256.h16
-rw-r--r--include/spi.h9
15 files changed, 308 insertions, 46 deletions
diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h
index 9440d80..85e144b 100644
--- a/include/asm-arm/arch-pxa/mmc.h
+++ b/include/asm-arm/arch-pxa/mmc.h
@@ -110,23 +110,6 @@
#define MMC_DEFAULT_RCA 1
#define MMC_BLOCK_SIZE 512
-#define MMC_CMD_RESET 0
-#define MMC_CMD_SEND_OP_COND 1
-#define MMC_CMD_ALL_SEND_CID 2
-#define MMC_CMD_SET_RCA 3
-#define MMC_CMD_SELECT_CARD 7
-#define MMC_CMD_SEND_CSD 9
-#define MMC_CMD_SEND_CID 10
-#define MMC_CMD_SEND_STATUS 13
-#define MMC_CMD_SET_BLOCKLEN 16
-#define MMC_CMD_READ_BLOCK 17
-#define MMC_CMD_RD_BLK_MULTI 18
-#define MMC_CMD_WRITE_BLOCK 24
-#define MMC_CMD_APP_CMD 55
-
-#define SD_CMD_APP_SET_BUS_WIDTH 6
-#define SD_CMD_APP_OP_COND 41
-
#define MMC_MAX_BLOCK_SIZE 512
#define MMC_R1_IDLE_STATE 0x01
diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h
index aaf2ea2..b347857 100644
--- a/include/asm-arm/mach-types.h
+++ b/include/asm-arm/mach-types.h
@@ -1595,6 +1595,7 @@ extern unsigned int __machine_arch_type;
#define MACH_TYPE_P300 1602
#define MACH_TYPE_XDACOMET 1603
#define MACH_TYPE_DEXFLEX2 1604
+#define MACH_TYPE_SFFSDR 1657
#ifdef CONFIG_ARCH_EBSA110
# ifdef machine_arch_type
@@ -16500,6 +16501,18 @@ extern unsigned int __machine_arch_type;
# define machine_is_schmoogie() (0)
#endif
+#ifdef CONFIG_MACH_SFFSDR
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_SFFSDR
+# endif
+# define machine_is_sffsdr() (machine_arch_type == MACH_TYPE_SFFSDR)
+#else
+# define machine_is_sffsdr() (0)
+#endif
+
#ifdef CONFIG_MACH_AZTOOL
# ifdef machine_arch_type
# undef machine_arch_type
diff --git a/include/asm-arm/u-boot-arm.h b/include/asm-arm/u-boot-arm.h
index 41e7a8f..4ee5a32 100644
--- a/include/asm-arm/u-boot-arm.h
+++ b/include/asm-arm/u-boot-arm.h
@@ -52,7 +52,7 @@ void setup_revision_tag (struct tag **params);
/* To be fixed! */
/* ------------------------------------------------------------ */
/* common/cmd_nvedit.c */
-void setenv (char *, char *);
+int setenv (char *, char *);
/* cpu/.../interrupt.c */
void reset_timer_masked (void);
diff --git a/include/asm-avr32/arch-at32ap700x/mmc.h b/include/asm-avr32/arch-at32ap700x/mmc.h
index 6a33fef..9caba91 100644
--- a/include/asm-avr32/arch-at32ap700x/mmc.h
+++ b/include/asm-avr32/arch-at32ap700x/mmc.h
@@ -71,25 +71,6 @@ struct mmc_csd
u8 one:1;
};
-/* MMC Command numbers */
-#define MMC_CMD_GO_IDLE_STATE 0
-#define MMC_CMD_SEND_OP_COND 1
-#define MMC_CMD_ALL_SEND_CID 2
-#define MMC_CMD_SET_RELATIVE_ADDR 3
-#define MMC_CMD_SD_SEND_RELATIVE_ADDR 3
-#define MMC_CMD_SET_DSR 4
-#define MMC_CMD_SELECT_CARD 7
-#define MMC_CMD_SEND_CSD 9
-#define MMC_CMD_SEND_CID 10
-#define MMC_CMD_SEND_STATUS 13
-#define MMC_CMD_SET_BLOCKLEN 16
-#define MMC_CMD_READ_SINGLE_BLOCK 17
-#define MMC_CMD_READ_MULTIPLE_BLOCK 18
-#define MMC_CMD_WRITE_BLOCK 24
-#define MMC_CMD_APP_CMD 55
-
-#define MMC_ACMD_SD_SEND_OP_COND 41
-
#define R1_ILLEGAL_COMMAND (1 << 22)
#define R1_APP_CMD (1 << 5)
diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h
index 4e9c608..daa66cf 100644
--- a/include/asm-ppc/bitops.h
+++ b/include/asm-ppc/bitops.h
@@ -152,6 +152,7 @@ extern __inline__ int test_bit(int nr, __const__ volatile void *addr)
}
/* Return the bit position of the most significant 1 bit in a word */
+/* - the result is undefined when x == 0 */
extern __inline__ int __ilog2(unsigned int x)
{
int lz;
@@ -167,6 +168,57 @@ extern __inline__ int ffz(unsigned int x)
return __ilog2(x & -x);
}
+/*
+ * fls: find last (most-significant) bit set.
+ * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
+ *
+ * On powerpc, __ilog2(0) returns -1, but this is not safe in general
+ */
+static __inline__ int fls(unsigned int x)
+{
+ return __ilog2(x) + 1;
+}
+
+/**
+ * fls64 - find last set bit in a 64-bit word
+ * @x: the word to search
+ *
+ * This is defined in a similar way as the libc and compiler builtin
+ * ffsll, but returns the position of the most significant set bit.
+ *
+ * fls64(value) returns 0 if value is 0 or the position of the last
+ * set bit if value is nonzero. The last (most significant) bit is
+ * at position 64.
+ */
+#if BITS_PER_LONG == 32
+static inline int fls64(__u64 x)
+{
+ __u32 h = x >> 32;
+ if (h)
+ return fls(h) + 32;
+ return fls(x);
+}
+#elif BITS_PER_LONG == 64
+static inline int fls64(__u64 x)
+{
+ if (x == 0)
+ return 0;
+ return __ilog2(x) + 1;
+}
+#else
+#error BITS_PER_LONG not 32 or 64
+#endif
+
+static inline int __ilog2_u64(u64 n)
+{
+ return fls64(n) - 1;
+}
+
+static inline int ffs64(u64 x)
+{
+ return __ilog2_u64(x & -x) + 1ull;
+}
+
#ifdef __KERNEL__
/*
diff --git a/include/common.h b/include/common.h
index fd5adb3..10b997e 100644
--- a/include/common.h
+++ b/include/common.h
@@ -243,9 +243,9 @@ char *getenv (char *);
int getenv_r (char *name, char *buf, unsigned len);
int saveenv (void);
#ifdef CONFIG_PPC /* ARM version to be fixed! */
-void inline setenv (char *, char *);
+int inline setenv (char *, char *);
#else
-void setenv (char *, char *);
+int setenv (char *, char *);
#ifdef CONFIG_HAS_UID
void forceenv (char *, char *);
#endif
@@ -682,6 +682,9 @@ void __attribute__((weak)) show_boot_progress (int val);
#define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
#define roundup(x, y) ((((x) + ((y) - 1)) / (y)) * (y))
+#define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1)
+#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
+
/* Multicore arch functions */
#ifdef CONFIG_MP
int cpu_status(int nr);
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 37e3ca4..8705838 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -355,7 +355,6 @@
/* SPI */
#define CONFIG_MPC8XXX_SPI
-#define CONFIG_HARD_SPI /* SPI with hardware support */
#undef CONFIG_SOFT_SPI /* SPI bit-banged */
/* GPIOs. Used as SPI chip selects */
diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h
index 349ca14..0b238bd 100644
--- a/include/configs/MVBLM7.h
+++ b/include/configs/MVBLM7.h
@@ -262,7 +262,7 @@
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND CFG_ENV_SIZE
-#define CONFIG_LOADS_ECHO
+#define CONFIG_LOADS_ECHO
#define CFG_LOADS_BAUD_CHANGE
/*
diff --git a/include/configs/davinci_sffsdr.h b/include/configs/davinci_sffsdr.h
new file mode 100644
index 0000000..41a6763
--- /dev/null
+++ b/include/configs/davinci_sffsdr.h
@@ -0,0 +1,177 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*=======*/
+/* Board */
+/*=======*/
+#define SFFSDR
+#define CFG_NAND_LARGEPAGE
+#define CFG_USE_NAND
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
+#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
+#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
+#define CFG_HZ 1000
+/*==================================================*/
+/* EEPROM definitions for Atmel 24LC64 EEPROM chip */
+/*==================================================*/
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_EEPROM_PAGE_WRITE_BITS 5
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */
+#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
+#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
+#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
+#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
+#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */
+#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
+#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */
+#define CFG_ENV_SIZE SZ_128K
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+#define CFG_NAND_BASE 0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS 1
+#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
+/*=====================*/
+/* Board related stuff */
+/*=====================*/
+/*==========================================*/
+/* I2C switch definitions for PCA9543 chip */
+/* on Lyrtech SFF SDR board. */
+/* This chip has a single register. */
+/*==========================================*/
+#define CFG_I2C_PCA9543_ADDR 0x70
+#define CFG_I2C_PCA9543_ADDR_LEN 0
+#define CFG_I2C_PCA9543_ENABLE_CH0 0x01 /* Enable channel 0. */
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+/* Print buffer size */
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16)
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR 0x80700000 /* Default Linux kernel
+ * load address. */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far,
+ * may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*
+ * Define this to load an Integrity kernel.
+ *
+#define CONFIG_CMD_ELF
+ */
+
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR 0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS \
+ "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot"
+
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h
index 4974fb4..2a398e8 100644
--- a/include/configs/sacsng.h
+++ b/include/configs/sacsng.h
@@ -272,10 +272,14 @@
#undef SPI_INIT /* no port initialization needed */
#define SPI_READ ((immr->im_ioport.iop_pdatd & I2C_MISO) != 0)
-#define SPI_SDA(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_MOSI; \
- else immr->im_ioport.iop_pdatd &= ~I2C_MOSI
-#define SPI_SCL(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_SCLK; \
- else immr->im_ioport.iop_pdatd &= ~I2C_SCLK
+#define SPI_SDA(bit) do { \
+ if(bit) immr->im_ioport.iop_pdatd |= I2C_MOSI; \
+ else immr->im_ioport.iop_pdatd &= ~I2C_MOSI; \
+ } while (0)
+#define SPI_SCL(bit) do { \
+ if(bit) immr->im_ioport.iop_pdatd |= I2C_SCLK; \
+ else immr->im_ioport.iop_pdatd &= ~I2C_SCLK; \
+ } while (0)
#define SPI_DELAY /* No delay is needed */
#endif /* CONFIG_SOFT_SPI */
diff --git a/include/exports.h b/include/exports.h
index d6512cb..6377875 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -22,7 +22,7 @@ void vprintf(const char *, va_list);
void do_reset (void);
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base);
char *getenv (char *name);
-void setenv (char *varname, char *varvalue);
+int setenv (char *varname, char *varvalue);
long simple_strtol(const char *cp,char **endp,unsigned int base);
int strcmp(const char * cs,const char * ct);
#ifdef CONFIG_HAS_UID
diff --git a/include/lmb.h b/include/lmb.h
index 03d7667..0283075 100644
--- a/include/lmb.h
+++ b/include/lmb.h
@@ -43,6 +43,7 @@ extern phys_addr_t lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align
extern phys_addr_t __lmb_alloc_base(struct lmb *lmb, phys_size_t size, ulong align,
phys_addr_t max_addr);
extern int lmb_is_reserved(struct lmb *lmb, phys_addr_t addr);
+extern long lmb_free(struct lmb *lmb, u64 base, u64 size);
extern void lmb_dump_all(struct lmb *lmb);
diff --git a/include/mmc.h b/include/mmc.h
index a271695..19c76fe 100644
--- a/include/mmc.h
+++ b/include/mmc.h
@@ -25,6 +25,30 @@
#define _MMC_H_
#include <asm/arch/mmc.h>
+/* MMC command numbers */
+#define MMC_CMD_GO_IDLE_STATE 0
+#define MMC_CMD_SEND_OP_COND 1
+#define MMC_CMD_ALL_SEND_CID 2
+#define MMC_CMD_SET_RELATIVE_ADDR 3
+#define MMC_CMD_SET_DSR 4
+#define MMC_CMD_SELECT_CARD 7
+#define MMC_CMD_SEND_CSD 9
+#define MMC_CMD_SEND_CID 10
+#define MMC_CMD_SEND_STATUS 13
+#define MMC_CMD_SET_BLOCKLEN 16
+#define MMC_CMD_READ_SINGLE_BLOCK 17
+#define MMC_CMD_READ_MULTIPLE_BLOCK 18
+#define MMC_CMD_WRITE_BLOCK 24
+#define MMC_CMD_APP_CMD 55
+
+/* SD Card command numbers */
+#define SD_CMD_SEND_RELATIVE_ADDR 3
+#define SD_CMD_SWITCH 6
+#define SD_CMD_SEND_IF_COND 8
+
+#define SD_CMD_APP_SET_BUS_WIDTH 6
+#define SD_CMD_APP_SEND_OP_COND 41
+
int mmc_init(int verbose);
int mmc_read(ulong src, uchar *dst, int size);
int mmc_write(uchar *src, ulong dst, int size);
diff --git a/include/sha256.h b/include/sha256.h
new file mode 100755
index 0000000..e38ea89
--- /dev/null
+++ b/include/sha256.h
@@ -0,0 +1,16 @@
+#ifndef _SHA256_H
+#define _SHA256_H
+
+#define SHA256_SUM_LEN 32
+
+typedef struct {
+ uint32_t total[2];
+ uint32_t state[8];
+ uint8_t buffer[64];
+} sha256_context;
+
+void sha256_starts(sha256_context * ctx);
+void sha256_update(sha256_context * ctx, uint8_t * input, uint32_t length);
+void sha256_finish(sha256_context * ctx, uint8_t digest[SHA256_SUM_LEN]);
+
+#endif /* _SHA256_H */
diff --git a/include/spi.h b/include/spi.h
index 7744c2e..320e50e 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -24,6 +24,15 @@
#ifndef _SPI_H_
#define _SPI_H_
+/* Controller-specific definitions: */
+
+/* CONFIG_HARD_SPI triggers SPI bus initialization in PowerPC */
+#ifdef CONFIG_MPC8XXX_SPI
+# ifndef CONFIG_HARD_SPI
+# define CONFIG_HARD_SPI
+# endif
+#endif
+
/* SPI mode flags */
#define SPI_CPHA 0x01 /* clock phase */
#define SPI_CPOL 0x02 /* clock polarity */