summaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2015-05-26imx6: move all standard includes to mx6_common.hPeter Robinson
The linux/sizes.h, asm/arch/imx-regs.h, asm/imx-common/gpio.h, config_cmd_default.h includes are used fairly universally across imx6 boards so include them in mx6_common.h by default. We define CONFIG_SYS_NO_FLASH before config_cmd_default.h so that we don't have to undef CONFIG_CMD_FLASH / CONFIG_CMD_IMLS everywhere. Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2015-05-26novena: standardise mx6_common.h includePeter Robinson
Standardise mx6_common.h to the same as other mx6 boards Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Reviewed-by: Tom Rini <trini at konsulko.com>
2015-05-26spl: spl_mmc: fix mmc Falcon mode regressionTim Harvey
91199f4a5a21a7cf9dd9e7c05e295a042f8c2b7e broke mmc based Falcon mode. The block_read function returns the number of blocks read thus the error check needs to look for a return of 0 blocks read. Cc: Paul Kocialkowski <contact@paulk.fr> Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
2015-05-26imx: ventana: update README with Falcon mode documentationTim Harvey
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26imx: ventana: update README for micro-SD boot mediumTim Harvey
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26imx: ventana: update MMC env configurationTim Harvey
We will use the same env size and redundancy used for NAND env for MMC. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26thermal: imx_thermal: increase critical temperature thresholdTim Harvey
The CPU temperature grade from OTP is now used to define the critical threshold at which point we busyloop until we are below, however this threshold is still too low. Instead of 20C below the max CPU temperature, change it to 5C defined now by TEMPERATURE_HOT_DETLA for clarity. Rename 'passive' to 'critical' as that better defines our use case here. Additionally change the output of the busyloop message to show the max CPU temperature as well as current. Before: CPU Temperature is 101 C, too hot to boot, waiting... CPU Temperature is 101 C, too hot to boot, waiting... After: CPU Temperature (101C) too close to max (105C) waiting... CPU Temperature (101C) too close to max (105C) waiting... Cc: Stefan Roese <sr@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Heiko Schocher <hs@denx.de> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Jason Liu <r64343@freescale.com> Cc: Ye Li <b37916@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Peng Fan <b51431@freescale.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-26arm, imx6: add support for aristainetos2 boardHeiko Schocher
add support for imx6dl based aristainetos2 board U-Boot 2015.04-rc5-00066-g60f6ed4 (Apr 10 2015 - 08:46:27) CPU: Freescale i.MX6DL rev1.1 at 792 MHz Reset cause: WDOG Board: aristaitenos2 Watchdog enabled I2C: ready DRAM: 1 GiB NAND: 1024 MiB MMC: FSL_SDHC: 0 SF: Detected N25Q128A with page size 256 Bytes, erase size 64 KiB, total 16 MiB Display: lg4573 (480x800) In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 => Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26i2c, mxc: rework i2c base address names for different SoCsHeiko Schocher
rework and unify i2c address names for different SoCs, which use the mxc_i2c driver. Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26arm, imx6, i2c: add I2C4 for MX6DLHeiko Schocher
add I2C4 modul for MX6DL based boards. Signed-off-by: Heiko Schocher <hs@denx.de>
2015-05-26imx: dma: correct MXS_DMA_ALIGNMENTPeng Fan
We should not hardcode MXS_DMA_ALIGNMENT to 32, since we can not guarantee that socs' cache line size is 32 bytes. If on chips whose cache line size is 64 bytes, error occurs: " NAND: ERROR: v7_dcache_inval_range - start address is not aligned - 0xbdf1d1a0 ERROR: v7_dcache_inval_range - stop address is not aligned - 0xbdf1f4a0 ERROR: v7_dcache_inval_range - start address is not aligned - 0xbdf1d1a0 " Align MXS_DMA_ALIGNMENT with ARCH_DMA_MINALIGN whose value is same to CONFIG_SYS_CACHELINE_SIZE if CONFIG_SYS_CACHELINE_SIZE defined. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
2015-05-26pwm: imx: Remove unreachable codeAxel Lin
The break after return is unreachable code, remove it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2015-05-26pwm: imx: Prevent NULL pointer dereferenceAxel Lin
pwm_id_to_reg() can return NULL, so add NULL testing to prevent NULL pointer dereference. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Heiko Schocher <hs@denx.de>
2015-05-21imx: ventana: config: enable Falcon modeTim Harvey
Falcon mode entails the SPL booting the OS directly instead of U-Boot. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-21wandboard: Switch to SPL supportFabio Estevam
Currently we need to build one U-boot image for each of the wandboard variants: quad, dual-lite and solo. By switching to SPL we can support all these variants with a single binary, which is very convenient. Based on the work from Richard Hu. Tested kernel booting on the three boards. Signed-off-by: Richard Hu <hakahu@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Vagrant Cascadian <vagrant@aikidev.net> Reviewed-by: Stefano Babic <sbabic@denx.de>
2015-05-19thermal: imx_thermal: use CPU temperature grade for trip pointsTim Harvey
Replace the hard-coded values for min/max/passive with values derived from the CPU temperature grade. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19imx: mx6: add display of CPU temperature grade in print_cpuinfo()Tim Harvey
When CONFIG_IMX6_THERMAL is defined print the CPU temperature grade info along with the current temperature. Before: CPU: Temperature 42 C After: CPU: Automotive temperature grade (-40C to 125C) at 42C CPU: Industrial temperature grade (-40C to 105C) at 42C CPU: Extended Commercial temperature grade (-20C to 105C) at 42C Cc: Stefan Roese <sr@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Heiko Schocher <hs@denx.de> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Jason Liu <r64343@freescale.com> Cc: Ye Li <b37916@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Peng Fan <b51431@freescale.com> Tested-by: Nikolay Dimitrov <picmaster@mail.bg> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19imx: mx6: add get_cpu_temp_grade to obtain cpu temperature grade from OTPTim Harvey
The MX6 has a temperature grade defined by OCOTP_MEM0[7:6] which is at 0x480 in the Fusemap Description Table in the reference manual. Return this value as well as min/max temperature based on the value. Note that the IMX6SDLRM and the IMX6SXRM do not indicate this in the their Fusemap Description Table however Freescale has confirmed that these eFUSE bits match the description within the IMX6DQRM and that they will be added to the next revision of the respective reference manuals. This has been tested with IMX6 Automative and Industrial parts. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19imx: mx6: display max cpu frequency in print_cpuinfo()Tim Harvey
Display the max CPU frequency as well as the current running CPU frequency if the max CPU frequency is available and differs from the current CPU frequency. Before: CPU: Freescale i.MX6Q rev1.2 at 792 MHz After - using an 800MHz IMX6DL (running at its max) CPU: Freescale i.MX6DL rev1.1 at 792 MHz After - using a 1GHz IMX6Q (not running at its max): CPU: Freescale i.MX6Q rev1.2 996 MHz (running at 792 MHz) Cc: Stefan Roese <sr@denx.de> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Heiko Schocher <hs@denx.de> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Jon Nettleton <jon.nettleton@gmail.com> Cc: Jason Liu <r64343@freescale.com> Cc: Ye Li <b37916@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Peng Fan <b51431@freescale.com> Tested-by: Nikolay Dimitrov <picmaster@mail.bg> Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19imx: mx6: add get_cpu_speed_grade_hz func to return MHz speed grade from OTPTim Harvey
The IMX6 has four different speed grades determined by eFUSE SPEED_GRADING indicated by OCOTP_CFG3[17:16] which is at 0x440 in the Fusemap Description Table. Return this frequency so that it can be used elsewhere. Note that the IMX6SDLRM and the IMX6SXRM do not indicate this in the their Fusemap Description Table however Freescale has confirmed that these eFUSE bits match the description within the IMX6DQRM and that they will be added to the next revision of the respective reference manuals. These have been tested with IMX6 Quad/Solo/Dual-light 800Mhz and 1GHz grades. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19mx6: add OTP bank1 registersTim Harvey
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19arm: mx6: ddr: set fast-exit on DDR3 if pd_fast_exit specifiedTim Harvey
Commit fa8b7d66f49f0c7bd41467fe78f6488d8af6976a introduced fast-exit support to the MMDC however enabling it on the DDR3 got missed. Make sure we enable it on the DDR3 as well. Gateworks uses Micron memory as well as Winbond in MX6. We have found in testing that we need to enable fast-exit for Winbond stability. Gateworks boards are currently the only boards using the MX6 SPL and enabling fast-exit mode. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19arm/imx-common: Fix warning 'get_reset_cause' defined but not usedPrabhakar Kushwaha
Fix below warning arch/arm/imx-common/cpu.c:29:14: warning: ‘get_reset_cause’ defined but not used static char *get_reset_cause(void) Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
2015-05-19pmic: pfuze100 fix typoPeng Fan
Change PUZE_100_SW1ABCONF to PFUZE100_SW1ABCONF Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-05-19imx: mx6sx enable SION for i2c pin muxPeng Fan
Enable IOMUX_CONFIG_SION for all I2C pin mux settings, otherwise we will get erros when doing i2c operations. error log like the following: " wait_for_sr_state: failed sr=81 cr=a0 state=2020 i2c_init_transfer: failed for chip 0xb retry=1 " Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-05-19imx: marsboard: Enable thermal DM supportNikolay Dimitrov
Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
2015-05-19imx: riotboard: Enable thermal DM supportNikolay Dimitrov
Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
2015-05-19imx: riotboard, marsboard: Enable thermal supportNikolay Dimitrov
Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
2015-05-19hummingboard: Remove unused directoryFabio Estevam
The 'mx6-microsom' directory was only used for the previous mx6solo hummingboard support, which has been removed in favour of the SPL version. Remove the remaining piece of the old mx6solo hummingboard support. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
2015-05-19imx: ventana: add pmic_setup to SPLTim Harvey
We need to do any PMIC setup in the SPL if we are to bypass U-Boot for falcon mode. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19imx: ventana: (cosmetic) clean up size defines for improved readabilityTim Harvey
Use the SZ_1M and SZ_1K macros from linuz/sizes.h for improved readability Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19imx: ventana: config: use MMC SPL RAW supportTim Harvey
Switch to MMC RAW support for SPL. We will place the uboot.img at 69KB. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-19env_nand: use nand_spl_load_image for readenv if SPLTim Harvey
The readenv() implementation of env_nand uses the mtd layer which is unnecessary overhead in SPL when we already have a nand_spl_load_image() function that doesn't need it. Using this instead eliminates the need to provide a mtd_read for SPL env as well as reduces code (4KB savings in IMX6 SPL). Signed-off-by: Tim Harvey <tharvey@gateworks.com> Acked-by: Scott Wood <scottwood@freescale.com>
2015-05-15imx: ventana: use stack relocationTim Harvey
Certain features we desire require a larger stack than is available by using iRAM (most notably for us, env_mmc). Relocate the stack to DRAM so that we can use these features. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2015-05-15imx: ventana: add GSC boot watchdog disable to SPLTim Harvey
If the SPL is to be used for Falcon mode then we need to make sure the SPL disable the GSC boot watchdog. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: add gpio setup to SPLTim Harvey
If the SPL is to be used for Falcon mode then we need to make sure it configures basic GPIO (iomux, padconf, and default output levels). Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: use common uart and i2c setup functions in SPLTim Harvey
Now that uart and i2c setup functions have been moved to common.c we can use these and remove code duplication. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: detect pmic using i2c probe instead of board modelTim Harvey
Avoid requiring board-model and probe pmic by its i2c address. This is in preparation for being able to call pmic_setup() from SPL and not need board type. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: move GSC boot watchdog disable function to gsc.cTim Harvey
Move the code that disables the GSC boot watchdog into gsc.c Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: split out common functions between SPL and ubootTim Harvey
Move shared functions used by both SPL and U-Boot to common.c: - setup_iomux_uart() and uart pad config - gpio pad config In the process also moved the following to common.c in preparation for calling it from the SPL: - split i2c setup into a shared function - move pmic init to setup_pmic() function to call directly from power_init_board() - split gpio setup into early (iomux and default pin config) and late (output configuration based on env) Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: default msata/pci mux to pci before PCI enumerationTim Harvey
PCI enumeration occurs early, before we fully configure our GPIO's. Make sure we steer the MSATA/PCI mux to PCI in board_init to ensure PCI is selected before enumeration. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: fix pcie reset for GW522xTim Harvey
The re-assignment of pcie_rst gpio for GW522x needs to occur earlier, before the PCI subsystem calls the toggle funciton. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: config: enable Thermal supportTim Harvey
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: enable DM_SERIALTim Harvey
mxc_serial supports DM so lets use it. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: register gpio's with gpio_requestTim Harvey
Prior to using a gpio a call to gpio_request() should be called to register it with the gpio subsystem. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: config: enable driver modelTim Harvey
Enable U-Boot Driver Model (DM). Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: config: enable gpio commandTim Harvey
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: display SPL boot deviceTim Harvey
Display what device the SPL will fetch uboot.img from Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15imx: ventana: set dtype env var to boot mediaTim Harvey
Bootscripts for some distro's such as Android can benefit from knowing what boot media its script was loaded from. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2015-05-15arm: mx6: ddr3: Remove dead codeNikolay Dimitrov
imx6 mmdc supports data rates up to 1066 MT/s, so remove the code handling higher data rates. Signed-off-by: Nikolay Dimitrov <picmaster@mail.bg>
generated by cgit v0.10.2 at 2024-08-03 05:06:06 (GMT)