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2011-10-05console: Implement pre-console bufferGraeme Russ
Allow redirection of console output prior to console initialisation to a temporary buffer. To enable this functionality, the board (or arch) must define: - CONFIG_PRE_CONSOLE_BUFFER - Enable pre-console buffer - CONFIG_PRE_CON_BUF_ADDR - Base address of pre-console buffer - CONFIG_PRE_CON_BUF_SZ - Size of pre-console buffer (in bytes) The pre-console buffer will buffer the last CONFIG_PRE_CON_BUF_SZ bytes Any earlier characters are silently dropped.
2011-10-05Makefile: remove mx31pdk exceptionStefano Babic
An entry in the main Makefile for the mx31pdk board is not necessary, and the board is added to boards.cfg as all other targets. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
2011-10-05Makefile: drop imx31_phycore from general MakefileStefano Babic
Signed-off-by: Stefano Babic <sbabic@denx.de>
2011-10-05Makefile: remove tx25 exceptionStefano Babic
An entry in the main Makefile for the tx25 board is not necessary, and the board is added to boards.cfg as all other targets. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Wolfgang Denk <wd@denx.de>
2011-10-05PPC: Cleanup tqm8xx_pcmcia.cMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
2011-10-05TQM8xx: make room for growing code size due to I/O accessor cleanupWolfgang Denk
Commit "PPC: Cleanup tqm8xx_pcmcia.c" will clean up the PCMCIA code to use I/O accessors instead of plain volatile pointer accesses. This will result in about 300 byte bigger code. Fix custom linker script to make room for this. While we are at it, drop unmaintained u-boot.lds.debug linker script. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Tested-by: Wolfgang Denk <wd@denx.de>
2011-10-04Merge branch 'master' of git://git.denx.de/u-boot-nand-flashWolfgang Denk
* 'master' of git://git.denx.de/u-boot-nand-flash: PPC: Fix socrates NAND problem PPC: Fix fsl_upm.c by renaming nand handling functions NAND: Make page, erase, oob size available via cmd_nand mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poi NAND: Add -y option to nand scrub command NAND: Add nand read.raw and write.raw commands NAND: Really ignore bad blocks when scrubbing spl, nand: add 4bit HW ecc oob first nand_read_page function mxc_nand: fix a problem writing more than 32MB mxc_nand: fixed some typos (cosmetic) nand: increase chip_delay in mv kirkwood nand driver
2011-10-04Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk
* 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/p3060: Add SoC related support for P3060 platform powerpc/85xx: Add support for setting up RAID engine liodns on P5020 powerpc/85xx: Refactor some defines out of corenet_ds.h fm-eth: Add ability for board code to disable a port powerpc/mpc8548: Add workaround for erratum NMG_LBC103 powerpc/mpc8548: Add workaround for erratum NMG_DDR120 powerpc/mpc85xxcds: Fix PCI speed powerpc/mpc8548cds: Fix booting message powerpc/p4080: Add support for secure boot flow powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASH powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boards powerpc/p2041rdb: remove watch dog related codes powerpc/p2041rdb: updated description of cpld command powerpc/p2041rdb: add more ddr frequencies support powerpc/p2041rdb: set sysclk according to status of physical switch SW1 powerpc/p2041rdb: update cpld reset command according to CPLD 2.0 powerpc/mpc8349emds: Migrate from spd_sdram to unified DDR driver powerpc/mpc83xx: Migrate from spd_sdram to unified DDR driver powerpc/mpc8xxx: Add DDR2 to unified DDR driver powerpc/mpc8xxx: Fix picos_to_mclk() and get_memory_clk_period_ps() powerpc/mpc8xxx: Add SPD EEPROM address for single controller 2 slots powerpc/mpc8xxx: Fix DDR code for empty first DIMM slot and enable DQS_en powerpc/85xx: Refactor P2041RDB to use common p_corenet files powerpc/85xx: refactor common P-Series CoreNet files for FSL boards powerpc/85xx: Enable CMD_REGINFO on corenet boards powerpc/85xx: p2041rdb - Remove unused 'execute' perm in TLB entries powerpc/85xx: Fix USB protocol definitions for P1020RDB powerpc/corenet_ds: Use separated speed tables for UDIMM and RDIMM powerpc/mpc8xxx: Move DDR RCW overriding to common code powerpc/mpc8xxx: Extend CWL table powerpc/85xx: Cleanup how SVR_MAJ() is defined on MPC8536 powerpc/85xx: Cleanup extern in corenet_ds board code powerpc/p2041rdb: Add ethernet support on P2041RDB board powerpc/85xx: Add networking support to P1023RDS powerpc/hydra: Add ethernet support on P5020/P3041 DS boards powerpc/85xx: Add FMan ethernet support to P4080DS powerpc/85xx: Add support for FMan ethernet in Independent mode powerpc/mpc8548cds: Cleanup mpc8548cds.c powerpc/mp: add support for discontiguous cores powerpc/85xx: corenet_ds - Remove unused 'execute' perm in TLB entries fdt: Add new fdt_create_phandle helper fdt: Rename fdt_create_phandle to fdt_set_phandle powerpc/85xx: Fix compile warnings/errors if CONFIG_SYS_DPAA_FMAN isn't set fsl_ifc: Add the workaround for erratum IFC A-003399(enabled on P1010) powerpc/P1010: Add workaround for erratum P1010-A003549 (related to IFC) fsl_ifc: Add the workaround for erratum IFC-A002769 (enable on P1010) powerpc/85xx: Expanding the window of CCSRBAR in AS=1 from 4k to 1M powerpc/85xx: Add NAND/NAND_SPL support to P1010RDB nand: Freescale Integrated Flash Controller NAND support powerpc/85xx: Add basic support for P1010RDB powerpc/85xx: Add support for new P102x/P2020 RDB style boards powerpc/85xx: relocate CCSR before creating the initial RAM area powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros powerpc/85xx: Enable internal USB UTMI PHY on p204x/p3041/p50x0 powerpc/85xx: Add ULPI and UTMI USB Phy support for P1010/P1014
2011-10-04Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk
* 'master' of git://git.denx.de/u-boot-i2c: I2C: mv_i2c: fix multi-bus init issue I2C: mv_i2c: fix build issue when enable debug option
2011-10-04Merge branch 'emaclite' of git://git.denx.de/u-boot-microblazeWolfgang Denk
* 'emaclite' of git://git.denx.de/u-boot-microblaze: net: emaclite: Use dynamic allocation net: emaclite: Remove baseaddress from xemaclite net: emaclite: Use calloc instead of malloc net: emaclite: Remove deviceid property net: emaclite: Change driver name and add address
2011-10-04Merge branch 'master' of git://git.denx.de/u-boot-microblazeWolfgang Denk
* 'master' of git://git.denx.de/u-boot-microblaze: microblaze: Enable FDT/FIT support microblaze: Remove address offset for uart16550 microblaze: Do not select NFS for platforms without ethernet microblaze: Clean up reset asm code microblaze: Save and restore first unused vector microblaze: Setup MB vectors if feature is enable for u-boot microblaze: Remove debug saving value
2011-10-04Revert "GCC4.6: Convert various empty macros to inline functions"Wolfgang Denk
This reverts commit 60ce53cf9f408d9ad721f8e7a87d6a564e6d5bac. The commit causes build breakage for a number of boards. This results from the fact that now the arguments of debug() actually get referenced (even if there is hope that the compiler will optimize away the debug() call). The obvious fix to that probem (change the code to always declare the referenced variables and data structures) increases the code size, and was this rejected. So it was decided to revert this commit until a better solution is found.
2011-10-03PPC: Fix socrates NAND problemMarek Vasut
nand.c:36: error: static declaration of 'nand_read_buf' follows non-static declaration /home/marex/u-boot/include/nand.h:139: error: previous declaration of 'nand_read_buf' was here Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03PPC: Fix fsl_upm.c by renaming nand handling functionsMarek Vasut
This avoids colision with nand subsystem's functions. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03NAND: Make page, erase, oob size available via cmd_nandMarek Vasut
The "nand info" and "nand device" now set shell/environment variables: nand_writesize ... nand page size nand_oobsize ..... nand oob area size nand_erasesize ... nand erase block size Also, the "nand info" command now displays this info. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: removed unnecessary memsets] Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03mtd: eLBC NAND: remove elbc_fcm_ctrl->oob_poimhench
The eLBC NAND driver currently follows up each program/write operation with a read-back of the page, in order to [ostensibly] fill in ECC data for the caller. However, the page address used for this read is always -1, so the read will never work correctly. Remove this useless (and potentially problematic) block of code. v2: fix broken mailer Signed-off-by: mhench <mhench@elutions.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03NAND: Add -y option to nand scrub commandMarek Vasut
This allows the scrub command to scrub without asking the user if he really wants to scrub the area. Useful in scripts. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03NAND: Add nand read.raw and write.raw commandsMarek Vasut
These commands should work around various "hardware" ECC and BCH methods. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: s/write the page/access the page/] Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03NAND: Really ignore bad blocks when scrubbingMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: use chip instead of redundant priv_nand] Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03spl, nand: add 4bit HW ecc oob first nand_read_page functionHeiko Schocher
Signed-off-by: Heiko Schocher <hs@denx.de> cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03mxc_nand: fix a problem writing more than 32MBHelmut Raiger
When writing 0x4000 to the unlockend_blkaddr register, large writes to a 2k page NAND sometimes fail. The current kernel driver writes 0xFFFF to this register for V2 of the nand controller. However on an i.MX31 this also fixes writes larger than 32MB. The datasheet is very unspecific, but (0x4000=16384)*2000 roughly fits the limits we're encountering with NAND writes. This problem might be NAND chip specific. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03mxc_nand: fixed some typos (cosmetic)Helmut Raiger
Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03nand: increase chip_delay in mv kirkwood nand driverStefan Bigler
The new SAMSUNG NAND Flash K9F1G08U0D require a bigger chip_delay. The Data Transfer from Cell to Register is >= 35us. Other Vendors and older chips normally use >= 25us. To have enough margin 40us is selected. Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Stefan Roese <sr@denx.de> Signed-off-by: Scott Wood <scottwood@freescale.com>
2011-10-03powerpc/p3060: Add SoC related support for P3060 platformShengzhou Liu
Add P3060 SoC specific information:cores setup, LIODN setup, etc The P3060 SoC combines six e500mc Power Architecture processor cores with high-performance datapath acceleration architecture(DPAA), CoreNet fabric infrastructure, as well as network and peripheral interfaces. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/85xx: Add support for setting up RAID engine liodns on P5020Kumar Gala
Add support for Job Queue/Ring LIODN for the RAID Engine on P5020. Each Job Queue/Ring combo needs one id assigned for a total of 4 (2 JQs/2 Rings per JQ). This just handles RAID Engine in non-DPAA mode. Signed-off-by: Santosh Shukla <santosh.shukla@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/85xx: Refactor some defines out of corenet_ds.hKumar Gala
Move some SoC/board specific defines out of corenet_ds.h and into the corresponding P3041DS/P4080DS/P5020.h. We moved CONFIG_MMC, CONFIG_PCIE3, & CONFIG_FSL_NGPIXIS because the P3060 SoC/reference board does not have these devices and it will share the same board code. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03fm-eth: Add ability for board code to disable a portKumar Gala
The SoC configuration may have more ports enabled than a given board actually can utilize. Add a routinue that allows the board code to disable a port that it knows isn't being used. fm_disable_port() needs to be called before cpu_eth_init(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/mpc8548: Add workaround for erratum NMG_LBC103Kumar Gala
The erratum NMG_LBC103 is LBIU3 in MPC8548 errata document. Any local bus transaction may fail during LBIU resynchronization process when the clock divider [CLKDIV] is changing. Ensure there is no transaction on the local bus for at least 100 microseconds after changing clock divider LCRR[CLKDIV]. Refer to the erratum LBIU3 of mpc8548. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/mpc8548: Add workaround for erratum NMG_DDR120Kumar Gala
Erratum NMG_DDR120 (DDR19 in MPC8548 errata document) applies to some early version silicons. The default settings of the DDR IO receiver biasing may not work at cold temperature. When a failure occurs, a DDR input latches an incorrect value. The workaround will set the receiver to an acceptable bias point. Signed-off-by: Gong Chen Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/mpc85xxcds: Fix PCI speedchenhui zhao
The CDS uses PCICLK as SYSCLK. The PCICLK should be 33333333Hz or 66666666Hz. Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/mpc8548cds: Fix booting messagechenhui zhao
Align the output for PCI. Replace "PCI" with "PCI1". Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
2011-10-03powerpc/p4080: Add support for secure boot flowRuchika Gupta
Pre u-boot Flow: 1. User loads the u-boot image in flash 2. PBL/Configuration word is used to create LAW for Flash at 0xc0000000 (Please note that ISBC expects all these addresses, images to be validated, entry point etc within 0 - 3.5G range) 3. ISBC validates the u-boot image, and passes control to u-boot at 0xcffffffc. Changes in u-boot: 1. Temporarily map CONFIG_SYS_MONITOR_BASE to the 1M CONFIG_SYS_PBI_FLASH_WINDOW in AS=1. (The CONFIG_SYS_PBI_FLASH_WINDOW is the address map for the flash created by PBL/configuration word within 0 - 3.5G memory range. The u-boot image at this address has been validated by ISBC code) 2. Remove TLB entries for 0 - 3.5G created by ISBC code 3. Remove the LAW entry for the CONFIG_SYS_PBI_FLASH_WINDOW created by PBL/configuration word after switch to AS = 1 Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com> Acked-by: Wood Scott-B07421 <B07421@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/85xx: Add Secure Boot support on P1010RDB for NOR, NAND & SPIFLASHRuchika Gupta
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Kuldip Giroh <kuldip.giroh@freescale.com>
2011-10-03powerpc/85xx: Add PBL & SECUREBOOT support on P3041/P5020DS boardsKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: remove watch dog related codesShaohui Xie
CPLD 2.2 removed board watch dog support due to the limitation of CPLD capacity after adding all the requested features, such as switch overriding. There is no pin-compatible upgrade part available for current PCB design. So remove codes related to it. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: updated description of cpld commandShaohui Xie
According to CPLD 2.2, the default configuration is changed, so updated the description of CPLD command, otherwise it will confusing. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: add more ddr frequencies supportShaohui Xie
This table covers DDR frequencies from 666 to 1666. Frequencies 666, 833, 1000, 1066 and 1333 were verified on this board with SO-DIMM (UG51U6400N8SU-ACF). Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: set sysclk according to status of physical switch SW1Shaohui Xie
P2041RDB supports 3 sysclk frequencies, it's selected by SW1[6~8], software need to read the SW1 status to decide what the sysclk needs. SW1[8~6] : frequency 0 0 1 : 83.3MHz 0 1 0 : 100MHz others: 66.667MHz Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03powerpc/p2041rdb: update cpld reset command according to CPLD 2.0Shaohui Xie
CPLD 2.0 provides a new register which bit[0] is set to '1' will reset board with initializing the CPLD registers to default values. And add bit[6] of register at offset 0x5 to use to enable flash bank selection. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-10-03I2C: mv_i2c: fix multi-bus init issueLei Wen
When enable the multi-bus, the current_bus is not inited in the original implementation, which make the i2c operation unpredicatable. Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-03I2C: mv_i2c: fix build issue when enable debug optionLei Wen
When DEBUG_I2C is open, the following build issue would shows up. mv_i2c.c: In function 'i2c_transfer': mv_i2c.c:257: error: 'ISR' undeclared (first use in this function) mv_i2c.c:257: error: (Each undeclared identifier is reported only once mv_i2c.c:257: error: for each function it appears in.) Signed-off-by: Lei Wen <leiwen@marvell.com>
2011-10-03net: emaclite: Use dynamic allocationMichal Simek
Every emaclite instance use own setting. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Mike Frysinger <vapier@gentoo.org>
2011-10-03net: emaclite: Remove baseaddress from xemacliteMichal Simek
Use dev->iobase instead of baseaddress. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03net: emaclite: Use calloc instead of mallocMichal Simek
Simplify driver logic and clear eth_device structure in one command. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03net: emaclite: Remove deviceid propertyMichal Simek
Cleanup structure. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03net: emaclite: Change driver name and add addressMichal Simek
Current xilinx emaclite use net multi registration but doesn't support several emaclites interfaces. Changing driver name with adding address to name is the first step how to distiguish several drivers. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03microblaze: Enable FDT/FIT supportMichal Simek
Enable FDT and FIT support. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03microblaze: Remove address offset for uart16550Michal Simek
U-Boot BSP handle 0x3 offset for big endian systems. Little endian Microblaze systems don't use any offset. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03microblaze: Do not select NFS for platforms without ethernetMichal Simek
Undefined network functionality for systems without ethernet and disable NFS support. Signed-off-by: Michal Simek <monstr@monstr.eu>
2011-10-03microblaze: Clean up reset asm codeMichal Simek
- Remove code copying - Reset address is setup from first stage bootloader - Support reset vector setup on little endian Signed-off-by: Michal Simek <monstr@monstr.eu>
generated by cgit v0.10.2 at 2024-11-08 04:05:17 (GMT)