| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-03-31 | sunxi: clk: Fix USB PHY clock macros for A83T | Chen-Yu Tsai | |
| The A83T has 3 PHYs, the last one being HSIC, which has 2 clocks. Also there is only 1 OHCI. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com> | |||
| 2015-12-10 | sunxi: clk: add basic clocks for A83T | vishnupatekar | |
| Add basic clocks pll1, pll5, and some default values from allwinner u-boot. Signed-off-by: Vishnu Patekar <vishnupatekar0510@gmail.com> [hdegoede@redhat.com] Fix PLL6 init to run at 600 MHz instead of 288 MHz, fixing the mmc support not working [hdegoede@redhat.com] Fix PLL init code to properly wait for the PLL-s to stabilize, fixing cold-booting directly from sdcard not working Signed-off-by: Hans de Goede <hdegoede@redhat.com> | |||
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index : u-boot-fsl-qoriq | |
| Freescale u-boot tree with Scalys patches | www-data |
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