| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2016-08-15 | xtensa: add support for the xtensa processor architecture [2/2] | Chris Zankel | |
| The Xtensa processor architecture is a configurable, extensible, and synthesizable 32-bit RISC processor core provided by Tensilica, inc. This is the second part of the basic architecture port, adding the 'arch/xtensa' directory and a readme file. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> | |||
 |
index : u-boot-fsl-qoriq | |
| Freescale u-boot tree with Scalys patches | www-data |
| summaryrefslogtreecommitdiff |