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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This driver allows rebooting the SoC by calling wdt_expire_now op.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This driver controls the watchdog present on this SoC.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Move FTMAC100 to where it should be, alphabetically in
drivers/net/Kconfig
Signed-off-by: Tom Rini <trini@konsulko.com>
Conflicts:
drivers/net/Kconfig
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This patch adjusts memory map for images on LS2080ARDB and
LS2080AQDS NOR flash as below
Image Flash Offset
RCW+PBI 0x00000000
Boot firmware (U-Boot) 0x00100000
Boot firmware Environment 0x00300000
PPA firmware 0x00400000
PHY firmware 0x00980000
DPAA2 MC 0x00A00000
DPAA2 DPL 0x00D00000
DPAA2 DPC 0x00E00000
Kernel.itb 0x01000000
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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This patch is to adjust the memory mapping for FLash/SD card on
LS1043AQDS and LS1043ARDB, such as PPA firmware load address, FMAN
firmware load address, QE firmware load address, U-Boot start address
on serial flash and environment address.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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LS2081ARDB board is similar to LS2080ARDB board with few differences
It hosts LS2081A SoC
Default boot source is QSPI-boot
It does not have IFC interface
RTC and QSPI flash device are different
It provides QIXIS access via I2C
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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The QorIQ LS2081A SoC has eight 64-bit ARM v8 Cortex A72 cores and
is built on layerscape architecture. It is 40-pin derivative of
LS2084A (non-AIOP personality of LS2088A). So feature-wise it is
same as LS2084A. LS2041A is a 4-core personality of LS2081A.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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QSPI-boot is supported on LS2088ARDB RevF board with LS2088A SoC.
LS2088ARDB RevF Board has limitation that QIXIS can not be accessed.
CONFIG_FSL_QIXIS is not enabled.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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LS2080ARDB/LS2088ARDB RevF board has smart voltage translator
which needs to be programmed to enable high speed SD interface
by setting GPIO4_10 output to zero.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Santan Kumar <santan.kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
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Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform.
Verification:
Boot linux kernel via dhcp and bootm ok.
NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000;
NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.178 (4899 ms)
Using mac@e0100000 device
TFTP from server 10.0.4.97; our IP address is 10.0.4.178
Filename 'boomimage-310y-ae300-spi.bin'.
Load address: 0x600000
Loading: #################################################################
#################################################################
#################################################################
...
...
###################################
233.4 KiB/s
done
Bytes transferred = 13872076 (d3abcc hex)
NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb
BOOTP broadcast 1
BOOTP broadcast 2
BOOTP broadcast 3
BOOTP broadcast 4
DHCP client bound to address 10.0.4.178 (4592 ms)
Using mac@e0100000 device
TFTP from server 10.0.4.97; our IP address is 10.0.4.178
Filename 'ae300.dtb'.
Load address: 0x2000000
Loading: #
82 KiB/s
done
Bytes transferred = 2378 (94a hex)
NDS32 # bootm 0x600000 - 0x2000000
Image Name:
Created: 2017-03-22 6:52:03 UTC
Image Type: NDS32 Linux Kernel Image (uncompressed)
Data Size: 13872012 Bytes = 13.2 MiB
Load Address: 0000c000
Entry Point: 0000c000
Verifying Checksum ... OK
Booting using the fdt blob at 0x2000000
Loading Kernel Image ... OK
Loading Device Tree to 01efc000, end 01eff949 ... OK
Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09)
(gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) )
#293 PREEMPT Wed Mar 22 14:49:28 CST 2017
CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159)
...
...
Signed-off-by: rick <rick@andestech.com>
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trini: Make Kconfig SPL_xxx entires only show if SPL, so that we don't
get Kconfig errors on platforms without SPL, ie sandbox (without SPL).
Signed-off-by: Tom Rini <trini@konsulko.com>
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Enable this option by default on sandbox to increase build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_LZMADEC
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_LZMA
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_IRQ
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_IOTRACE
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_IO
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_IMMAP
Also move this command out of the cmd/ directory since it is
PowerPC-specific.
Signed-off-by: Simon Glass <sjg@chromium.org>
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At present IDE support is controlled by CONFIG_CMD_IDE. Add a separate
CONFIG_IDE option so that IDE support can be enabled without requiring
the 'ide' command.
Update existing users and move the ide driver into drivers/block since
it should not be in common/.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_HDMIDETECT
Note that we cannot do 'default y if VIDEO' because this option is only
enabled for a small subset of mx6 boards. Also this command is is not a
great implementation (it doesn't use driver model).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_HASH
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework slightly, enable on some boards again]
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_GETTIME
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_FUSE
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_FPGA_LOADBP
CONFIG_CMD_FPGA_LOADFS
CONFIG_CMD_FPGA_LOADMK
CONFIG_CMD_FPGA_LOADP
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_ESBC_VALIDATE
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_ERRATA
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_ENTERRCM
Signed-off-by: Simon Glass <sjg@chromium.org>
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This converts the following to Kconfig:
CONFIG_CMD_EEPROM
CONFIG_CMD_EEPROM_LAYOUT
CONFIG_EEPROM_LAYOUT_HELP_STRING
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Rework Kconfig logic slightly, define EEPROM location on TI eval
platforms]
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_CMD_ECCTEST
Signed-off-by: Simon Glass <sjg@chromium.org>
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Commit 94e3c8c4fd7b ("crypto/fsl - Add progressive hashing support
using hardware acceleration.") created entries for CONFIG_SHA1,
CONFIG_SHA256, CONFIG_SHA_HW_ACCEL, and CONFIG_SHA_PROG_HW_ACCEL.
However, no defconfig has migrated to it. Complete the move by first
adding additional logic to various Kconfig files to select this when
required and then use the moveconfig tool. In many cases we can select
these because they are required to implement other drivers. We also
correct how we include the various hashing algorithms in SPL.
This commit was generated as follows (after Kconfig additions):
[1] tools/moveconfig.py -y SHA1 SHA256 SHA_HW_ACCEL
[2] tools/moveconfig.py -y SHA_PROG_HW_ACCEL
Note:
We cannot move SHA_HW_ACCEL and SHA_PROG_HW_ACCEL simultaneously
because there is dependency between them.
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Naveen Burmi <NaveenBurmi@freescale.com>
Cc: Po Liu <po.liu@freescale.com>
Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Cc: Priyanka Jain <Priyanka.Jain@freescale.com>
Cc: Shaohui Xie <Shaohui.Xie@freescale.com>
Cc: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Steve Rae <steve.rae@raedomain.com>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Feng Li <feng.li_2@nxp.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: Mingkai Hu <Mingkai.Hu@freescale.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
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This converts the following to Kconfig:
CONFIG_SPL_BOARD_INIT
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
[trini: Update the Kconfig logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
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The IICDVFS(I2C) set in r8a7796.h is common in rcar-gen3.
This moves CONFIG_SYS_I2C_SH_BASE0 in rcar-gen3-base.h.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Support Andestech AE3xx platform: serial, timer device tree flow.
Signed-off-by: rick <rick@andestech.com>
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Support AG101P timer device tree flow.
Signed-off-by: rick <rick@andestech.com>
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Support AG101P serial device tree flow.
Signed-off-by: rick <rick@andestech.com>
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The Salvator-X can have both H3 and M3 CPU on it, drop the
select R8A7795 to allow both configurations.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add Kconfig entry for the R8A7796 RCar M3 SoC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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The R8A7796 r1.1 reports itself as r2.0 , add quirk into the
PRR code to fix this report.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add entry for the R8A7796 RCar M3 SoC into the CPU info table.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Add entry for the R8A7795 RCar H3 SoC into the CPU info table.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Allow selecting the Gen3 SoC in preparation for RCar M3 .
No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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