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2016-10-12x86: coreboot: Convert to use DM coreboot video driverBin Meng
This converts coreboot to use DM framebuffer driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-11x86: mrccache: Fix error handling in mrccache_get_region()Simon Glass
This should return normal errors, not device-tree errors. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: Drop unused init_helper functionsSimon Glass
Drop init_bd_struct_r() which is no-longer used. Also drop the declaration for init_func_spi() since this is now handled by generic board init. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: ivybridge: Tidy up enable_clock_gating() for 64-bitSimon Glass
Fix the hex case and remove unused brackets. Use ~0U instead of ~0UL to allow compilation on 64-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: ivybridge: Fix PCH power setupSimon Glass
At present pch_power_options() has the arguments to writel() around the wrong way. Fix this and update it to compile on 64-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: Correct address casts in interrupt codeSimon Glass
We should cast an address to unsigned long, not u32. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: Correct address casts in cpu codeSimon Glass
We should cast an address to unsigned long, not u32. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: Allow interrupts to be disabled in 64-bit modeSimon Glass
Update the code to support both 32-bit and 64-bit modes. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11dm: x86: Move link to use driver model for videoSimon Glass
Update the configuration to use the new driver. Drop the existing plumbing code and unused header files. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11dm: x86: Move samus to use new driver model supportSimon Glass
Update the samus driver to avoid the direct call to the video BIOS setup. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: Add an accelerated memmove() functionSimon Glass
Bring in a faster memmove() from Linux 4.7. This speeds up scrolling on the display. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: Fix Linux v4.7+ zimage booting (update bootparam.h)Stefan Roese
Booting Linux kernel v4.7+ does not work since Linux kernel commit 974f221c "x86/boot: Move compressed kernel to the end of the decompression buffer". This patch adds the latest version of the setup_header struct, adding "init_size" which is needed since this commit referenced above. With this patch, booting Linux v4.8-rc8 does work again on x86 boards. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-11x86: baytrail: Add 2nd eMMC controller to the PCI probe listStefan Roese
With this addition, the eMMC device available on the congatec and DFI BayTrail SoM is detected correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2016-10-08Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini
2016-10-08ARM: AM437X: Add Silicon ID supportLokesh Vutla
Add silicon ID code for AM437x silicon. This can be used to print the cpu info using CONFIG_DISPLAY_CPUINFO. Also printing "CPU :" along with cpu name in order to be consistent with other OMAP platforms. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2016-10-08ARM: dts: dra72: add rev C evm supportMugunthan V N
Add DTS support for dra72 evm Rev C which has the following changes * Two ethernet ports now instead of the single one in rev B. * DP83867 ethernet phy instead of DP838865. Cc: Vignesh R <vigneshr@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-08arm: Add return value argument to longjmpAlexander Graf
The normal longjmp command allows for a caller to pass the return value of the setjmp() invocation. This patch adds that semantic to the arm implementation of it and adjusts the efi_loader call respectively. Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-08ARM: keystone: rename clk_get_rate() to ks_clk_get_rate()Masahiro Yamada
The KeyStone platform has its own clk_get_rate() but its prototype is different from that of the common-clk (clk-uclass) framework. Prefix the KeyStone specific implementation with ks_ in order to avoid name-space conflict. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-07ARM: keystone: remove declaration of unused functionsMasahiro Yamada
These two functions are neither defined nor referenced. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-07ARM: vf610: use strcpy for soc environment variableStefan Agner
To create the soc environment variable we concatenate two strings on the stack. So far, strcat has been used for the first string as well as for the second string. Since the variable on the stack is not initialized, the first strcat may not start using the first entry in the character array. This then could lead to an buffer overflow on the stack. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2016-10-07arm: dts: imx7: add Ricoh RN5T567 PMIC nodeStefan Agner
Add device tree node for Ricoh RN5T567. Currently we do not need the individual DC/DC converters or LDO's (and they are also not yet supported by the driver). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-10-07arm: dts: imx7: add basic i.MX 7/Colibri iMX7 device treeStefan Agner
Add base device for NXP i.MX 7Solo/7Dual. The two SoC are very similar and hence can share the same device tree for boot loaders purpose. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-07arm: dts: imx7: add pinctrl definesStefan Agner
Add pinctrl defines for NXP i.MX 7Solo/7Dual SoC. The pinctrl format is compatible to the Linux kernel, hence this file is a simple copy from the Linux kernel (commit 97f5c1817b7e). Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2016-10-07ARM: Add register defines for am33xx ePWM registerstomas.melin@vaisala.com
Register definitions needed for configuring the ePWM module. Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
2016-10-07ARM: OMAP5+: Override switch_to_hypervisor functionKeerthy
Override the switch_to_hypervisor function to switch cpu to hypervisor mode using the available ROM code hook early in the boot phase before the boot loader checks for HYP mode. Based on the work done by Jonathan Bergsagel jbergsagel@ti.com. Cc: beagleboard-x15@googlegroups.com Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-07ARM: Introduce function to switch to hypervisor modeKeerthy
On some of the SoCs one cannot enable hypervisor mode directly from the u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader. Hence introduce a weak function which can be overridden based on the SoC type and switch to hypervisor mode in a custom way. Cc: beagleboard-x15@googlegroups.com Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-07omap: Set appropriate cache configuration for LPAE and non-LAPE casesKeerthy
Cache configuration methods is different for LPAE and non-LPAE cases. Hence the bits and the interpretaion is different for two cases. In case of non-LPAE mode short descriptor format is used and we need to set Cache and Buffer bits. In the case of LPAE the cache configuration happens via MAIR0 lookup. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-07omap: Remove hardcoding of mmu section shift to 20Keerthy
As of now the mmu section shift is hardcoded to 20 but with LPAE coming into picture this can be different. Hence replacing 20 with MMU_SECTION_SHIFT macro. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-07ARM64: Add support for some of atomic64 operationsAdam Oleksy
These functions are needed in UBI/UBIFS on ZynqMP platform (ARM64). Signed-off-by: Adam Oleksy <adam.oleksy@nokia.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
2016-10-07Various, accumulated typos collected from around the tree.Robert P. J. Day
Fix various misspellings of: * deprecated * partition * preceding,preceded * preparation * its versus it's * export * existing * scenario * redundant * remaining * value * architecture Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Stefan Roese <sr@denx.de>
2016-10-07ARMv8/sec-firmware: fix a compile errorHou Zhiqiang
When enabled sec firmware framework, but lack of definition of the marco SEC_FIRMWARE_FIT_IMAGE, SEC_FIRMEWARE_FIT_CNF_NAME and SEC_FIRMWARE_TARGET_EL, there will be some build errors, so give a default definition. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
2016-10-07ARM: Respect CONFIG_SPL_STACK define in lowlevel_init.SSiarhei Siamashka
The SPL and U-Boot proper may use different initial stack locations, which are configured via CONFIG_SPL_STACK and CONFIG_SYS_INIT_SP_ADDR defines. The lowlevel_init.S code needs to handle this in the same way as crt0.S Without this fix, setting the U-Boot stack location to some place, which is not safely accessible by the SPL (such as the DRAM), causes a very early SPL deadlock. Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2016-10-06spl: Pass spl_image as a parameter to load_image() methodsSimon Glass
Rather than having a global variable, pass the spl_image as a parameter. This avoids BSS use, and makes it clearer what the function is actually doing. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert spl_board_load_image() to use linker listSimon Glass
Add a linker list declaration for this method and remove the explicit switch() code. Update existing users. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Convert boot_device into a structSimon Glass
At present some spl_xxx_load_image() functions take a parameter and some don't. Of those that do, most take an integer but one takes a string. Convert this parameter into a struct so that we can pass all functions the same thing. This will allow us to use a common function signature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Kconfig: Move SPL_DISPLAY_PRINT to KconfigSimon Glass
Move this option to Kconfig and tidy up existing uses. Also add a function comment to the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a parameter to jump_to_image_linux()Simon Glass
Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Add a parameter to spl_parse_image_header()Simon Glass
Instead of using the global spl_image variable, pass the required struct in as an argument. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06spl: Move spl_board_load_image() into a generic headerSimon Glass
At present this is only used on ARM and sandbox, but it is just as applicable to other architectures. Move the function prototype into the generic SPL header. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2016-10-06pcm052: add new BK4r1 target based on PCM052 SoMAlbert ARIBAUD \(3ADEV\)
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2016-10-06tools: mkimage: add support for Vybrid image formatAlbert ARIBAUD \(3ADEV\)
This format can be flashed directly at address 0 of the NAND FLASH, as it contains all necessary headers. Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2016-10-04imx: imx6ul: disable POR_B internal pull upPeng Fan
>From TO1.1, SNVS adds internal pull up control for POR_B, the register filed is GPBIT[1:0], after system boot up, it can be set to 2b'01 to disable internal pull up. It can save about 30uA power in SNVS mode. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx-common: enlarge mux width to 4Peng Fan
For i.MX6, the mux width is 4, not 3. So enlarge the width. IOMUX_CONFIG_LPSR is changed from 0x8 to 0x20 to not use bit 3 of mux. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx: mx6: fix USB bmode to use reserved valueStefan Agner
Currently the bmode "usb" uses BOOT_CFG1 to 0x01, -which means BOOT_CFG1[7:4] is set to b0000. According to Table 8-7 Boot Device Selection this is NOR/OneNAND and not Reserved. Use 0x10 which leads to b0001, which is a Reserved boot device. With that the SoC reliably falls back to the serial loader. Cc: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Troy Kisky <troy.kisky@boundarydevices.com>
2016-10-04arm: imx: add i.MX6ULL 14x14 EVK board supportPeng Fan
Add i.MX6ULL EVK board support: Add device tree file, which is copied from NXP Linux. Enabled DM_MMC, DM_GPIO, DM_I2C, DM_SPI, PINCTRL, DM_REGULATOR. The uart iomux settings are still keeped in board file. Boot Log: U-Boot 2016.09-rc1-00366-gbb419ef-dirty (Aug 11 2016 - 13:08:58 +0800) CPU: Freescale i.MX6ULL rev1.0 at 396MHz CPU: Commercial temperature grade (0C to 95C) at 15C Reset cause: POR Model: Freescale i.MX6 ULL 14x14 EVK Board Board: MX6ULL 14x14 EVK DRAM: 512 MiB MMC: initialized IMX pinctrl driver FSL_SDHC: 0, FSL_SDHC: 1 In: serial Out: serial Err: serial Net: CPU Net Initialization Failed No ethernet found. Hit any key to stop autoboot: 0 => mmc dev 1 switch to partitions #0, OK mmc1 is current device Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04arm: dts: add device tree for i.MX6ULLPeng Fan
Add device tree for i.MX6ULL. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04arm: dts: imx6ull: add pinctrl definesPeng Fan
Add pinctrl defines for NXP i.MX 6ULL. Since i.MX6ULL reuses some definitions of i.MX6UL, also add i.MX6UL pinctrl defines from linux kernel commit (29b4817d401). Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx: iomux: fix snvs usage for i.MX6ULLPeng Fan
SNVS TAMPER pin and BOOT MODE pins are in SNVS IOMUXC module, not in IOMUXC, so correct the related registers' offset. Use IOMUX_CONFIG_LPSR flag for these pins, so we can differentiate them from iomuxc pins. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
2016-10-04imx: imx6ull: adjust the ldo 1.2v bandgap voltagePeng Fan
Per to design team, on i.MX6UL, the LDO 1.2V bandgap voltage is 30mV higher, so we need to adjust the REFTOP_VBGADJ(anatop MISC0 bit[6:4]) setting to 2b'110. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Bai Ping <ping.bai@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
2016-10-04imx: mx6ull: Add AIPS3 initializationPeng Fan
Since the mx6ull adds the AIPS3, so enable its initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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