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Short circuit the retry loop in legacy_hub_port_reset() by returning an
error from usb_control_msg() when a device was handed over to a companion
by the ehci code. This avoids trying to reset low / fullspeed devices 5
times needlessly. Also do not print an error when a device has been handed
over.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Actually check for usb_set_port_feature() errors and propagate these if they
happen.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Propagate the error returned by submit_control_msg() rather then always
returning -EIO when the hcd code indicates an error.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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The setexpr command used to segfault when accessing memory in sandbox.
The pointer accesses should be mapped.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
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During the Kconfig conversion one of the changes was missed.
CONFIG_SPL_STACK_R should be CONFIG_SPL_STACK_R_ADDR since we want the
address.
Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
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For digital displays (such as EDP LCDs) we would like to read the EDID
information and use that to set display timings. Provide a function to do
this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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As this board seems to be unmaintained for quite some time, and its
not moved to the generic board ingrastructure, lets remove it.
This will also enable us to remove the CONFIG_AUTOBOOT_DELAY_STR2
and CONFIG_AUTOBOOT_STOP_STR2 macros, as this sc3 board is the
only one using one of this macros. A removal patch will follow
soon.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Juergen Beisert <jbeisert@eurodsn.de>
Acked-by: Heiko Schocher <hs@denx.de>
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Introduced in change d20a40de9db07de1f1f06a79a4da1cdda5379b75
"Roll crc32 into hash infrastructure"
The crc32 command with no -v expects an optional 3rd argument to be an
address to store the result in. With the -v switch, the last argument
is a crc, not an address. In the case where -v is set, we should set the
HASH_FLAG_ENV flag since that will first look for the value to be a
digest value, which matches the expected API for the crc32 command.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Introduced in change d20a40de9db07de1f1f06a79a4da1cdda5379b75
"Roll crc32 into hash infrastructure"
Use a consistent define to enable the verify feature in crc32 command.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Fix the usage info from:
part part uuid <interface> <dev>:<part>
to
part uuid <interface> <dev>:<part>
Signed-off-by: Maxin B. John <maxin.john@enea.com>
Reviewed-By: Sjoerd Simons <sjoerd.simons@collabora.co.uk
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This adds support for providing a partition number instead of a sector for eMMC.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
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This refactors spl_mmc_load_image to use a switch/case structure and easier
to understand spl_start_uboot checks. This also introduces some more automatic
fallback on the next mmc boot mode as long as it keeps failing.
Lines that go beyond 80 chars are also reduced by reducing the number of tabs.
Debug and error strings are refctored to match a common style.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
[trini: Fix a thinko in the SPL_EXT_SUPPORT + SPL_OS conversion, make part be
__maybe_unused]
Signed-off-by: Tom Rini <trini@konsulko.com>
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The two tools that create android boot images, mkbootimg and the fastboot
client, set the kernel address by default to 0x10008000.
U-boot always honors this field, and will try to relocate the kernel to
whatever value is set in the header, which won't be mapped to the actual RAM on
most platforms, resulting in the kernel obviously not booting.
All the targets in U-Boot right now will download the android boot image to
CONFIG_SYS_LOAD_ADDR, which means that it will already have been downloaded to
some location that is suitable for execution.
In order to have the kernel booting even with the default boot image kernel
address, if that address is used, just execute the kernel where it is.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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This fixes descriptor reading of lowspeed devices through ohci not working.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Marek Vasut <marex@denx.de>
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Adjust this command so that it supports using driver model for I2C, i.e.
CONFIG_DM_I2C. This will permit it to be used in sandbox also.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Rename this function so that it is clear that it is provided by the RTC.
Also return an error when it cannot function as expected. This is unlikely
to occur since it works for dates since 1752 and many RTCs do not support
such old dates. Still it is better to be accurate.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
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Change this function name to something more descriptive. Also return a
failure code if it cannot calculate a correct value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
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Adjust the printf() string to avoid a warning on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This permits init of additional CPU cores after relocation and when driver
model is ready.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Add a simple command which provides access to a list of available CPUs along
with descriptions and basic information.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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Try to make it a little clearer.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
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This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.
Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>
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add subpagesize, nand options and bbt options to the
"nand info" output.
=> nand info
Device 0: nand0, sector size 256 KiB
Page size 4096 b
OOB size 256 b
Erase size 262144 b
subpagesize 4096 b
options 0x 200
bbt options 0x 8000
Signed-off-by: Heiko Schocher <hs@denx.de>
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Some RTC chips tend to set garbage date after reset.
This patch sets the date to 2000-01-01 00:00 immediatelly
after the RTC chip reset is issued using the "date reset"
command.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
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During booting, IFC is mapped to low region. After booting up, IFC is
remapped to high region for larger space. The environmental variables are
also stored at high region. In order to read the variables during booting,
a virtual mapping is required.
Cache was enabled for entire IFC space before. Actually the first two
entries are big enough (4MB) to cover the boot code and environmental
variables. Remove extra entries. Move OCRAM entry out of ifdef.
Signed-off-by: York Sun <yorksun@freescale.com>
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Otherwise the high 32 bits get truncated on 64-bit U-boot.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <yorksun@freescale.com>
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If enabled, make sure that the device tree is available in SPL before
setting up driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The limit is measured from the start of the malloc() area and is not an
absolute address. Correct this.
Signed-off-by: Simon Glass <sjg@chromium.org>
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To allow this function to be used from SPL, move it to the malloc()
code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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There is little reason to split these two functions. Bring them together
which simplifies the init sequence.
Signed-off-by: Simon Glass <sjg@chromium.org>
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We want to be able to set up the device tree in SPL, so move this code
to a common place.
Signed-off-by: Simon Glass <sjg@chromium.org>
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This patch extends the U-Boot "led" command to support automatic blinking
by setting a blink frequency in milliseconds. Additionally the number of
supported LEDs is increased to 6 (0...5).
This will be used by the PCA9551 LED driver.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Current driver assumes the AHCI is connected to PCI, this is not
true on some SoCs, e.g. LS1021A, which has PCI but the AHCI is
in SoC. This patch will enable embedded AHCI devices on platforms
with PCI.
PCI AHCI devices still can be used by commenting CONFIG_SCSI_AHCI_PLAT
option in head file.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Add gzwrite command to write gzip-compressed images to block devices.
Input must be gzip-compressed according to RFC1952, since the crc
and file size in the trailer will be confirmed during operation.
The decompressed file size must be specified on the command line
for images with decompressed sizes >= 4GiB because the trailer
only contains the low 32 bits of the original file size.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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Add 'fdt_fixup_display' function to fixup device-tree native-mode property
of display-timings node to select timings for a specific display.
This is useful if a device-tree has configurations for multiple
display timings for undetectable displays.
see kernel Documentation/devicetree/bindings/video/display-timing.txt
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Simon Glass <sjg@chromium.org>
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On SoCFPGA, using "sf update" with an non-4byte aligned length leads
to a hangup (and reboot via watchdog). This is because of the unaligned
access in the cadence QSPI driver which is hard to prevent since the
data is written into a 4-byte wide FIFO. This patch fixes this problem
by changing the behavior of the last sector write (not sector aligned).
The new code is even simpler and copies the source data into the temp
buffer and now uses the temp buffer to write the complete sector. So
only one SPI sector write is used now instead of 2 in the old version.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Gerlando Falauto <gerlando.falauto@keymile.com>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>
Cc: Holger Brunck <holger.brunck@keymile.com>
Acked-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
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two CMD_DNS options were added by commit 60296a835cb17 ("commands: add more
command entries in Kconfig")
Signed-off-by: Andrey Skvortsov <andrej.skvortzov@gmail.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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When accessing PHY registers it is often desirable to only update
selected bits, so it is necessary to first read the current value
before writing back an modified value with the relevant bits
updated.
To simplify this and to allow such operations to be incorporated
into simple shell scripts propose adding a 'modify' option to the
existing mii command, which takes a mask indicating the bits to
be updated in addition to a data value containing the new bits,
ie, <updated> = (<data> & <mask>) | (<current> & ~<mask>).
Signed-off-by: Tim <tim.james@macltd.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Jeroen Hofstee <jeroen@myspectrum.nl>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tim <tim.james@macltd.com>
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Properly map memory through map_sysmem so that pxe can be used from the
sandbox.
Tested in sandbox as well as on jetson-tk1, odroid-xu3, snow as peach-pi
boards
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
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A common pattern to check if a certain device exists (e.g. in
config_distro_bootcmd) is to use: <interface> dev [device]
Implement host dev [device] so this pattern can be used for sandbox host
devices.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
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As suggested by Simon Glass, rename the sb command to host but keep the
old sb command as an alias
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Acked-by: Simon Glass <sjg@chromium.org>
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Move this over to Kconfig and tidy up.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Move CONFIG_BOOT_STAGE and its associated options to Kconfig. Adjust
existing users and code.
Signed-off-by: Simon Glass <sjg@chromium.org>
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When driver model is used for Ethernet a few functions are passed a udevice
instead of an eth_device. Also add a function to find a PHY type given its
name. This will be used to decode the device tree node.
Finally, put a phy_interface field in struct eth_pdata since this is an
important part of the platform data for Ethernet.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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