| Age | Commit message (Expand) | Author |
|---|---|---|
| 2008-10-18 | Add debug information for DDR controller registers | Haiying Wang |
| 2008-10-18 | Check DDR interleaving mode | Haiying Wang |
| 2008-10-18 | Pass dimm parameters to populate populate controller options | Haiying Wang |
| 2008-10-18 | Make DDR interleaving mode work correctly | Haiying Wang |
| 2008-10-18 | rename CFG_ macros to CONFIG_SYS | Jean-Christophe PLAGNIOL-VILLARD |
| 2008-09-13 | Coding style cleanup, update CHANGELOG | Wolfgang Denk |
| 2008-09-06 | Fix compiler warning in mpc8xxx ddr code | Kumar Gala |
| 2008-08-27 | FSL DDR: Add DDR2 DIMM paramter support | Kumar Gala |
| 2008-08-27 | FSL DDR: Add DDR1 DIMM paramter support | Kumar Gala |
| 2008-08-27 | FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. | Kumar Gala |
 |
index : u-boot-fsl-qoriq | |
| Freescale u-boot tree with Scalys patches | www-data |
| summaryrefslogtreecommitdiff |