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Freescale u-boot tree with Scalys patches
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drivers
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ddr
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fsl
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ctrl_regs.c
Age
Commit message (
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Author
2015-04-20
MPC8541/MPC8555: Enable SS_EN in DDR_SDRAM_CLK_CNLT register
Curt Brune
2015-02-24
driver/ddr/fsl: Fix a typo in timing_cfg_8 calculation
York Sun
2015-02-24
driver/ddr/fsl: Add support for multiple DDR clocks
York Sun
2015-02-24
driver/ddr/fsl: Adjust CAS to preamble override for emulator
York Sun
2014-12-15
driver/ddr/fsl: Fix MRC_CYC calculation for DDR3
York Sun
2014-12-05
driver/ddr/fsl: Adjust timing_cfg_0 to better support two DDR slots
York Sun
2014-11-23
linux/kernel.h: sync min, max, min3, max3 macros with Linux
Masahiro Yamada
2014-09-25
driver/ddr/fsl: Fix DDR4 driver
York Sun
2014-09-25
driver/ddr/fsl: Fix tXP and tCKE
York Sun
2014-09-08
driver/ddr/fsl: Add support of overriding chip select write leveling
York Sun
2014-09-08
driver/ddr/freescale: Add support of accumulate ECC
York Sun
2014-07-22
driver/ddr: Fix DDR register timing_cfg_8
York Sun
2014-06-05
powerpc/mpc85xx: Add workaround for DDR erratum A004508
York Sun
2014-04-23
drivers/ddr: Fix possible out of bounds error
York Sun
2014-04-23
driver/ddr/fsl: Add DDR4 support to Freescale DDR driver
York Sun
2014-02-21
driver/ddr: Add 256 byte interleaving support
York Sun
2014-02-21
driver/ddr: Change Freescale ARM DDR driver to support both big and little en...
York Sun
2013-11-25
powerpc/mpc8xxx: Extend DDR registers' fields
York Sun
2013-11-25
Driver/DDR: combine ccsr_ddr for 83xx, 85xx and 86xx
York Sun
2013-11-25
Driver/DDR: Moving Freescale DDR driver to a common driver
York Sun