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2017-06-07rockchip: mkimage: force 2KB alignment for init_sizePhilipp Tomsich
The Rockchip BootROM relies on init_size being aligned to 2KB (see https://lists.denx.de/pipermail/u-boot/2017-May/293268.html). This pads the image to 2KB both for SD card images and SPI images and uses a common symbolic constant for the alignment. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2017-06-07rockchip: mkimage: add support for verify_header/print_headerPhilipp Tomsich
The rockchip image generation was previously missing the ability to verify the generated header (and dump the image-type) without having to resort to hexdump or od. Experience in our testing has showed it to be very easy to get the rkspi and rksd images mixed up and the lab... so we add the necessary support to have dumpimage tell us what image type we're dealing with. This change set adds the verify_header and print_header capability to the rksd/rkspi image drivers (through shared code in rkcommon). As of now, we only support images fully that are not RC4-encoded for the SPL payload (i.e. header1 and payload). For RC4-encoded payloads, the outer header (header0) is checked, but no detection of whether this is a SD/MMC or SPI formatted payload takes place. The output of dumpsys now prints the image type (spl_hdr), whether it is a SD/MMC or SPI image, and the (padded) size of the image: $ ./tools/dumpimage -l ./spl.img Image Type: Rockchip RK33 (SD/MMC) boot image ^^^^^^ SD/MMC vs. SPI indication ^^^^ spl_hdr indicated by the image Data Size: 79872 bytes Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-05-10rockchip: mkimage: rewrite padding calculation for SD/MMC and SPI imagesPhilipp Tomsich
In (first) breaking and (then) fixing the rkspi tool, I realised that the calculation of the required padding (for the header-size and the 2K-in-every-4K SPI layout) was not as self-explainatory as it could have been. This change rewrites the code (using new, common functions in rkcommon.c) and adds verbose in-line comments to ensure that we won't fall into the same pit in the future... Tested on the RK3399 (with has a boot0-style payload) with SD/MMC and SPI. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Acked-by: Simon Glass <sjg@chromium.org>
2017-04-05rockchip: mkimage: update rkimage to support pre-padded payloadsPhilipp Tomsich
To simplify the creation of AArch64 SPL images for the RK3399, we use the ENABLE_ARM_SOC_BOOT0_HOOK option and prepend 4 bytes of padding at the start of the text section. This makes it easy for mkimage to rewrite this word with the 'RK33' boot magic. This change brings logic to calculate the header size and allocate the header back in sync. For the RK3399 we now limit the header to before the payload (i.e. the 'header0' and the padding up to the actual image) and overwrite the first word (inserted by the boot0-hook for this purpose) with the 'RK33' magic in-place. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-04-05rockchip: mkimage: pad the header to 8-bytes (using a 'nop') for RK3399Philipp Tomsich
The RK3399 boot code (running as AArch64) poses a bit of a challenge for SPL image generation: * The BootROM will start execution right after the 4-byte header (at the odd instruction word loaded into SRAM at 0xff8c2004, with the 'RK33' boot magic residing at 0xff8c2000). * The default padding (during ELF generation) for AArch64 is 0x0, which is an illegal instruction and the .text section needs to be naturally aligned (someone might locate a 64bit constant relative to the section start and unaligned loads trigger a fault for all privileged modes of an ARMv8)... so we can't simply define the CONFIG_SPL_TEXT_BASE option to the odd address (0xff8c2004). * Finally, we don't want to change the values used for padding of the SPL .text section for all ARMv8 targets to the instruction word encoding 'nop', as this would affect all padding in this section and might hide errors that would otherwise quickly trigger an illegal insn exception. To deal with this situation, we modify the rkimage generation to - understand the fact that the RK3399 needs to pad the header to an 8 byte boundary using an AArch64 'nop' - the necessary logic to adjust the header_size (which controls the location where the payload is copied into the image) and to insert this padding (AArch64 insn words are always little-endian) into the image following the 4-byte header magic. X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2017-03-16rockchip: mkimage: Allow encoding of loader code in spl imagesHeiko Stübner
Rockchip SoCs allow the spl code to be rc4-encoded, not only the image header, but only newer SoCs allow this encoding to be disabled. The rk3188 is not part of those and requires its boot code to be rc4-encoded with the regular key. So add the ability to do this encoding via a setting on a per-soc basis when building spl images. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Tested-by: Kever Yang <kever.yang@rock-chips.com>
2015-12-14rockchip: mkimage: use imagename to select spl hdr & spl sizeJeffy Chen
Our chips may have different spl size and spl header, so use imagename(passed by "mkimage -n") to select them now. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-14Revert "rockchip: Add max spl size & spl header configs"Jeffy Chen
This reverts commit 10b4615f9d7e177ec7fe644fbb2616e0e0956f6e Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: Add support for rk's second level loaderJeffy Chen
The Rockchip boot ROM could load & run an initial spl loader, and continue to load a second level boot-loader(which stored right after the initial loader) when it returns. Modify idblock generation code to support it. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
2015-12-01rockchip: Add max spl size & spl header configsJeffy Chen
Our chips may have different max spl size and spl header, so we need to add configs for that. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Dropped CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h, Added $(if...) to tools/Makefile to fix widespread build breakage Signed-off-by: Simon Glass <sjg@chromium.org> Series-changes: 8 - Drop CONFIG_ROCKCHIP_MAX_SPL_SIZE from rk3288_common.h, - Add $(if...) to tools/Makefile to fix widespread build breakage
2015-09-03rockchip: Add the rkimage format to mkimageSimon Glass
Rockchip SoCs require certain formats for code that they execute, The simplest format is a 4-byte header at the start of a binary file. Add support for this so that we can create images that the boot ROM understands. Signed-off-by: Simon Glass <sjg@chromium.org>