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/*
* Copyright 2017 Scalys B.V.
* opensource@scalys.com
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <command.h>
#include <netdev.h>
#include <linux/compiler.h>
#include <asm/mmu.h>
#include <asm/processor.h>
#include <asm/cache.h>
#include <asm/immap_85xx.h>
#include <asm/fsl_law.h>
#include <asm/fsl_serdes.h>
#include <asm/fsl_portals.h>
#include <asm/fsl_liodn.h>
#include <asm/fsl_pci.h>
#include <fm_eth.h>
#include <asm/processor.h>
#include <asm/gpio.h>
#include <fsl_esdhc.h>
#include <dm.h>
#include "dragonfruit.h"
#include <board_configuration_data.h>
DECLARE_GLOBAL_DATA_PTR;
int checkboard(void)
{
#ifdef CONFIG_TARGET_QT1040_1GB
printf("Board: QT1040-1GB\n" );
#else
printf("Board: simc-t10xx\n" );
#endif
return 0;
}
int misc_init_r(void)
{
const void* bcd_dtc_blob;
int serdes_config;
ccsr_gur_t __iomem *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
int ret;
debug("t10xx: misc_init_r\n");
/*
* Initialize and set the LED's on the module to indicate u-boot is alive
* IFC_A30 : led green : GPIO2_30
* IFC_A31 : led red : GPIO2_31
*/
#define MODULE_LED_RED MPC85XX_GPIO_NR(2, 31)
#define MODULE_LED_GREEN MPC85XX_GPIO_NR(2, 30)
gpio_request(MODULE_LED_RED, "module_led_red");
gpio_request(MODULE_LED_GREEN, "module_led_green");
gpio_direction_output(MODULE_LED_RED, 0);
gpio_direction_output(MODULE_LED_GREEN, 1);
/* SERDES configuration is determined boot time through the RCW config.
* It is located in the fourth RCW word (bit 128-135 of the RCW). */
serdes_config = ( in_be32(&gur->rcwsr[4]) >> 24);
scalys_carrier_setup_muxing(serdes_config);
bcd_dtc_blob = get_boardinfo_eeprom();
if (bcd_dtc_blob != NULL) {
/* Board Configuration Data is intact, ready for parsing */
ret = add_mac_addressess_to_env(bcd_dtc_blob);
if (ret != 0) {
printf("Error adding BCD data to environement\n");
}
}
return 0;
}
/* Platform data for the GPIOs */
static const struct mpc85xx_gpio_plat gpio_platdata[] = {
{ .addr = 0x130000, .ngpios = 32 },
{ .addr = 0x131000, .ngpios = 32 },
{ .addr = 0x132000, .ngpios = 32 },
{ .addr = 0x133000, .ngpios = 32,},
};
U_BOOT_DEVICES(mpc85xx_gpios) = {
{ "gpio_mpc85xx", &gpio_platdata[0] },
{ "gpio_mpc85xx", &gpio_platdata[1] },
{ "gpio_mpc85xx", &gpio_platdata[2] },
{ "gpio_mpc85xx", &gpio_platdata[3] },
};
int ft_board_setup(void *blob, bd_t *bd)
{
phys_addr_t base;
phys_size_t size;
debug( "t10xx: ft_board_setup\n" );
ft_cpu_setup(blob, bd);
base = getenv_bootm_low();
size = getenv_bootm_size();
debug( "fdt_fixup_memory\n" );
fdt_fixup_memory(blob, (u64)base, (u64)size);
#ifdef CONFIG_PCI
debug( "pci_of_setup\n" );
FT_FSL_PCI_SETUP;
#endif
debug( "fdt_fixup_liodn\n" );
fdt_fixup_liodn(blob);
#ifdef CONFIG_HAS_FSL_DR_USB
debug( "fsl_fdt_fixup_dr_usb\n" );
fsl_fdt_fixup_dr_usb(blob, bd);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
debug( "fdt_fixup_fman_ethernet\n" );
fdt_fixup_fman_ethernet(blob);
#endif
return 0;
}
int board_mmc_init(bd_t *bis)
{
struct fsl_esdhc_cfg *cfg;
cfg = calloc(sizeof(struct fsl_esdhc_cfg), 1);
cfg->esdhc_base = CONFIG_SYS_FSL_ESDHC_ADDR;
cfg->sdhc_clk = gd->arch.sdhc_clk;
cfg->max_bus_width = 4;
return fsl_esdhc_initialize(bis, cfg);
return 0;
}
#if 0
void board_detail(void)
{
do_bcdinfo();
}
#endif
void board_reset(void)
{
printf("U-boot reset command not implemented.\n");
}
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