1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
|
/*
* Toradex Colibri PXA270 Support
*
* Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/arch/regs-mmc.h>
#include <asm/arch/pxa.h>
#include <netdev.h>
#include <asm/io.h>
#include <serial.h>
DECLARE_GLOBAL_DATA_PTR;
struct serial_device *default_serial_console(void)
{
return &serial_ffuart_device;
}
int board_init(void)
{
/* We have RAM, disable cache */
dcache_disable();
icache_disable();
/* arch number of vpac270 */
gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0xa0000100;
return 0;
}
int dram_init(void)
{
pxa2xx_dram_init();
gd->ram_size = PHYS_SDRAM_1_SIZE;
return 0;
}
#ifdef CONFIG_CMD_USB
int usb_board_init(void)
{
writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
UHCHR);
writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
while (UHCHR & UHCHR_FSBIR)
;
writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
/* Clear any OTG Pin Hold */
if (readl(PSSR) & PSSR_OTGPH)
writel(readl(PSSR) | PSSR_OTGPH, PSSR);
writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
writel(readl(UHCRHDA) | 0x100, UHCRHDA);
/* Set port power control mask bits, only 3 ports. */
writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
/* enable port 2 */
writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
return 0;
}
void usb_board_init_fail(void)
{
return;
}
void usb_board_stop(void)
{
writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
udelay(11);
writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
writel(readl(UHCCOMS) | 1, UHCCOMS);
udelay(10);
writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
return;
}
#endif
#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(bd_t *bis)
{
return dm9000_initialize(bis);
}
#endif
#ifdef CONFIG_CMD_MMC
int board_mmc_init(bd_t *bis)
{
pxa_mmc_register(0);
return 0;
}
#endif
|