diff options
author | Michael Hennerich <michael.hennerich@analog.com> | 2010-01-19 14:45:38 (GMT) |
---|---|---|
committer | Mike Frysinger <vapier@gentoo.org> | 2010-03-09 05:30:49 (GMT) |
commit | f3dec78333d6369161eb833dbd8c8f006f359fdf (patch) | |
tree | 1e77ad2e38e517f9a74a8f7fa67e1d5fe9e0eb5e | |
parent | 5e8d3210b5bffbe64afca9152241284a46611c7e (diff) | |
download | linux-fsl-qoriq-f3dec78333d6369161eb833dbd8c8f006f359fdf.tar.xz |
Blackfin: increase NR_IRQS beyond NR on-chip IRQs
This makes room for off-chip IRQ controllers.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
-rw-r--r-- | arch/blackfin/include/asm/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf518/include/mach/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf527/include/mach/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf533/include/mach/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf537/include/mach/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf538/include/mach/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf548/include/mach/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-bf561/include/mach/irq.h | 3 | ||||
-rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 2 |
9 files changed, 18 insertions, 8 deletions
diff --git a/arch/blackfin/include/asm/irq.h b/arch/blackfin/include/asm/irq.h index e7c0623..89de539 100644 --- a/arch/blackfin/include/asm/irq.h +++ b/arch/blackfin/include/asm/irq.h @@ -12,6 +12,9 @@ #include <linux/irqflags.h> +/* IRQs that may be used by external irq_chip controllers */ +#define NR_SPARE_IRQS 32 + #include <mach/anomaly.h> /* SYS_IRQS and NR_IRQS are defined in <mach-bf5xx/irq.h> */ diff --git a/arch/blackfin/mach-bf518/include/mach/irq.h b/arch/blackfin/mach-bf518/include/mach/irq.h index 14e52ec..52edc84 100644 --- a/arch/blackfin/mach-bf518/include/mach/irq.h +++ b/arch/blackfin/mach-bf518/include/mach/irq.h @@ -151,7 +151,8 @@ #define GPIO_IRQ_BASE IRQ_PF0 -#define NR_IRQS (IRQ_PH15 + 1) +#define NR_MACH_IRQS (IRQ_PH15 + 1) +#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) #define IVG7 7 #define IVG8 8 diff --git a/arch/blackfin/mach-bf527/include/mach/irq.h b/arch/blackfin/mach-bf527/include/mach/irq.h index aa6579a..17604b4 100644 --- a/arch/blackfin/mach-bf527/include/mach/irq.h +++ b/arch/blackfin/mach-bf527/include/mach/irq.h @@ -151,7 +151,8 @@ #define GPIO_IRQ_BASE IRQ_PF0 -#define NR_IRQS (IRQ_PH15+1) +#define NR_MACH_IRQS (IRQ_PH15 + 1) +#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) #define IVG7 7 #define IVG8 8 diff --git a/arch/blackfin/mach-bf533/include/mach/irq.h b/arch/blackfin/mach-bf533/include/mach/irq.h index c31498b..1f7e976 100644 --- a/arch/blackfin/mach-bf533/include/mach/irq.h +++ b/arch/blackfin/mach-bf533/include/mach/irq.h @@ -104,7 +104,8 @@ Core Emulation ** #define GPIO_IRQ_BASE IRQ_PF0 -#define NR_IRQS (IRQ_PF15+1) +#define NR_MACH_IRQS (IRQ_PF15 + 1) +#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) #define IVG7 7 #define IVG8 8 diff --git a/arch/blackfin/mach-bf537/include/mach/irq.h b/arch/blackfin/mach-bf537/include/mach/irq.h index 0defa94..9b2cbca 100644 --- a/arch/blackfin/mach-bf537/include/mach/irq.h +++ b/arch/blackfin/mach-bf537/include/mach/irq.h @@ -134,7 +134,8 @@ #define GPIO_IRQ_BASE IRQ_PF0 -#define NR_IRQS (IRQ_PH15+1) +#define NR_MACH_IRQS (IRQ_PH15 + 1) +#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) #define IVG7 7 #define IVG8 8 diff --git a/arch/blackfin/mach-bf538/include/mach/irq.h b/arch/blackfin/mach-bf538/include/mach/irq.h index a4b7fcb..7a479d2 100644 --- a/arch/blackfin/mach-bf538/include/mach/irq.h +++ b/arch/blackfin/mach-bf538/include/mach/irq.h @@ -110,7 +110,8 @@ #define GPIO_IRQ_BASE IRQ_PF0 -#define NR_IRQS (IRQ_PF15+1) +#define NR_MACH_IRQS (IRQ_PF15 + 1) +#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) #define IVG7 7 #define IVG8 8 diff --git a/arch/blackfin/mach-bf548/include/mach/irq.h b/arch/blackfin/mach-bf548/include/mach/irq.h index 106db05..1f99b51 100644 --- a/arch/blackfin/mach-bf548/include/mach/irq.h +++ b/arch/blackfin/mach-bf548/include/mach/irq.h @@ -317,7 +317,8 @@ Events (highest priority) EMU 0 #define GPIO_IRQ_BASE IRQ_PA0 -#define NR_IRQS (IRQ_PJ15+1) +#define NR_MACH_IRQS (IRQ_PJ15 + 1) +#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) /* For compatibility reasons with existing code */ diff --git a/arch/blackfin/mach-bf561/include/mach/irq.h b/arch/blackfin/mach-bf561/include/mach/irq.h index 7b208db..c95566a 100644 --- a/arch/blackfin/mach-bf561/include/mach/irq.h +++ b/arch/blackfin/mach-bf561/include/mach/irq.h @@ -265,7 +265,8 @@ #define GPIO_IRQ_BASE IRQ_PF0 -#define NR_IRQS (IRQ_PF47 + 1) +#define NR_MACH_IRQS (IRQ_PF47 + 1) +#define NR_IRQS (NR_MACH_IRQS + NR_SPARE_IRQS) #define IVG7 7 #define IVG8 8 diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 3589fe8..ebf8860 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1114,7 +1114,7 @@ int __init init_arch_irq(void) #endif /* if configured as edge, then will be changed to do_edge_IRQ */ - for (irq = GPIO_IRQ_BASE; irq < NR_IRQS; irq++) + for (irq = GPIO_IRQ_BASE; irq < NR_MACH_IRQS; irq++) set_irq_chip_and_handler(irq, &bfin_gpio_irqchip, handle_level_irq); |