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authorJosh Cartwright <josh.cartwright@ni.com>2012-10-23 22:34:22 (GMT)
committerMichal Simek <michal.simek@xilinx.com>2012-10-29 07:31:22 (GMT)
commit0fcfdbcacf6fa234064126e5b18c720ca27bc6e7 (patch)
treec7e4e0f00c90c814781189e36abf2dda32c61ddc /arch/arm/boot
parentf447ed2dbc844d645ef8bf82cc04281fa4163aed (diff)
downloadlinux-fsl-qoriq-0fcfdbcacf6fa234064126e5b18c720ca27bc6e7.tar.xz
zynq: use pl310 device tree bindings
The Zynq has a PL310 L2 cache controller. Convert in-tree uses to using the device tree. Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Cc: John Linn <john.linn@xilinx.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/zynq-ep107.dts9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-ep107.dts b/arch/arm/boot/dts/zynq-ep107.dts
index f914090..574bc04 100644
--- a/arch/arm/boot/dts/zynq-ep107.dts
+++ b/arch/arm/boot/dts/zynq-ep107.dts
@@ -44,6 +44,15 @@
<0xF8F00100 0x100>;
};
+ L2: cache-controller {
+ compatible = "arm,pl310-cache";
+ reg = <0xF8F02000 0x1000>;
+ arm,data-latency = <2 3 2>;
+ arm,tag-latency = <2 3 2>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
uart0: uart@e0000000 {
compatible = "xlnx,xuartps";
reg = <0xE0000000 0x1000>;